dw_apb_timer_of.c revision a1198f83407ae3421f3f58355a0f296d5ea6249c 
1/*
2 * Copyright (C) 2012 Altera Corporation
3 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
4 *
5 * Modified from mach-picoxcell/time.c
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18 */
19#include <linux/dw_apb_timer.h>
20#include <linux/of.h>
21#include <linux/of_address.h>
22#include <linux/of_irq.h>
23
24#include <asm/mach/time.h>
25#include <asm/sched_clock.h>
26
27static void timer_get_base_and_rate(struct device_node *np,
28				    void __iomem **base, u32 *rate)
29{
30	*base = of_iomap(np, 0);
31
32	if (!*base)
33		panic("Unable to map regs for %s", np->name);
34
35	if (of_property_read_u32(np, "clock-freq", rate) &&
36		of_property_read_u32(np, "clock-frequency", rate))
37		panic("No clock-frequency property for %s", np->name);
38}
39
40static void add_clockevent(struct device_node *event_timer)
41{
42	void __iomem *iobase;
43	struct dw_apb_clock_event_device *ced;
44	u32 irq, rate;
45
46	irq = irq_of_parse_and_map(event_timer, 0);
47	if (irq == NO_IRQ)
48		panic("No IRQ for clock event timer");
49
50	timer_get_base_and_rate(event_timer, &iobase, &rate);
51
52	ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
53				     rate);
54	if (!ced)
55		panic("Unable to initialise clockevent device");
56
57	dw_apb_clockevent_register(ced);
58}
59
60static void __iomem *sched_io_base;
61static u32 sched_rate;
62
63static void add_clocksource(struct device_node *source_timer)
64{
65	void __iomem *iobase;
66	struct dw_apb_clocksource *cs;
67	u32 rate;
68
69	timer_get_base_and_rate(source_timer, &iobase, &rate);
70
71	cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
72	if (!cs)
73		panic("Unable to initialise clocksource device");
74
75	dw_apb_clocksource_start(cs);
76	dw_apb_clocksource_register(cs);
77
78	/*
79	 * Fallback to use the clocksource as sched_clock if no separate
80	 * timer is found. sched_io_base then points to the current_value
81	 * register of the clocksource timer.
82	 */
83	sched_io_base = iobase + 0x04;
84	sched_rate = rate;
85}
86
87static u32 read_sched_clock(void)
88{
89	return __raw_readl(sched_io_base);
90}
91
92static const struct of_device_id sptimer_ids[] __initconst = {
93	{ .compatible = "picochip,pc3x2-rtc" },
94	{ .compatible = "snps,dw-apb-timer-sp" },
95	{ /* Sentinel */ },
96};
97
98static void init_sched_clock(void)
99{
100	struct device_node *sched_timer;
101
102	sched_timer = of_find_matching_node(NULL, sptimer_ids);
103	if (sched_timer) {
104		timer_get_base_and_rate(sched_timer, &sched_io_base,
105					&sched_rate);
106		of_node_put(sched_timer);
107	}
108
109	setup_sched_clock(read_sched_clock, 32, sched_rate);
110}
111
112static const struct of_device_id osctimer_ids[] __initconst = {
113	{ .compatible = "picochip,pc3x2-timer" },
114	{ .compatible = "snps,dw-apb-timer-osc" },
115	{},
116};
117
118void __init dw_apb_timer_init(void)
119{
120	struct device_node *event_timer, *source_timer;
121
122	event_timer = of_find_matching_node(NULL, osctimer_ids);
123	if (!event_timer)
124		panic("No timer for clockevent");
125	add_clockevent(event_timer);
126
127	source_timer = of_find_matching_node(event_timer, osctimer_ids);
128	if (!source_timer)
129		panic("No timer for clocksource");
130	add_clocksource(source_timer);
131
132	of_node_put(source_timer);
133
134	init_sched_clock();
135}
136