1/*
2 * AppliedMicro X-Gene SoC GPIO Driver
3 *
4 * Copyright (c) 2014, Applied Micro Circuits Corporation
5 * Author: Feng Kan <fkan@apm.com>.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/spinlock.h>
25#include <linux/platform_device.h>
26#include <linux/gpio/driver.h>
27#include <linux/types.h>
28#include <linux/bitops.h>
29
30#define GPIO_SET_DR_OFFSET	0x0C
31#define GPIO_DATA_OFFSET	0x14
32#define GPIO_BANK_STRIDE	0x0C
33
34#define XGENE_GPIOS_PER_BANK	16
35#define XGENE_MAX_GPIO_BANKS	3
36#define XGENE_MAX_GPIOS		(XGENE_GPIOS_PER_BANK * XGENE_MAX_GPIO_BANKS)
37
38#define GPIO_BIT_OFFSET(x)	(x % XGENE_GPIOS_PER_BANK)
39#define GPIO_BANK_OFFSET(x)	((x / XGENE_GPIOS_PER_BANK) * GPIO_BANK_STRIDE)
40
41struct xgene_gpio {
42	struct gpio_chip	chip;
43	void __iomem		*base;
44	spinlock_t		lock;
45#ifdef CONFIG_PM
46	u32			set_dr_val[XGENE_MAX_GPIO_BANKS];
47#endif
48};
49
50static inline struct xgene_gpio *to_xgene_gpio(struct gpio_chip *chip)
51{
52	return container_of(chip, struct xgene_gpio, chip);
53}
54
55static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset)
56{
57	struct xgene_gpio *chip = to_xgene_gpio(gc);
58	unsigned long bank_offset;
59	u32 bit_offset;
60
61	bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset);
62	bit_offset = GPIO_BIT_OFFSET(offset);
63	return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));
64}
65
66static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
67{
68	struct xgene_gpio *chip = to_xgene_gpio(gc);
69	unsigned long bank_offset;
70	u32 setval, bit_offset;
71
72	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
73	bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK;
74
75	setval = ioread32(chip->base + bank_offset);
76	if (val)
77		setval |= BIT(bit_offset);
78	else
79		setval &= ~BIT(bit_offset);
80	iowrite32(setval, chip->base + bank_offset);
81}
82
83static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
84{
85	struct xgene_gpio *chip = to_xgene_gpio(gc);
86	unsigned long flags;
87
88	spin_lock_irqsave(&chip->lock, flags);
89	__xgene_gpio_set(gc, offset, val);
90	spin_unlock_irqrestore(&chip->lock, flags);
91}
92
93static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
94{
95	struct xgene_gpio *chip = to_xgene_gpio(gc);
96	unsigned long flags, bank_offset;
97	u32 dirval, bit_offset;
98
99	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
100	bit_offset = GPIO_BIT_OFFSET(offset);
101
102	spin_lock_irqsave(&chip->lock, flags);
103
104	dirval = ioread32(chip->base + bank_offset);
105	dirval |= BIT(bit_offset);
106	iowrite32(dirval, chip->base + bank_offset);
107
108	spin_unlock_irqrestore(&chip->lock, flags);
109
110	return 0;
111}
112
113static int xgene_gpio_dir_out(struct gpio_chip *gc,
114					unsigned int offset, int val)
115{
116	struct xgene_gpio *chip = to_xgene_gpio(gc);
117	unsigned long flags, bank_offset;
118	u32 dirval, bit_offset;
119
120	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
121	bit_offset = GPIO_BIT_OFFSET(offset);
122
123	spin_lock_irqsave(&chip->lock, flags);
124
125	dirval = ioread32(chip->base + bank_offset);
126	dirval &= ~BIT(bit_offset);
127	iowrite32(dirval, chip->base + bank_offset);
128	__xgene_gpio_set(gc, offset, val);
129
130	spin_unlock_irqrestore(&chip->lock, flags);
131
132	return 0;
133}
134
135#ifdef CONFIG_PM
136static int xgene_gpio_suspend(struct device *dev)
137{
138	struct xgene_gpio *gpio = dev_get_drvdata(dev);
139	unsigned long bank_offset;
140	unsigned int bank;
141
142	for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
143		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
144		gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);
145	}
146	return 0;
147}
148
149static int xgene_gpio_resume(struct device *dev)
150{
151	struct xgene_gpio *gpio = dev_get_drvdata(dev);
152	unsigned long bank_offset;
153	unsigned int bank;
154
155	for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
156		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
157		iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);
158	}
159	return 0;
160}
161
162static SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume);
163#define XGENE_GPIO_PM_OPS	(&xgene_gpio_pm)
164#else
165#define XGENE_GPIO_PM_OPS	NULL
166#endif
167
168static int xgene_gpio_probe(struct platform_device *pdev)
169{
170	struct resource *res;
171	struct xgene_gpio *gpio;
172	int err = 0;
173
174	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
175	if (!gpio) {
176		err = -ENOMEM;
177		goto err;
178	}
179
180	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
181	gpio->base = devm_ioremap_nocache(&pdev->dev, res->start,
182							resource_size(res));
183	if (!gpio->base) {
184		err = -ENOMEM;
185		goto err;
186	}
187
188	gpio->chip.ngpio = XGENE_MAX_GPIOS;
189
190	spin_lock_init(&gpio->lock);
191	gpio->chip.dev = &pdev->dev;
192	gpio->chip.direction_input = xgene_gpio_dir_in;
193	gpio->chip.direction_output = xgene_gpio_dir_out;
194	gpio->chip.get = xgene_gpio_get;
195	gpio->chip.set = xgene_gpio_set;
196	gpio->chip.label = dev_name(&pdev->dev);
197	gpio->chip.base = -1;
198
199	platform_set_drvdata(pdev, gpio);
200
201	err = gpiochip_add(&gpio->chip);
202	if (err) {
203		dev_err(&pdev->dev,
204			"failed to register gpiochip.\n");
205		goto err;
206	}
207
208	dev_info(&pdev->dev, "X-Gene GPIO driver registered.\n");
209	return 0;
210err:
211	dev_err(&pdev->dev, "X-Gene GPIO driver registration failed.\n");
212	return err;
213}
214
215static int xgene_gpio_remove(struct platform_device *pdev)
216{
217	struct xgene_gpio *gpio = platform_get_drvdata(pdev);
218
219	gpiochip_remove(&gpio->chip);
220	return 0;
221}
222
223static const struct of_device_id xgene_gpio_of_match[] = {
224	{ .compatible = "apm,xgene-gpio", },
225	{},
226};
227MODULE_DEVICE_TABLE(of, xgene_gpio_of_match);
228
229static struct platform_driver xgene_gpio_driver = {
230	.driver = {
231		.name = "xgene-gpio",
232		.owner = THIS_MODULE,
233		.of_match_table = xgene_gpio_of_match,
234		.pm     = XGENE_GPIO_PM_OPS,
235	},
236	.probe = xgene_gpio_probe,
237	.remove = xgene_gpio_remove,
238};
239
240module_platform_driver(xgene_gpio_driver);
241
242MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
243MODULE_DESCRIPTION("APM X-Gene GPIO driver");
244MODULE_LICENSE("GPL");
245