1c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* 2c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Driver for I2C adapter in Rockchip RK3xxx SoC 3c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * 4c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Max Schwarz <max.schwarz@online.de> 5c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * based on the patches by Rockchip Inc. 6c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * 7c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * This program is free software; you can redistribute it and/or modify 8c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * it under the terms of the GNU General Public License version 2 as 9c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * published by the Free Software Foundation. 10c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 11c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 12c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/kernel.h> 13c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/module.h> 14c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/i2c.h> 15c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/interrupt.h> 16c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/errno.h> 17c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/err.h> 18c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/platform_device.h> 19c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/io.h> 20c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/of_address.h> 21c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/of_irq.h> 22c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/spinlock.h> 23c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/clk.h> 24c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/wait.h> 25c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/mfd/syscon.h> 26c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#include <linux/regmap.h> 27c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 28c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 29c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* Register Map */ 30c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON 0x00 /* control register */ 31c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CLKDIV 0x04 /* clock divisor register */ 32c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_MRXADDR 0x08 /* slave address for REGISTER_TX */ 33c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_MRXRADDR 0x0c /* slave register address for REGISTER_TX */ 34c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_MTXCNT 0x10 /* number of bytes to be transmitted */ 35c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_MRXCNT 0x14 /* number of bytes to be received */ 36c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_IEN 0x18 /* interrupt enable */ 37c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_IPD 0x1c /* interrupt pending */ 38c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_FCNT 0x20 /* finished count */ 39c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 40c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* Data buffer offsets */ 41c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define TXBUFFER_BASE 0x100 42c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define RXBUFFER_BASE 0x200 43c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 44c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* REG_CON bits */ 45c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON_EN BIT(0) 46c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzenum { 47c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz REG_CON_MOD_TX = 0, /* transmit data */ 48c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz REG_CON_MOD_REGISTER_TX, /* select register and restart */ 49c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz REG_CON_MOD_RX, /* receive data */ 50c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz REG_CON_MOD_REGISTER_RX, /* broken: transmits read addr AND writes 51c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * register addr */ 52c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 53c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON_MOD(mod) ((mod) << 1) 54c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON_MOD_MASK (BIT(1) | BIT(2)) 55c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON_START BIT(3) 56c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON_STOP BIT(4) 57c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON_LASTACK BIT(5) /* 1: send NACK after last received byte */ 58c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_CON_ACTACK BIT(6) /* 1: stop if NACK is received */ 59c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 60c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* REG_MRXADDR bits */ 61c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */ 62c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 63c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* REG_IEN/REG_IPD bits */ 64c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_BTF BIT(0) /* a byte was transmitted */ 65c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_BRF BIT(1) /* a byte was received */ 66c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_MBTF BIT(2) /* master data transmit finished */ 67c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_MBRF BIT(3) /* master data receive finished */ 68c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_START BIT(4) /* START condition generated */ 69c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_STOP BIT(5) /* STOP condition generated */ 70c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_NAKRCV BIT(6) /* NACK received */ 71c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define REG_INT_ALL 0x7f 72c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 73c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* Constants */ 74c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define WAIT_TIMEOUT 200 /* ms */ 75c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz#define DEFAULT_SCL_RATE (100 * 1000) /* Hz */ 76c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 77c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzenum rk3x_i2c_state { 78c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz STATE_IDLE, 79c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz STATE_START, 80c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz STATE_READ, 81c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz STATE_WRITE, 82c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz STATE_STOP 83c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 84c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 85c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/** 86c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * @grf_offset: offset inside the grf regmap for setting the i2c type 87c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 88c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstruct rk3x_i2c_soc_data { 89c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int grf_offset; 90c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 91c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 92c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstruct rk3x_i2c { 93c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct i2c_adapter adap; 94c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct device *dev; 95c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct rk3x_i2c_soc_data *soc_data; 96c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 97c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Hardware resources */ 98c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz void __iomem *regs; 99c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct clk *clk; 100c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 101c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Settings */ 102c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int scl_frequency; 103c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 104c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Synchronization & notification */ 105c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spinlock_t lock; 106c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz wait_queue_head_t wait; 107c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz bool busy; 108c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 109c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Current message */ 110c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct i2c_msg *msg; 111c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u8 addr; 112c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int mode; 113c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz bool is_last_msg; 114c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 115c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* I2C state machine */ 116c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz enum rk3x_i2c_state state; 117c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int processed; /* sent/received bytes */ 118c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int error; 119c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 120c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 121c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic inline void i2c_writel(struct rk3x_i2c *i2c, u32 value, 122c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int offset) 123c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 124c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz writel(value, i2c->regs + offset); 125c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 126c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 127c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic inline u32 i2c_readl(struct rk3x_i2c *i2c, unsigned int offset) 128c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 129c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return readl(i2c->regs + offset); 130c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 131c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 132c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* Reset all interrupt pending bits */ 133c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic inline void rk3x_i2c_clean_ipd(struct rk3x_i2c *i2c) 134c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 135c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_ALL, REG_IPD); 136c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 137c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 138c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/** 139c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Generate a START condition, which triggers a REG_INT_START interrupt. 140c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 141c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_start(struct rk3x_i2c *i2c) 142c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 143c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 val; 144c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 145c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_clean_ipd(i2c); 146c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_START, REG_IEN); 147c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 148c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* enable adapter with correct mode, send START condition */ 149c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz val = REG_CON_EN | REG_CON_MOD(i2c->mode) | REG_CON_START; 150c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 151c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* if we want to react to NACK, set ACTACK bit */ 152c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) 153c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz val |= REG_CON_ACTACK; 154c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 155c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, val, REG_CON); 156c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 157c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 158c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/** 159c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Generate a STOP condition, which triggers a REG_INT_STOP interrupt. 160c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * 161c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * @error: Error code to return in rk3x_i2c_xfer 162c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 163c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_stop(struct rk3x_i2c *i2c, int error) 164c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 165c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int ctrl; 166c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 167c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->processed = 0; 168c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->msg = NULL; 169c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->error = error; 170c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 171c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->is_last_msg) { 172c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Enable stop interrupt */ 173c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_STOP, REG_IEN); 174c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 175c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->state = STATE_STOP; 176c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 177c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ctrl = i2c_readl(i2c, REG_CON); 178c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ctrl |= REG_CON_STOP; 179c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, ctrl, REG_CON); 180c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } else { 181c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Signal rk3x_i2c_xfer to start the next message. */ 182c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->busy = false; 183c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->state = STATE_IDLE; 184c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 185c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 186c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * The HW is actually not capable of REPEATED START. But we can 187c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * get the intended effect by resetting its internal state 188c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * and issuing an ordinary START. 189c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 190c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, 0, REG_CON); 191c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 192c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* signal that we are finished with the current msg */ 193c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz wake_up(&i2c->wait); 194c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 195c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 196c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 197c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/** 198c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Setup a read according to i2c->msg 199c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 200c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_prepare_read(struct rk3x_i2c *i2c) 201c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 202c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int len = i2c->msg->len - i2c->processed; 203c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 con; 204c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 205c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz con = i2c_readl(i2c, REG_CON); 206c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 207c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 208c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * The hw can read up to 32 bytes at a time. If we need more than one 209c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * chunk, send an ACK after the last byte of the current chunk. 210c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 21129209338b22a61c9ba67badd5f36e96cda1892d8Doug Anderson if (len > 32) { 212c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz len = 32; 213c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz con &= ~REG_CON_LASTACK; 214c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } else { 215c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz con |= REG_CON_LASTACK; 216c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 217c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 218c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* make sure we are in plain RX mode if we read a second chunk */ 219c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->processed != 0) { 220c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz con &= ~REG_CON_MOD_MASK; 221c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz con |= REG_CON_MOD(REG_CON_MOD_RX); 222c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 223c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 224c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, con, REG_CON); 225c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, len, REG_MRXCNT); 226c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 227c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 228c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/** 229c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Fill the transmit buffer with data from i2c->msg 230c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 231c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_fill_transmit_buf(struct rk3x_i2c *i2c) 232c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 233c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int i, j; 234c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 cnt = 0; 235c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 val; 236c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u8 byte; 237c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 238c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz for (i = 0; i < 8; ++i) { 239c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz val = 0; 240c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz for (j = 0; j < 4; ++j) { 241cf27020d2f253bac6457d6833b97141030f0122aAlexandru M Stan if ((i2c->processed == i2c->msg->len) && (cnt != 0)) 242c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 243c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 244c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->processed == 0 && cnt == 0) 245c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz byte = (i2c->addr & 0x7f) << 1; 246c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz else 247c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz byte = i2c->msg->buf[i2c->processed++]; 248c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 249c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz val |= byte << (j * 8); 250c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz cnt++; 251c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 252c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 253c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, val, TXBUFFER_BASE + 4 * i); 254c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 255c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->processed == i2c->msg->len) 256c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 257c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 258c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 259c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, cnt, REG_MTXCNT); 260c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 261c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 262c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 263c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/* IRQ handlers for individual states */ 264c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 265c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_handle_start(struct rk3x_i2c *i2c, unsigned int ipd) 266c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 267c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (!(ipd & REG_INT_START)) { 268c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_stop(i2c, -EIO); 269c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_warn(i2c->dev, "unexpected irq in START: 0x%x\n", ipd); 270c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_clean_ipd(i2c); 271c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return; 272c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 273c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 274c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* ack interrupt */ 275c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_START, REG_IPD); 276c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 277c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* disable start bit */ 278c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, i2c_readl(i2c, REG_CON) & ~REG_CON_START, REG_CON); 279c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 280c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* enable appropriate interrupts and transition */ 281c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->mode == REG_CON_MOD_TX) { 282c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_MBTF | REG_INT_NAKRCV, REG_IEN); 283c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->state = STATE_WRITE; 284c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_fill_transmit_buf(i2c); 285c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } else { 286c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* in any other case, we are going to be reading. */ 287c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_MBRF | REG_INT_NAKRCV, REG_IEN); 288c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->state = STATE_READ; 289c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_prepare_read(i2c); 290c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 291c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 292c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 293c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_handle_write(struct rk3x_i2c *i2c, unsigned int ipd) 294c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 295c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (!(ipd & REG_INT_MBTF)) { 296c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_stop(i2c, -EIO); 297c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(i2c->dev, "unexpected irq in WRITE: 0x%x\n", ipd); 298c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_clean_ipd(i2c); 299c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return; 300c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 301c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 302c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* ack interrupt */ 303c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_MBTF, REG_IPD); 304c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 305c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* are we finished? */ 306c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->processed == i2c->msg->len) 307c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_stop(i2c, i2c->error); 308c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz else 309c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_fill_transmit_buf(i2c); 310c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 311c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 312c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_handle_read(struct rk3x_i2c *i2c, unsigned int ipd) 313c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 314c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int i; 315c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int len = i2c->msg->len - i2c->processed; 316c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 uninitialized_var(val); 317c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u8 byte; 318c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 319c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* we only care for MBRF here. */ 320c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (!(ipd & REG_INT_MBRF)) 321c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return; 322c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 323c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* ack interrupt */ 324c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_MBRF, REG_IPD); 325c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 3265da4309f9e1b4de9c2b69e917912fbb84006d44eaddy ke /* Can only handle a maximum of 32 bytes at a time */ 3275da4309f9e1b4de9c2b69e917912fbb84006d44eaddy ke if (len > 32) 3285da4309f9e1b4de9c2b69e917912fbb84006d44eaddy ke len = 32; 3295da4309f9e1b4de9c2b69e917912fbb84006d44eaddy ke 330c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* read the data from receive buffer */ 331c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz for (i = 0; i < len; ++i) { 332c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i % 4 == 0) 333c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz val = i2c_readl(i2c, RXBUFFER_BASE + (i / 4) * 4); 334c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 335c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz byte = (val >> ((i % 4) * 8)) & 0xff; 336c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->msg->buf[i2c->processed++] = byte; 337c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 338c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 339c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* are we finished? */ 340c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->processed == i2c->msg->len) 341c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_stop(i2c, i2c->error); 342c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz else 343c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_prepare_read(i2c); 344c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 345c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 346c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_handle_stop(struct rk3x_i2c *i2c, unsigned int ipd) 347c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 348c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int con; 349c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 350c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (!(ipd & REG_INT_STOP)) { 351c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_stop(i2c, -EIO); 352c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(i2c->dev, "unexpected irq in STOP: 0x%x\n", ipd); 353c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_clean_ipd(i2c); 354c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return; 355c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 356c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 357c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* ack interrupt */ 358c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_STOP, REG_IPD); 359c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 360c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* disable STOP bit */ 361c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz con = i2c_readl(i2c, REG_CON); 362c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz con &= ~REG_CON_STOP; 363c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, con, REG_CON); 364c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 365c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->busy = false; 366c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->state = STATE_IDLE; 367c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 368c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* signal rk3x_i2c_xfer that we are finished */ 369c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz wake_up(&i2c->wait); 370c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 371c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 372c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic irqreturn_t rk3x_i2c_irq(int irqno, void *dev_id) 373c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 374c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct rk3x_i2c *i2c = dev_id; 375c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int ipd; 376c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 377c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spin_lock(&i2c->lock); 378c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 379c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ipd = i2c_readl(i2c, REG_IPD); 380c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->state == STATE_IDLE) { 381c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_warn(i2c->dev, "irq in STATE_IDLE, ipd = 0x%x\n", ipd); 382c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_clean_ipd(i2c); 383c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz goto out; 384c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 385c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 386c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_dbg(i2c->dev, "IRQ: state %d, ipd: %x\n", i2c->state, ipd); 387c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 388c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Clean interrupt bits we don't care about */ 389c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ipd &= ~(REG_INT_BRF | REG_INT_BTF); 390c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 391c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (ipd & REG_INT_NAKRCV) { 392c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 393c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * We got a NACK in the last operation. Depending on whether 394c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * IGNORE_NAK is set, we have to stop the operation and report 395c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * an error. 396c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 397c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_INT_NAKRCV, REG_IPD); 398c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 399c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ipd &= ~REG_INT_NAKRCV; 400c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 401c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) 402c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_stop(i2c, -ENXIO); 403c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 404c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 405c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* is there anything left to handle? */ 40629209338b22a61c9ba67badd5f36e96cda1892d8Doug Anderson if ((ipd & REG_INT_ALL) == 0) 407c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz goto out; 408c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 409c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz switch (i2c->state) { 410c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz case STATE_START: 411c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_handle_start(i2c, ipd); 412c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 413c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz case STATE_WRITE: 414c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_handle_write(i2c, ipd); 415c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 416c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz case STATE_READ: 417c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_handle_read(i2c, ipd); 418c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 419c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz case STATE_STOP: 420c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_handle_stop(i2c, ipd); 421c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 422c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz case STATE_IDLE: 423c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 424c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 425c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 426c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzout: 427c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spin_unlock(&i2c->lock); 428c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return IRQ_HANDLED; 429c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 430c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 431c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate) 432c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 433c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned long i2c_rate = clk_get_rate(i2c->clk); 434c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned int div; 435c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 436b4a7bd7a386dc6b0bb49cb47614e06e8295d495aaddy ke /* set DIV = DIVH = DIVL 437b4a7bd7a386dc6b0bb49cb47614e06e8295d495aaddy ke * SCL rate = (clk rate) / (8 * (DIVH + 1 + DIVL + 1)) 438b4a7bd7a386dc6b0bb49cb47614e06e8295d495aaddy ke * = (clk rate) / (16 * (DIV + 1)) 439b4a7bd7a386dc6b0bb49cb47614e06e8295d495aaddy ke */ 440b4a7bd7a386dc6b0bb49cb47614e06e8295d495aaddy ke div = DIV_ROUND_UP(i2c_rate, scl_rate * 16) - 1; 441c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 442c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV); 443c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 444c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 445c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz/** 446c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Setup I2C registers for an I2C operation specified by msgs, num. 447c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * 448c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Must be called with i2c->lock held. 449c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * 450c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * @msgs: I2C msgs to process 451c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * @num: Number of msgs 452c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * 453c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * returns: Number of I2C msgs processed or negative in case of error 454c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 455c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num) 456c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 457c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 addr = (msgs[0].addr & 0x7f) << 1; 458c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int ret = 0; 459c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 460c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 461c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * The I2C adapter can issue a small (len < 4) write packet before 462c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * reading. This speeds up SMBus-style register reads. 463c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * The MRXADDR/MRXRADDR hold the slave address and the slave register 464c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * address in this case. 465c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 466c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 467c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (num >= 2 && msgs[0].len < 4 && 468c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) { 469c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 reg_addr = 0; 470c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int i; 471c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 472c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_dbg(i2c->dev, "Combined write/read from addr 0x%x\n", 473c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz addr >> 1); 474c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 475c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Fill MRXRADDR with the register address(es) */ 476c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz for (i = 0; i < msgs[0].len; ++i) { 477c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz reg_addr |= msgs[0].buf[i] << (i * 8); 478c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz reg_addr |= REG_MRXADDR_VALID(i); 479c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 480c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 481c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* msgs[0] is handled by hw. */ 482c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->msg = &msgs[1]; 483c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 484c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->mode = REG_CON_MOD_REGISTER_TX; 485c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 486c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, addr | REG_MRXADDR_VALID(0), REG_MRXADDR); 487c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, reg_addr, REG_MRXRADDR); 488c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 489c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = 2; 490c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } else { 491c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 492c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * We'll have to do it the boring way and process the msgs 493c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * one-by-one. 494c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 495c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 496c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (msgs[0].flags & I2C_M_RD) { 497c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz addr |= 1; /* set read bit */ 498c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 499c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 500c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * We have to transmit the slave addr first. Use 501c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * MOD_REGISTER_TX for that purpose. 502c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 503c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->mode = REG_CON_MOD_REGISTER_TX; 504c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, addr | REG_MRXADDR_VALID(0), 505c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz REG_MRXADDR); 506c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, 0, REG_MRXRADDR); 507c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } else { 508c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->mode = REG_CON_MOD_TX; 509c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 510c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 511c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->msg = &msgs[0]; 512c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 513c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = 1; 514c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 515c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 516c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->addr = msgs[0].addr; 517c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->busy = true; 518c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->state = STATE_START; 519c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->processed = 0; 520c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->error = 0; 521c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 522c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_clean_ipd(i2c); 523c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 524c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return ret; 525c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 526c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 527c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic int rk3x_i2c_xfer(struct i2c_adapter *adap, 528c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct i2c_msg *msgs, int num) 529c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 530c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data; 531c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz unsigned long timeout, flags; 532c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int ret = 0; 533c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int i; 534c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 535c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spin_lock_irqsave(&i2c->lock, flags); 536c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 537c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz clk_enable(i2c->clk); 538c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 539c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* The clock rate might have changed, so setup the divider again */ 540c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_set_scl_rate(i2c, i2c->scl_frequency); 541c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 542c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->is_last_msg = false; 543c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 544c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 545c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Process msgs. We can handle more than one message at once (see 546c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * rk3x_i2c_setup()). 547c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 548c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz for (i = 0; i < num; i += ret) { 549c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = rk3x_i2c_setup(i2c, msgs + i, num - i); 550c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 551c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (ret < 0) { 552c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(i2c->dev, "rk3x_i2c_setup() failed\n"); 553c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 554c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 555c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 556c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i + ret >= num) 557c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->is_last_msg = true; 558c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 559c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spin_unlock_irqrestore(&i2c->lock, flags); 560c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 561c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz rk3x_i2c_start(i2c); 562c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 563c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz timeout = wait_event_timeout(i2c->wait, !i2c->busy, 564c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz msecs_to_jiffies(WAIT_TIMEOUT)); 565c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 566c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spin_lock_irqsave(&i2c->lock, flags); 567c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 568c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (timeout == 0) { 569c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(i2c->dev, "timeout, ipd: 0x%02x, state: %d\n", 570c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_readl(i2c, REG_IPD), i2c->state); 571c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 572c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Force a STOP condition without interrupt */ 573c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, 0, REG_IEN); 574c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_writel(i2c, REG_CON_EN | REG_CON_STOP, REG_CON); 575c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 576c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->state = STATE_IDLE; 577c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 578c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = -ETIMEDOUT; 579c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 580c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 581c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 582c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->error) { 583c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = i2c->error; 584c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz break; 585c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 586c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 587c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 588c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz clk_disable(i2c->clk); 589c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spin_unlock_irqrestore(&i2c->lock, flags); 590c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 591c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return ret; 592c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 593c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 594c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic u32 rk3x_i2c_func(struct i2c_adapter *adap) 595c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 596c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING; 597c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 598c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 599c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic const struct i2c_algorithm rk3x_i2c_algorithm = { 600c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .master_xfer = rk3x_i2c_xfer, 601c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .functionality = rk3x_i2c_func, 602c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 603c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 604c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic struct rk3x_i2c_soc_data soc_data[3] = { 605c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz { .grf_offset = 0x154 }, /* rk3066 */ 606c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz { .grf_offset = 0x0a4 }, /* rk3188 */ 607c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz { .grf_offset = -1 }, /* no I2C switching needed */ 608c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 609c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 610c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic const struct of_device_id rk3x_i2c_match[] = { 611c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz { .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] }, 612c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz { .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] }, 613c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz { .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] }, 614c51bd6acf59f24f2ec4334689329f1741f071621Dan Carpenter {}, 615c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 616c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 617c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic int rk3x_i2c_probe(struct platform_device *pdev) 618c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 619c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct device_node *np = pdev->dev.of_node; 620c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz const struct of_device_id *match; 621c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct rk3x_i2c *i2c; 622c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct resource *mem; 623c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int ret = 0; 624c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int bus_nr; 625c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz u32 value; 626c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz int irq; 627c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 628c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c = devm_kzalloc(&pdev->dev, sizeof(struct rk3x_i2c), GFP_KERNEL); 629c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (!i2c) 630c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return -ENOMEM; 631c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 632c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz match = of_match_node(rk3x_i2c_match, np); 633c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->soc_data = (struct rk3x_i2c_soc_data *)match->data; 634c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 635c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", 636c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz &i2c->scl_frequency)) { 637c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_info(&pdev->dev, "using default SCL frequency: %d\n", 638c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz DEFAULT_SCL_RATE); 639c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->scl_frequency = DEFAULT_SCL_RATE; 640c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 641c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 642c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->scl_frequency == 0 || i2c->scl_frequency > 400 * 1000) { 643c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_warn(&pdev->dev, "invalid SCL frequency specified.\n"); 644c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_warn(&pdev->dev, "using default SCL frequency: %d\n", 645c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz DEFAULT_SCL_RATE); 646c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->scl_frequency = DEFAULT_SCL_RATE; 647c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 648c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 649c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name)); 650c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->adap.owner = THIS_MODULE; 651c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->adap.algo = &rk3x_i2c_algorithm; 652c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->adap.retries = 3; 653c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->adap.dev.of_node = np; 654c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->adap.algo_data = i2c; 655c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->adap.dev.parent = &pdev->dev; 656c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 657c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->dev = &pdev->dev; 658c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 659c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz spin_lock_init(&i2c->lock); 660c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz init_waitqueue_head(&i2c->wait); 661c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 662c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->clk = devm_clk_get(&pdev->dev, NULL); 663c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (IS_ERR(i2c->clk)) { 664c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(&pdev->dev, "cannot get clock\n"); 665c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return PTR_ERR(i2c->clk); 666c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 667c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 668c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 669c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c->regs = devm_ioremap_resource(&pdev->dev, mem); 670c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (IS_ERR(i2c->regs)) 671c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return PTR_ERR(i2c->regs); 672c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 673c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* Try to set the I2C adapter number from dt */ 674c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz bus_nr = of_alias_get_id(np, "i2c"); 675c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 676c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 677c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * Switch to new interface if the SoC also offers the old one. 678c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz * The control bit is located in the GRF register space. 679c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz */ 680c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (i2c->soc_data->grf_offset >= 0) { 681c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct regmap *grf; 682c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 683c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); 684c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (IS_ERR(grf)) { 685c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(&pdev->dev, 686c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz "rk3x-i2c needs 'rockchip,grf' property\n"); 687c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return PTR_ERR(grf); 688c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 689c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 690c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (bus_nr < 0) { 691c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(&pdev->dev, "rk3x-i2c needs i2cX alias"); 692c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return -EINVAL; 693c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 694c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 695c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* 27+i: write mask, 11+i: value */ 696c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz value = BIT(27 + bus_nr) | BIT(11 + bus_nr); 697c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 698c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = regmap_write(grf, i2c->soc_data->grf_offset, value); 699c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (ret != 0) { 700c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(i2c->dev, "Could not write to GRF: %d\n", ret); 701c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return ret; 702c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 703c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 704c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 705c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz /* IRQ setup */ 706c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz irq = platform_get_irq(pdev, 0); 707c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (irq < 0) { 708c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(&pdev->dev, "cannot find rk3x IRQ\n"); 709c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return irq; 710c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 711c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 712c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = devm_request_irq(&pdev->dev, irq, rk3x_i2c_irq, 713c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 0, dev_name(&pdev->dev), i2c); 714c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (ret < 0) { 715c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(&pdev->dev, "cannot request IRQ\n"); 716c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return ret; 717c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 718c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 719c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz platform_set_drvdata(pdev, i2c); 720c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 721c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = clk_prepare(i2c->clk); 722c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (ret < 0) { 723c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(&pdev->dev, "Could not prepare clock\n"); 724c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return ret; 725c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 726c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 727c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz ret = i2c_add_adapter(&i2c->adap); 728c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz if (ret < 0) { 729c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_err(&pdev->dev, "Could not register adapter\n"); 730c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz goto err_clk; 731c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz } 732c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 733c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz dev_info(&pdev->dev, "Initialized RK3xxx I2C bus at %p\n", i2c->regs); 734c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 735c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return 0; 736c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 737c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzerr_clk: 738c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz clk_unprepare(i2c->clk); 739c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return ret; 740c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 741c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 742c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic int rk3x_i2c_remove(struct platform_device *pdev) 743c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz{ 744c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz struct rk3x_i2c *i2c = platform_get_drvdata(pdev); 745c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 746c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz i2c_del_adapter(&i2c->adap); 747c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz clk_unprepare(i2c->clk); 748c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 749c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz return 0; 750c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz} 751c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 752c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzstatic struct platform_driver rk3x_i2c_driver = { 753c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .probe = rk3x_i2c_probe, 754c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .remove = rk3x_i2c_remove, 755c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .driver = { 756c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .owner = THIS_MODULE, 757c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .name = "rk3x-i2c", 758c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz .of_match_table = rk3x_i2c_match, 759c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz }, 760c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz}; 761c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 762c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarzmodule_platform_driver(rk3x_i2c_driver); 763c41aa3ce938b684d853f1004072b6116a41bb1ceMax Schwarz 764c41aa3ce938b684d853f1004072b6116a41bb1ceMax SchwarzMODULE_DESCRIPTION("Rockchip RK3xxx I2C Bus driver"); 765c41aa3ce938b684d853f1004072b6116a41bb1ceMax SchwarzMODULE_AUTHOR("Max Schwarz <max.schwarz@online.de>"); 766c41aa3ce938b684d853f1004072b6116a41bb1ceMax SchwarzMODULE_LICENSE("GPL v2"); 767