alim15x3.c revision 2298169418f43ba5e0919762a4bab95a1227872a
1/* 2 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 4 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer 5 * 6 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) 7 * May be copied or modified under the terms of the GNU General Public License 8 * Copyright (C) 2002 Alan Cox 9 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> 10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 11 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> 12 * 13 * (U)DMA capable version of ali 1533/1543(C), 1535(D) 14 * 15 ********************************************************************** 16 * 9/7/99 --Parts from the above author are included and need to be 17 * converted into standard interface, once I finish the thought. 18 * 19 * Recent changes 20 * Don't use LBA48 mode on ALi <= 0xC4 21 * Don't poke 0x79 with a non ALi northbridge 22 * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) 23 * Allow UDMA6 on revisions > 0xC4 24 * 25 * Documentation 26 * Chipset documentation available under NDA only 27 * 28 */ 29 30#include <linux/module.h> 31#include <linux/types.h> 32#include <linux/kernel.h> 33#include <linux/pci.h> 34#include <linux/ide.h> 35#include <linux/init.h> 36#include <linux/dmi.h> 37 38#include <asm/io.h> 39 40#define DRV_NAME "alim15x3" 41 42/* 43 * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking 44 * (this is DANGEROUS and could result in data corruption). 45 */ 46static int wdc_udma; 47 48module_param(wdc_udma, bool, 0); 49MODULE_PARM_DESC(wdc_udma, 50 "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)"); 51 52/* 53 * ALi devices are not plug in. Otherwise these static values would 54 * need to go. They ought to go away anyway 55 */ 56 57static u8 m5229_revision; 58static u8 chip_is_1543c_e; 59static struct pci_dev *isa_dev; 60 61/** 62 * ali_set_pio_mode - set host controller for PIO mode 63 * @drive: drive 64 * @pio: PIO mode number 65 * 66 * Program the controller for the given PIO mode. 67 */ 68 69static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio) 70{ 71 ide_hwif_t *hwif = drive->hwif; 72 struct pci_dev *dev = to_pci_dev(hwif->dev); 73 struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); 74 int s_time = t->setup, a_time = t->active, c_time = t->cycle; 75 u8 s_clc, a_clc, r_clc; 76 unsigned long flags; 77 int bus_speed = ide_pci_clk ? ide_pci_clk : 33; 78 int port = hwif->channel ? 0x5c : 0x58; 79 int portFIFO = hwif->channel ? 0x55 : 0x54; 80 u8 cd_dma_fifo = 0, unit = drive->dn & 1; 81 82 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8) 83 s_clc = 0; 84 if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8) 85 a_clc = 0; 86 87 if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) { 88 r_clc = 1; 89 } else { 90 if (r_clc >= 16) 91 r_clc = 0; 92 } 93 local_irq_save(flags); 94 95 /* 96 * PIO mode => ATA FIFO on, ATAPI FIFO off 97 */ 98 pci_read_config_byte(dev, portFIFO, &cd_dma_fifo); 99 if (drive->media==ide_disk) { 100 if (unit) { 101 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50); 102 } else { 103 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05); 104 } 105 } else { 106 if (unit) { 107 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F); 108 } else { 109 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0); 110 } 111 } 112 113 pci_write_config_byte(dev, port, s_clc); 114 pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc); 115 local_irq_restore(flags); 116} 117 118/** 119 * ali_udma_filter - compute UDMA mask 120 * @drive: IDE device 121 * 122 * Return available UDMA modes. 123 * 124 * The actual rules for the ALi are: 125 * No UDMA on revisions <= 0x20 126 * Disk only for revisions < 0xC2 127 * Not WDC drives on M1543C-E (?) 128 */ 129 130static u8 ali_udma_filter(ide_drive_t *drive) 131{ 132 if (m5229_revision > 0x20 && m5229_revision < 0xC2) { 133 if (drive->media != ide_disk) 134 return 0; 135 if (wdc_udma == 0 && chip_is_1543c_e && 136 strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) 137 return 0; 138 } 139 140 return drive->hwif->ultra_mask; 141} 142 143/** 144 * ali_set_dma_mode - set host controller for DMA mode 145 * @drive: drive 146 * @speed: DMA mode 147 * 148 * Configure the hardware for the desired IDE transfer mode. 149 */ 150 151static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) 152{ 153 ide_hwif_t *hwif = drive->hwif; 154 struct pci_dev *dev = to_pci_dev(hwif->dev); 155 u8 speed1 = speed; 156 u8 unit = drive->dn & 1; 157 u8 tmpbyte = 0x00; 158 int m5229_udma = (hwif->channel) ? 0x57 : 0x56; 159 160 if (speed == XFER_UDMA_6) 161 speed1 = 0x47; 162 163 if (speed < XFER_UDMA_0) { 164 u8 ultra_enable = (unit) ? 0x7f : 0xf7; 165 /* 166 * clear "ultra enable" bit 167 */ 168 pci_read_config_byte(dev, m5229_udma, &tmpbyte); 169 tmpbyte &= ultra_enable; 170 pci_write_config_byte(dev, m5229_udma, tmpbyte); 171 172 /* 173 * FIXME: Oh, my... DMA timings are never set. 174 */ 175 } else { 176 pci_read_config_byte(dev, m5229_udma, &tmpbyte); 177 tmpbyte &= (0x0f << ((1-unit) << 2)); 178 /* 179 * enable ultra dma and set timing 180 */ 181 tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2)); 182 pci_write_config_byte(dev, m5229_udma, tmpbyte); 183 if (speed >= XFER_UDMA_3) { 184 pci_read_config_byte(dev, 0x4b, &tmpbyte); 185 tmpbyte |= 1; 186 pci_write_config_byte(dev, 0x4b, tmpbyte); 187 } 188 } 189} 190 191/** 192 * ali15x3_dma_setup - begin a DMA phase 193 * @drive: target device 194 * @cmd: command 195 * 196 * Returns 1 if the DMA cannot be performed, zero on success. 197 */ 198 199static int ali15x3_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) 200{ 201 if (m5229_revision < 0xC2 && drive->media != ide_disk) { 202 if (cmd->tf_flags & IDE_TFLAG_WRITE) 203 return 1; /* try PIO instead of DMA */ 204 } 205 return ide_dma_setup(drive, cmd); 206} 207 208/** 209 * init_chipset_ali15x3 - Initialise an ALi IDE controller 210 * @dev: PCI device 211 * 212 * This function initializes the ALI IDE controller and where 213 * appropriate also sets up the 1533 southbridge. 214 */ 215 216static int init_chipset_ali15x3(struct pci_dev *dev) 217{ 218 unsigned long flags; 219 u8 tmpbyte; 220 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); 221 222 m5229_revision = dev->revision; 223 224 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 225 226 local_irq_save(flags); 227 228 if (m5229_revision < 0xC2) { 229 /* 230 * revision 0x20 (1543-E, 1543-F) 231 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) 232 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 233 */ 234 pci_read_config_byte(dev, 0x4b, &tmpbyte); 235 /* 236 * clear bit 7 237 */ 238 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); 239 /* 240 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 241 */ 242 if (m5229_revision >= 0x20 && isa_dev) { 243 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); 244 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; 245 } 246 goto out; 247 } 248 249 /* 250 * 1543C-B?, 1535, 1535D, 1553 251 * Note 1: not all "motherboard" support this detection 252 * Note 2: if no udma 66 device, the detection may "error". 253 * but in this case, we will not set the device to 254 * ultra 66, the detection result is not important 255 */ 256 257 /* 258 * enable "Cable Detection", m5229, 0x4b, bit3 259 */ 260 pci_read_config_byte(dev, 0x4b, &tmpbyte); 261 pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); 262 263 /* 264 * We should only tune the 1533 enable if we are using an ALi 265 * North bridge. We might have no north found on some zany 266 * box without a device at 0:0.0. The ALi bridge will be at 267 * 0:0.0 so if we didn't find one we know what is cooking. 268 */ 269 if (north && north->vendor != PCI_VENDOR_ID_AL) 270 goto out; 271 272 if (m5229_revision < 0xC5 && isa_dev) 273 { 274 /* 275 * set south-bridge's enable bit, m1533, 0x79 276 */ 277 278 pci_read_config_byte(isa_dev, 0x79, &tmpbyte); 279 if (m5229_revision == 0xC2) { 280 /* 281 * 1543C-B0 (m1533, 0x79, bit 2) 282 */ 283 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); 284 } else if (m5229_revision >= 0xC3) { 285 /* 286 * 1553/1535 (m1533, 0x79, bit 1) 287 */ 288 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); 289 } 290 } 291 292out: 293 /* 294 * CD_ROM DMA on (m5229, 0x53, bit0) 295 * Enable this bit even if we want to use PIO. 296 * PIO FIFO off (m5229, 0x53, bit1) 297 * The hardware will use 0x54h and 0x55h to control PIO FIFO. 298 * (Not on later devices it seems) 299 * 300 * 0x53 changes meaning on later revs - we must no touch 301 * bit 1 on them. Need to check if 0x20 is the right break. 302 */ 303 if (m5229_revision >= 0x20) { 304 pci_read_config_byte(dev, 0x53, &tmpbyte); 305 306 if (m5229_revision <= 0x20) 307 tmpbyte = (tmpbyte & (~0x02)) | 0x01; 308 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) 309 tmpbyte |= 0x03; 310 else 311 tmpbyte |= 0x01; 312 313 pci_write_config_byte(dev, 0x53, tmpbyte); 314 } 315 pci_dev_put(north); 316 pci_dev_put(isa_dev); 317 local_irq_restore(flags); 318 return 0; 319} 320 321/* 322 * Cable special cases 323 */ 324 325static const struct dmi_system_id cable_dmi_table[] = { 326 { 327 .ident = "HP Pavilion N5430", 328 .matches = { 329 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 330 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), 331 }, 332 }, 333 { 334 .ident = "Toshiba Satellite S1800-814", 335 .matches = { 336 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 337 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), 338 }, 339 }, 340 { } 341}; 342 343static int ali_cable_override(struct pci_dev *pdev) 344{ 345 /* Fujitsu P2000 */ 346 if (pdev->subsystem_vendor == 0x10CF && 347 pdev->subsystem_device == 0x10AF) 348 return 1; 349 350 /* Mitac 8317 (Winbook-A) and relatives */ 351 if (pdev->subsystem_vendor == 0x1071 && 352 pdev->subsystem_device == 0x8317) 353 return 1; 354 355 /* Systems by DMI */ 356 if (dmi_check_system(cable_dmi_table)) 357 return 1; 358 359 return 0; 360} 361 362/** 363 * ali_cable_detect - cable detection 364 * @hwif: IDE interface 365 * 366 * This checks if the controller and the cable are capable 367 * of UDMA66 transfers. It doesn't check the drives. 368 * But see note 2 below! 369 * 370 * FIXME: frobs bits that are not defined on newer ALi devicea 371 */ 372 373static u8 ali_cable_detect(ide_hwif_t *hwif) 374{ 375 struct pci_dev *dev = to_pci_dev(hwif->dev); 376 unsigned long flags; 377 u8 cbl = ATA_CBL_PATA40, tmpbyte; 378 379 local_irq_save(flags); 380 381 if (m5229_revision >= 0xC2) { 382 /* 383 * m5229 80-pin cable detection (from Host View) 384 * 385 * 0x4a bit0 is 0 => primary channel has 80-pin 386 * 0x4a bit1 is 0 => secondary channel has 80-pin 387 * 388 * Certain laptops use short but suitable cables 389 * and don't implement the detect logic. 390 */ 391 if (ali_cable_override(dev)) 392 cbl = ATA_CBL_PATA40_SHORT; 393 else { 394 pci_read_config_byte(dev, 0x4a, &tmpbyte); 395 if ((tmpbyte & (1 << hwif->channel)) == 0) 396 cbl = ATA_CBL_PATA80; 397 } 398 } 399 400 local_irq_restore(flags); 401 402 return cbl; 403} 404 405#if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) 406/** 407 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff 408 * @hwif: interface to configure 409 * 410 * Obtain the IRQ tables for an ALi based IDE solution on the PC 411 * class platforms. This part of the code isn't applicable to the 412 * Sparc and PowerPC systems. 413 */ 414 415static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) 416{ 417 struct pci_dev *dev = to_pci_dev(hwif->dev); 418 u8 ideic, inmir; 419 s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, 420 1, 11, 0, 12, 0, 14, 0, 15 }; 421 int irq = -1; 422 423 if (dev->device == PCI_DEVICE_ID_AL_M5229) 424 hwif->irq = hwif->channel ? 15 : 14; 425 426 if (isa_dev) { 427 /* 428 * read IDE interface control 429 */ 430 pci_read_config_byte(isa_dev, 0x58, &ideic); 431 432 /* bit0, bit1 */ 433 ideic = ideic & 0x03; 434 435 /* get IRQ for IDE Controller */ 436 if ((hwif->channel && ideic == 0x03) || 437 (!hwif->channel && !ideic)) { 438 /* 439 * get SIRQ1 routing table 440 */ 441 pci_read_config_byte(isa_dev, 0x44, &inmir); 442 inmir = inmir & 0x0f; 443 irq = irq_routing_table[inmir]; 444 } else if (hwif->channel && !(ideic & 0x01)) { 445 /* 446 * get SIRQ2 routing table 447 */ 448 pci_read_config_byte(isa_dev, 0x75, &inmir); 449 inmir = inmir & 0x0f; 450 irq = irq_routing_table[inmir]; 451 } 452 if(irq >= 0) 453 hwif->irq = irq; 454 } 455} 456#else 457#define init_hwif_ali15x3 NULL 458#endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */ 459 460/** 461 * init_dma_ali15x3 - set up DMA on ALi15x3 462 * @hwif: IDE interface 463 * @d: IDE port info 464 * 465 * Set up the DMA functionality on the ALi 15x3. 466 */ 467 468static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, 469 const struct ide_port_info *d) 470{ 471 struct pci_dev *dev = to_pci_dev(hwif->dev); 472 unsigned long base = ide_pci_dma_base(hwif, d); 473 474 if (base == 0) 475 return -1; 476 477 hwif->dma_base = base; 478 479 if (ide_pci_check_simplex(hwif, d) < 0) 480 return -1; 481 482 if (ide_pci_set_master(dev, d->name) < 0) 483 return -1; 484 485 if (!hwif->channel) 486 outb(inb(base + 2) & 0x60, base + 2); 487 488 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", 489 hwif->name, base, base + 7); 490 491 if (ide_allocate_dma_engine(hwif)) 492 return -1; 493 494 return 0; 495} 496 497static const struct ide_port_ops ali_port_ops = { 498 .set_pio_mode = ali_set_pio_mode, 499 .set_dma_mode = ali_set_dma_mode, 500 .udma_filter = ali_udma_filter, 501 .cable_detect = ali_cable_detect, 502}; 503 504static const struct ide_dma_ops ali_dma_ops = { 505 .dma_host_set = ide_dma_host_set, 506 .dma_setup = ali15x3_dma_setup, 507 .dma_exec_cmd = ide_dma_exec_cmd, 508 .dma_start = ide_dma_start, 509 .dma_end = ide_dma_end, 510 .dma_test_irq = ide_dma_test_irq, 511 .dma_lost_irq = ide_dma_lost_irq, 512 .dma_timeout = ide_dma_timeout, 513 .dma_sff_read_status = ide_dma_sff_read_status, 514}; 515 516static const struct ide_port_info ali15x3_chipset __devinitdata = { 517 .name = DRV_NAME, 518 .init_chipset = init_chipset_ali15x3, 519 .init_hwif = init_hwif_ali15x3, 520 .init_dma = init_dma_ali15x3, 521 .port_ops = &ali_port_ops, 522 .dma_ops = &sff_dma_ops, 523 .pio_mask = ATA_PIO5, 524 .swdma_mask = ATA_SWDMA2, 525 .mwdma_mask = ATA_MWDMA2, 526}; 527 528/** 529 * alim15x3_init_one - set up an ALi15x3 IDE controller 530 * @dev: PCI device to set up 531 * 532 * Perform the actual set up for an ALi15x3 that has been found by the 533 * hot plug layer. 534 */ 535 536static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) 537{ 538 struct ide_port_info d = ali15x3_chipset; 539 u8 rev = dev->revision, idx = id->driver_data; 540 541 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ 542 if (rev <= 0xC4) 543 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; 544 545 if (rev >= 0x20) { 546 if (rev == 0x20) 547 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; 548 549 if (rev < 0xC2) 550 d.udma_mask = ATA_UDMA2; 551 else if (rev == 0xC2 || rev == 0xC3) 552 d.udma_mask = ATA_UDMA4; 553 else if (rev == 0xC4) 554 d.udma_mask = ATA_UDMA5; 555 else 556 d.udma_mask = ATA_UDMA6; 557 558 d.dma_ops = &ali_dma_ops; 559 } else { 560 d.host_flags |= IDE_HFLAG_NO_DMA; 561 562 d.mwdma_mask = d.swdma_mask = 0; 563 } 564 565 if (idx == 0) 566 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; 567 568 return ide_pci_init_one(dev, &d, NULL); 569} 570 571 572static const struct pci_device_id alim15x3_pci_tbl[] = { 573 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, 574 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, 575 { 0, }, 576}; 577MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); 578 579static struct pci_driver alim15x3_pci_driver = { 580 .name = "ALI15x3_IDE", 581 .id_table = alim15x3_pci_tbl, 582 .probe = alim15x3_init_one, 583 .remove = ide_pci_remove, 584 .suspend = ide_pci_suspend, 585 .resume = ide_pci_resume, 586}; 587 588static int __init ali15x3_ide_init(void) 589{ 590 return ide_pci_register_driver(&alim15x3_pci_driver); 591} 592 593static void __exit ali15x3_ide_exit(void) 594{ 595 pci_unregister_driver(&alim15x3_pci_driver); 596} 597 598module_init(ali15x3_ide_init); 599module_exit(ali15x3_ide_exit); 600 601MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox"); 602MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); 603MODULE_LICENSE("GPL"); 604