alim15x3.c revision 5740345b877e2c8745cdf454674b45919679f231
1/* 2 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 4 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer 5 * 6 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) 7 * May be copied or modified under the terms of the GNU General Public License 8 * Copyright (C) 2002 Alan Cox 9 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> 10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 11 * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz 12 * 13 * (U)DMA capable version of ali 1533/1543(C), 1535(D) 14 * 15 ********************************************************************** 16 * 9/7/99 --Parts from the above author are included and need to be 17 * converted into standard interface, once I finish the thought. 18 * 19 * Recent changes 20 * Don't use LBA48 mode on ALi <= 0xC4 21 * Don't poke 0x79 with a non ALi northbridge 22 * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) 23 * Allow UDMA6 on revisions > 0xC4 24 * 25 * Documentation 26 * Chipset documentation available under NDA only 27 * 28 */ 29 30#include <linux/module.h> 31#include <linux/types.h> 32#include <linux/kernel.h> 33#include <linux/pci.h> 34#include <linux/ide.h> 35#include <linux/init.h> 36#include <linux/dmi.h> 37 38#include <asm/io.h> 39 40#define DRV_NAME "alim15x3" 41 42/* 43 * ALi devices are not plug in. Otherwise these static values would 44 * need to go. They ought to go away anyway 45 */ 46 47static u8 m5229_revision; 48static u8 chip_is_1543c_e; 49static struct pci_dev *isa_dev; 50 51static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on) 52{ 53 struct pci_dev *pdev = to_pci_dev(hwif->dev); 54 int pio_fifo = 0x54 + hwif->channel; 55 u8 fifo; 56 int shift = 4 * (drive->dn & 1); 57 58 pci_read_config_byte(pdev, pio_fifo, &fifo); 59 fifo &= ~(0x0F << shift); 60 fifo |= (on << shift); 61 pci_write_config_byte(pdev, pio_fifo, fifo); 62} 63 64/** 65 * ali_set_pio_mode - set host controller for PIO mode 66 * @hwif: port 67 * @drive: drive 68 * 69 * Program the controller for the given PIO mode. 70 */ 71 72static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) 73{ 74 struct pci_dev *dev = to_pci_dev(hwif->dev); 75 ide_drive_t *pair = ide_get_pair_dev(drive); 76 int bus_speed = ide_pci_clk ? ide_pci_clk : 33; 77 unsigned long T = 1000000 / bus_speed; /* PCI clock based */ 78 int port = hwif->channel ? 0x5c : 0x58; 79 u8 unit = drive->dn & 1; 80 struct ide_timing t; 81 82 ide_timing_compute(drive, drive->pio_mode, &t, T, 1); 83 if (pair) { 84 struct ide_timing p; 85 86 ide_timing_compute(pair, pair->pio_mode, &p, T, 1); 87 ide_timing_merge(&p, &t, &t, 88 IDE_TIMING_SETUP | IDE_TIMING_8BIT); 89 if (pair->dma_mode) { 90 ide_timing_compute(pair, pair->dma_mode, &p, T, 1); 91 ide_timing_merge(&p, &t, &t, 92 IDE_TIMING_SETUP | IDE_TIMING_8BIT); 93 } 94 } 95 96 t.setup = clamp_val(t.setup, 1, 8) & 7; 97 t.act8b = clamp_val(t.act8b, 1, 8) & 7; 98 t.rec8b = clamp_val(t.rec8b, 1, 16) & 15; 99 t.active = clamp_val(t.active, 1, 8) & 7; 100 t.recover = clamp_val(t.recover, 1, 16) & 15; 101 102 /* 103 * PIO mode => ATA FIFO on, ATAPI FIFO off 104 */ 105 ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00); 106 107 pci_write_config_byte(dev, port, t.setup); 108 pci_write_config_byte(dev, port + 1, (t.act8b << 4) | t.rec8b); 109 pci_write_config_byte(dev, port + unit + 2, 110 (t.active << 4) | t.recover); 111} 112 113/** 114 * ali_udma_filter - compute UDMA mask 115 * @drive: IDE device 116 * 117 * Return available UDMA modes. 118 * 119 * The actual rules for the ALi are: 120 * No UDMA on revisions <= 0x20 121 * Disk only for revisions < 0xC2 122 * Not WDC drives on M1543C-E (?) 123 */ 124 125static u8 ali_udma_filter(ide_drive_t *drive) 126{ 127 if (m5229_revision > 0x20 && m5229_revision < 0xC2) { 128 if (drive->media != ide_disk) 129 return 0; 130 if (chip_is_1543c_e && 131 strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) 132 return 0; 133 } 134 135 return drive->hwif->ultra_mask; 136} 137 138/** 139 * ali_set_dma_mode - set host controller for DMA mode 140 * @hwif: port 141 * @drive: drive 142 * 143 * Configure the hardware for the desired IDE transfer mode. 144 */ 145 146static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) 147{ 148 struct pci_dev *dev = to_pci_dev(hwif->dev); 149 const u8 speed = drive->dma_mode; 150 u8 speed1 = speed; 151 u8 unit = drive->dn & 1; 152 u8 tmpbyte = 0x00; 153 int m5229_udma = (hwif->channel) ? 0x57 : 0x56; 154 155 if (speed == XFER_UDMA_6) 156 speed1 = 0x47; 157 158 if (speed < XFER_UDMA_0) { 159 u8 ultra_enable = (unit) ? 0x7f : 0xf7; 160 /* 161 * clear "ultra enable" bit 162 */ 163 pci_read_config_byte(dev, m5229_udma, &tmpbyte); 164 tmpbyte &= ultra_enable; 165 pci_write_config_byte(dev, m5229_udma, tmpbyte); 166 167 /* 168 * FIXME: Oh, my... DMA timings are never set. 169 */ 170 } else { 171 pci_read_config_byte(dev, m5229_udma, &tmpbyte); 172 tmpbyte &= (0x0f << ((1-unit) << 2)); 173 /* 174 * enable ultra dma and set timing 175 */ 176 tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2)); 177 pci_write_config_byte(dev, m5229_udma, tmpbyte); 178 if (speed >= XFER_UDMA_3) { 179 pci_read_config_byte(dev, 0x4b, &tmpbyte); 180 tmpbyte |= 1; 181 pci_write_config_byte(dev, 0x4b, tmpbyte); 182 } 183 } 184} 185 186/** 187 * ali_dma_check - DMA check 188 * @drive: target device 189 * @cmd: command 190 * 191 * Returns 1 if the DMA cannot be performed, zero on success. 192 */ 193 194static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd) 195{ 196 if (m5229_revision < 0xC2 && drive->media != ide_disk) { 197 if (cmd->tf_flags & IDE_TFLAG_WRITE) 198 return 1; /* try PIO instead of DMA */ 199 } 200 return 0; 201} 202 203/** 204 * init_chipset_ali15x3 - Initialise an ALi IDE controller 205 * @dev: PCI device 206 * 207 * This function initializes the ALI IDE controller and where 208 * appropriate also sets up the 1533 southbridge. 209 */ 210 211static int init_chipset_ali15x3(struct pci_dev *dev) 212{ 213 unsigned long flags; 214 u8 tmpbyte; 215 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); 216 217 m5229_revision = dev->revision; 218 219 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 220 221 local_irq_save(flags); 222 223 if (m5229_revision < 0xC2) { 224 /* 225 * revision 0x20 (1543-E, 1543-F) 226 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) 227 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 228 */ 229 pci_read_config_byte(dev, 0x4b, &tmpbyte); 230 /* 231 * clear bit 7 232 */ 233 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); 234 /* 235 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 236 */ 237 if (m5229_revision >= 0x20 && isa_dev) { 238 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); 239 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; 240 } 241 goto out; 242 } 243 244 /* 245 * 1543C-B?, 1535, 1535D, 1553 246 * Note 1: not all "motherboard" support this detection 247 * Note 2: if no udma 66 device, the detection may "error". 248 * but in this case, we will not set the device to 249 * ultra 66, the detection result is not important 250 */ 251 252 /* 253 * enable "Cable Detection", m5229, 0x4b, bit3 254 */ 255 pci_read_config_byte(dev, 0x4b, &tmpbyte); 256 pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); 257 258 /* 259 * We should only tune the 1533 enable if we are using an ALi 260 * North bridge. We might have no north found on some zany 261 * box without a device at 0:0.0. The ALi bridge will be at 262 * 0:0.0 so if we didn't find one we know what is cooking. 263 */ 264 if (north && north->vendor != PCI_VENDOR_ID_AL) 265 goto out; 266 267 if (m5229_revision < 0xC5 && isa_dev) 268 { 269 /* 270 * set south-bridge's enable bit, m1533, 0x79 271 */ 272 273 pci_read_config_byte(isa_dev, 0x79, &tmpbyte); 274 if (m5229_revision == 0xC2) { 275 /* 276 * 1543C-B0 (m1533, 0x79, bit 2) 277 */ 278 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); 279 } else if (m5229_revision >= 0xC3) { 280 /* 281 * 1553/1535 (m1533, 0x79, bit 1) 282 */ 283 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); 284 } 285 } 286 287out: 288 /* 289 * CD_ROM DMA on (m5229, 0x53, bit0) 290 * Enable this bit even if we want to use PIO. 291 * PIO FIFO off (m5229, 0x53, bit1) 292 * The hardware will use 0x54h and 0x55h to control PIO FIFO. 293 * (Not on later devices it seems) 294 * 295 * 0x53 changes meaning on later revs - we must no touch 296 * bit 1 on them. Need to check if 0x20 is the right break. 297 */ 298 if (m5229_revision >= 0x20) { 299 pci_read_config_byte(dev, 0x53, &tmpbyte); 300 301 if (m5229_revision <= 0x20) 302 tmpbyte = (tmpbyte & (~0x02)) | 0x01; 303 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) 304 tmpbyte |= 0x03; 305 else 306 tmpbyte |= 0x01; 307 308 pci_write_config_byte(dev, 0x53, tmpbyte); 309 } 310 pci_dev_put(north); 311 pci_dev_put(isa_dev); 312 local_irq_restore(flags); 313 return 0; 314} 315 316/* 317 * Cable special cases 318 */ 319 320static const struct dmi_system_id cable_dmi_table[] = { 321 { 322 .ident = "HP Pavilion N5430", 323 .matches = { 324 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 325 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), 326 }, 327 }, 328 { 329 .ident = "Toshiba Satellite S1800-814", 330 .matches = { 331 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 332 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), 333 }, 334 }, 335 { } 336}; 337 338static int ali_cable_override(struct pci_dev *pdev) 339{ 340 /* Fujitsu P2000 */ 341 if (pdev->subsystem_vendor == 0x10CF && 342 pdev->subsystem_device == 0x10AF) 343 return 1; 344 345 /* Mitac 8317 (Winbook-A) and relatives */ 346 if (pdev->subsystem_vendor == 0x1071 && 347 pdev->subsystem_device == 0x8317) 348 return 1; 349 350 /* Systems by DMI */ 351 if (dmi_check_system(cable_dmi_table)) 352 return 1; 353 354 return 0; 355} 356 357/** 358 * ali_cable_detect - cable detection 359 * @hwif: IDE interface 360 * 361 * This checks if the controller and the cable are capable 362 * of UDMA66 transfers. It doesn't check the drives. 363 */ 364 365static u8 ali_cable_detect(ide_hwif_t *hwif) 366{ 367 struct pci_dev *dev = to_pci_dev(hwif->dev); 368 u8 cbl = ATA_CBL_PATA40, tmpbyte; 369 370 if (m5229_revision >= 0xC2) { 371 /* 372 * m5229 80-pin cable detection (from Host View) 373 * 374 * 0x4a bit0 is 0 => primary channel has 80-pin 375 * 0x4a bit1 is 0 => secondary channel has 80-pin 376 * 377 * Certain laptops use short but suitable cables 378 * and don't implement the detect logic. 379 */ 380 if (ali_cable_override(dev)) 381 cbl = ATA_CBL_PATA40_SHORT; 382 else { 383 pci_read_config_byte(dev, 0x4a, &tmpbyte); 384 if ((tmpbyte & (1 << hwif->channel)) == 0) 385 cbl = ATA_CBL_PATA80; 386 } 387 } 388 389 return cbl; 390} 391 392#ifndef CONFIG_SPARC64 393/** 394 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff 395 * @hwif: interface to configure 396 * 397 * Obtain the IRQ tables for an ALi based IDE solution on the PC 398 * class platforms. This part of the code isn't applicable to the 399 * Sparc systems. 400 */ 401 402static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) 403{ 404 u8 ideic, inmir; 405 s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, 406 1, 11, 0, 12, 0, 14, 0, 15 }; 407 int irq = -1; 408 409 if (isa_dev) { 410 /* 411 * read IDE interface control 412 */ 413 pci_read_config_byte(isa_dev, 0x58, &ideic); 414 415 /* bit0, bit1 */ 416 ideic = ideic & 0x03; 417 418 /* get IRQ for IDE Controller */ 419 if ((hwif->channel && ideic == 0x03) || 420 (!hwif->channel && !ideic)) { 421 /* 422 * get SIRQ1 routing table 423 */ 424 pci_read_config_byte(isa_dev, 0x44, &inmir); 425 inmir = inmir & 0x0f; 426 irq = irq_routing_table[inmir]; 427 } else if (hwif->channel && !(ideic & 0x01)) { 428 /* 429 * get SIRQ2 routing table 430 */ 431 pci_read_config_byte(isa_dev, 0x75, &inmir); 432 inmir = inmir & 0x0f; 433 irq = irq_routing_table[inmir]; 434 } 435 if(irq >= 0) 436 hwif->irq = irq; 437 } 438} 439#else 440#define init_hwif_ali15x3 NULL 441#endif /* CONFIG_SPARC64 */ 442 443/** 444 * init_dma_ali15x3 - set up DMA on ALi15x3 445 * @hwif: IDE interface 446 * @d: IDE port info 447 * 448 * Set up the DMA functionality on the ALi 15x3. 449 */ 450 451static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, 452 const struct ide_port_info *d) 453{ 454 struct pci_dev *dev = to_pci_dev(hwif->dev); 455 unsigned long base = ide_pci_dma_base(hwif, d); 456 457 if (base == 0) 458 return -1; 459 460 hwif->dma_base = base; 461 462 if (ide_pci_check_simplex(hwif, d) < 0) 463 return -1; 464 465 if (ide_pci_set_master(dev, d->name) < 0) 466 return -1; 467 468 if (!hwif->channel) 469 outb(inb(base + 2) & 0x60, base + 2); 470 471 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", 472 hwif->name, base, base + 7); 473 474 if (ide_allocate_dma_engine(hwif)) 475 return -1; 476 477 return 0; 478} 479 480static const struct ide_port_ops ali_port_ops = { 481 .set_pio_mode = ali_set_pio_mode, 482 .set_dma_mode = ali_set_dma_mode, 483 .udma_filter = ali_udma_filter, 484 .cable_detect = ali_cable_detect, 485}; 486 487static const struct ide_dma_ops ali_dma_ops = { 488 .dma_host_set = ide_dma_host_set, 489 .dma_setup = ide_dma_setup, 490 .dma_start = ide_dma_start, 491 .dma_end = ide_dma_end, 492 .dma_test_irq = ide_dma_test_irq, 493 .dma_lost_irq = ide_dma_lost_irq, 494 .dma_check = ali_dma_check, 495 .dma_timer_expiry = ide_dma_sff_timer_expiry, 496 .dma_sff_read_status = ide_dma_sff_read_status, 497}; 498 499static const struct ide_port_info ali15x3_chipset __devinitdata = { 500 .name = DRV_NAME, 501 .init_chipset = init_chipset_ali15x3, 502 .init_hwif = init_hwif_ali15x3, 503 .init_dma = init_dma_ali15x3, 504 .port_ops = &ali_port_ops, 505 .dma_ops = &sff_dma_ops, 506 .pio_mask = ATA_PIO5, 507 .swdma_mask = ATA_SWDMA2, 508 .mwdma_mask = ATA_MWDMA2, 509}; 510 511/** 512 * alim15x3_init_one - set up an ALi15x3 IDE controller 513 * @dev: PCI device to set up 514 * 515 * Perform the actual set up for an ALi15x3 that has been found by the 516 * hot plug layer. 517 */ 518 519static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) 520{ 521 struct ide_port_info d = ali15x3_chipset; 522 u8 rev = dev->revision, idx = id->driver_data; 523 524 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ 525 if (rev <= 0xC4) 526 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; 527 528 if (rev >= 0x20) { 529 if (rev == 0x20) 530 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; 531 532 if (rev < 0xC2) 533 d.udma_mask = ATA_UDMA2; 534 else if (rev == 0xC2 || rev == 0xC3) 535 d.udma_mask = ATA_UDMA4; 536 else if (rev == 0xC4) 537 d.udma_mask = ATA_UDMA5; 538 else 539 d.udma_mask = ATA_UDMA6; 540 541 d.dma_ops = &ali_dma_ops; 542 } else { 543 d.host_flags |= IDE_HFLAG_NO_DMA; 544 545 d.mwdma_mask = d.swdma_mask = 0; 546 } 547 548 if (idx == 0) 549 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; 550 551 return ide_pci_init_one(dev, &d, NULL); 552} 553 554 555static const struct pci_device_id alim15x3_pci_tbl[] = { 556 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, 557 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, 558 { 0, }, 559}; 560MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); 561 562static struct pci_driver alim15x3_pci_driver = { 563 .name = "ALI15x3_IDE", 564 .id_table = alim15x3_pci_tbl, 565 .probe = alim15x3_init_one, 566 .remove = ide_pci_remove, 567 .suspend = ide_pci_suspend, 568 .resume = ide_pci_resume, 569}; 570 571static int __init ali15x3_ide_init(void) 572{ 573 return ide_pci_register_driver(&alim15x3_pci_driver); 574} 575 576static void __exit ali15x3_ide_exit(void) 577{ 578 pci_unregister_driver(&alim15x3_pci_driver); 579} 580 581module_init(ali15x3_ide_init); 582module_exit(ali15x3_ide_exit); 583 584MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox, Bartlomiej Zolnierkiewicz"); 585MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); 586MODULE_LICENSE("GPL"); 587