1/* 2 * HDIC HD29L2 DMB-TH demodulator driver 3 * 4 * Copyright (C) 2011 Metropolia University of Applied Sciences, Electria R&D 5 * 6 * Author: Antti Palosaari <crope@iki.fi> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23#include "hd29l2_priv.h" 24 25/* write multiple registers */ 26static int hd29l2_wr_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len) 27{ 28 int ret; 29 u8 buf[2 + len]; 30 struct i2c_msg msg[1] = { 31 { 32 .addr = priv->cfg.i2c_addr, 33 .flags = 0, 34 .len = sizeof(buf), 35 .buf = buf, 36 } 37 }; 38 39 buf[0] = 0x00; 40 buf[1] = reg; 41 memcpy(&buf[2], val, len); 42 43 ret = i2c_transfer(priv->i2c, msg, 1); 44 if (ret == 1) { 45 ret = 0; 46 } else { 47 dev_warn(&priv->i2c->dev, 48 "%s: i2c wr failed=%d reg=%02x len=%d\n", 49 KBUILD_MODNAME, ret, reg, len); 50 ret = -EREMOTEIO; 51 } 52 53 return ret; 54} 55 56/* read multiple registers */ 57static int hd29l2_rd_regs(struct hd29l2_priv *priv, u8 reg, u8 *val, int len) 58{ 59 int ret; 60 u8 buf[2] = { 0x00, reg }; 61 struct i2c_msg msg[2] = { 62 { 63 .addr = priv->cfg.i2c_addr, 64 .flags = 0, 65 .len = 2, 66 .buf = buf, 67 }, { 68 .addr = priv->cfg.i2c_addr, 69 .flags = I2C_M_RD, 70 .len = len, 71 .buf = val, 72 } 73 }; 74 75 ret = i2c_transfer(priv->i2c, msg, 2); 76 if (ret == 2) { 77 ret = 0; 78 } else { 79 dev_warn(&priv->i2c->dev, 80 "%s: i2c rd failed=%d reg=%02x len=%d\n", 81 KBUILD_MODNAME, ret, reg, len); 82 ret = -EREMOTEIO; 83 } 84 85 return ret; 86} 87 88/* write single register */ 89static int hd29l2_wr_reg(struct hd29l2_priv *priv, u8 reg, u8 val) 90{ 91 return hd29l2_wr_regs(priv, reg, &val, 1); 92} 93 94/* read single register */ 95static int hd29l2_rd_reg(struct hd29l2_priv *priv, u8 reg, u8 *val) 96{ 97 return hd29l2_rd_regs(priv, reg, val, 1); 98} 99 100/* write single register with mask */ 101static int hd29l2_wr_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 val, u8 mask) 102{ 103 int ret; 104 u8 tmp; 105 106 /* no need for read if whole reg is written */ 107 if (mask != 0xff) { 108 ret = hd29l2_rd_regs(priv, reg, &tmp, 1); 109 if (ret) 110 return ret; 111 112 val &= mask; 113 tmp &= ~mask; 114 val |= tmp; 115 } 116 117 return hd29l2_wr_regs(priv, reg, &val, 1); 118} 119 120/* read single register with mask */ 121int hd29l2_rd_reg_mask(struct hd29l2_priv *priv, u8 reg, u8 *val, u8 mask) 122{ 123 int ret, i; 124 u8 tmp; 125 126 ret = hd29l2_rd_regs(priv, reg, &tmp, 1); 127 if (ret) 128 return ret; 129 130 tmp &= mask; 131 132 /* find position of the first bit */ 133 for (i = 0; i < 8; i++) { 134 if ((mask >> i) & 0x01) 135 break; 136 } 137 *val = tmp >> i; 138 139 return 0; 140} 141 142static int hd29l2_soft_reset(struct hd29l2_priv *priv) 143{ 144 int ret; 145 u8 tmp; 146 147 ret = hd29l2_rd_reg(priv, 0x26, &tmp); 148 if (ret) 149 goto err; 150 151 ret = hd29l2_wr_reg(priv, 0x26, 0x0d); 152 if (ret) 153 goto err; 154 155 usleep_range(10000, 20000); 156 157 ret = hd29l2_wr_reg(priv, 0x26, tmp); 158 if (ret) 159 goto err; 160 161 return 0; 162err: 163 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 164 return ret; 165} 166 167static int hd29l2_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) 168{ 169 int ret, i; 170 struct hd29l2_priv *priv = fe->demodulator_priv; 171 u8 tmp; 172 173 dev_dbg(&priv->i2c->dev, "%s: enable=%d\n", __func__, enable); 174 175 /* set tuner address for demod */ 176 if (!priv->tuner_i2c_addr_programmed && enable) { 177 /* no need to set tuner address every time, once is enough */ 178 ret = hd29l2_wr_reg(priv, 0x9d, priv->cfg.tuner_i2c_addr << 1); 179 if (ret) 180 goto err; 181 182 priv->tuner_i2c_addr_programmed = true; 183 } 184 185 /* open / close gate */ 186 ret = hd29l2_wr_reg(priv, 0x9f, enable); 187 if (ret) 188 goto err; 189 190 /* wait demod ready */ 191 for (i = 10; i; i--) { 192 ret = hd29l2_rd_reg(priv, 0x9e, &tmp); 193 if (ret) 194 goto err; 195 196 if (tmp == enable) 197 break; 198 199 usleep_range(5000, 10000); 200 } 201 202 dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i); 203 204 return ret; 205err: 206 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 207 return ret; 208} 209 210static int hd29l2_read_status(struct dvb_frontend *fe, fe_status_t *status) 211{ 212 int ret; 213 struct hd29l2_priv *priv = fe->demodulator_priv; 214 u8 buf[2]; 215 216 *status = 0; 217 218 ret = hd29l2_rd_reg(priv, 0x05, &buf[0]); 219 if (ret) 220 goto err; 221 222 if (buf[0] & 0x01) { 223 /* full lock */ 224 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | 225 FE_HAS_SYNC | FE_HAS_LOCK; 226 } else { 227 ret = hd29l2_rd_reg(priv, 0x0d, &buf[1]); 228 if (ret) 229 goto err; 230 231 if ((buf[1] & 0xfe) == 0x78) 232 /* partial lock */ 233 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | 234 FE_HAS_VITERBI | FE_HAS_SYNC; 235 } 236 237 priv->fe_status = *status; 238 239 return 0; 240err: 241 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 242 return ret; 243} 244 245static int hd29l2_read_snr(struct dvb_frontend *fe, u16 *snr) 246{ 247 int ret; 248 struct hd29l2_priv *priv = fe->demodulator_priv; 249 u8 buf[2]; 250 u16 tmp; 251 252 if (!(priv->fe_status & FE_HAS_LOCK)) { 253 *snr = 0; 254 ret = 0; 255 goto err; 256 } 257 258 ret = hd29l2_rd_regs(priv, 0x0b, buf, 2); 259 if (ret) 260 goto err; 261 262 tmp = (buf[0] << 8) | buf[1]; 263 264 /* report SNR in dB * 10 */ 265 #define LOG10_20736_24 72422627 /* log10(20736) << 24 */ 266 if (tmp) 267 *snr = (LOG10_20736_24 - intlog10(tmp)) / ((1 << 24) / 100); 268 else 269 *snr = 0; 270 271 return 0; 272err: 273 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 274 return ret; 275} 276 277static int hd29l2_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 278{ 279 int ret; 280 struct hd29l2_priv *priv = fe->demodulator_priv; 281 u8 buf[2]; 282 u16 tmp; 283 284 *strength = 0; 285 286 ret = hd29l2_rd_regs(priv, 0xd5, buf, 2); 287 if (ret) 288 goto err; 289 290 tmp = buf[0] << 8 | buf[1]; 291 tmp = ~tmp & 0x0fff; 292 293 /* scale value to 0x0000-0xffff from 0x0000-0x0fff */ 294 *strength = tmp * 0xffff / 0x0fff; 295 296 return 0; 297err: 298 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 299 return ret; 300} 301 302static int hd29l2_read_ber(struct dvb_frontend *fe, u32 *ber) 303{ 304 int ret; 305 struct hd29l2_priv *priv = fe->demodulator_priv; 306 u8 buf[2]; 307 308 if (!(priv->fe_status & FE_HAS_SYNC)) { 309 *ber = 0; 310 ret = 0; 311 goto err; 312 } 313 314 ret = hd29l2_rd_regs(priv, 0xd9, buf, 2); 315 if (ret) { 316 *ber = 0; 317 goto err; 318 } 319 320 /* LDPC BER */ 321 *ber = ((buf[0] & 0x0f) << 8) | buf[1]; 322 323 return 0; 324err: 325 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 326 return ret; 327} 328 329static int hd29l2_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 330{ 331 /* no way to read? */ 332 *ucblocks = 0; 333 return 0; 334} 335 336static enum dvbfe_search hd29l2_search(struct dvb_frontend *fe) 337{ 338 int ret, i; 339 struct hd29l2_priv *priv = fe->demodulator_priv; 340 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 341 u8 tmp, buf[3]; 342 u8 modulation, carrier, guard_interval, interleave, code_rate; 343 u64 num64; 344 u32 if_freq, if_ctl; 345 bool auto_mode; 346 347 dev_dbg(&priv->i2c->dev, "%s: delivery_system=%d frequency=%d " \ 348 "bandwidth_hz=%d modulation=%d inversion=%d " \ 349 "fec_inner=%d guard_interval=%d\n", __func__, 350 c->delivery_system, c->frequency, c->bandwidth_hz, 351 c->modulation, c->inversion, c->fec_inner, 352 c->guard_interval); 353 354 /* as for now we detect always params automatically */ 355 auto_mode = true; 356 357 /* program tuner */ 358 if (fe->ops.tuner_ops.set_params) 359 fe->ops.tuner_ops.set_params(fe); 360 361 /* get and program IF */ 362 if (fe->ops.tuner_ops.get_if_frequency) 363 fe->ops.tuner_ops.get_if_frequency(fe, &if_freq); 364 else 365 if_freq = 0; 366 367 if (if_freq) { 368 /* normal IF */ 369 370 /* calc IF control value */ 371 num64 = if_freq; 372 num64 *= 0x800000; 373 num64 = div_u64(num64, HD29L2_XTAL); 374 num64 -= 0x800000; 375 if_ctl = num64; 376 377 tmp = 0xfc; /* tuner type normal */ 378 } else { 379 /* zero IF */ 380 if_ctl = 0; 381 tmp = 0xfe; /* tuner type Zero-IF */ 382 } 383 384 buf[0] = ((if_ctl >> 0) & 0xff); 385 buf[1] = ((if_ctl >> 8) & 0xff); 386 buf[2] = ((if_ctl >> 16) & 0xff); 387 388 /* program IF control */ 389 ret = hd29l2_wr_regs(priv, 0x14, buf, 3); 390 if (ret) 391 goto err; 392 393 /* program tuner type */ 394 ret = hd29l2_wr_reg(priv, 0xab, tmp); 395 if (ret) 396 goto err; 397 398 dev_dbg(&priv->i2c->dev, "%s: if_freq=%d if_ctl=%x\n", 399 __func__, if_freq, if_ctl); 400 401 if (auto_mode) { 402 /* 403 * use auto mode 404 */ 405 406 /* disable quick mode */ 407 ret = hd29l2_wr_reg_mask(priv, 0xac, 0 << 7, 0x80); 408 if (ret) 409 goto err; 410 411 ret = hd29l2_wr_reg_mask(priv, 0x82, 1 << 1, 0x02); 412 if (ret) 413 goto err; 414 415 /* enable auto mode */ 416 ret = hd29l2_wr_reg_mask(priv, 0x7d, 1 << 6, 0x40); 417 if (ret) 418 goto err; 419 420 ret = hd29l2_wr_reg_mask(priv, 0x81, 1 << 3, 0x08); 421 if (ret) 422 goto err; 423 424 /* soft reset */ 425 ret = hd29l2_soft_reset(priv); 426 if (ret) 427 goto err; 428 429 /* detect modulation */ 430 for (i = 30; i; i--) { 431 msleep(100); 432 433 ret = hd29l2_rd_reg(priv, 0x0d, &tmp); 434 if (ret) 435 goto err; 436 437 if ((((tmp & 0xf0) >= 0x10) && 438 ((tmp & 0x0f) == 0x08)) || (tmp >= 0x2c)) 439 break; 440 } 441 442 dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i); 443 444 if (i == 0) 445 /* detection failed */ 446 return DVBFE_ALGO_SEARCH_FAILED; 447 448 /* read modulation */ 449 ret = hd29l2_rd_reg_mask(priv, 0x7d, &modulation, 0x07); 450 if (ret) 451 goto err; 452 } else { 453 /* 454 * use manual mode 455 */ 456 457 modulation = HD29L2_QAM64; 458 carrier = HD29L2_CARRIER_MULTI; 459 guard_interval = HD29L2_PN945; 460 interleave = HD29L2_INTERLEAVER_420; 461 code_rate = HD29L2_CODE_RATE_08; 462 463 tmp = (code_rate << 3) | modulation; 464 ret = hd29l2_wr_reg_mask(priv, 0x7d, tmp, 0x5f); 465 if (ret) 466 goto err; 467 468 tmp = (carrier << 2) | guard_interval; 469 ret = hd29l2_wr_reg_mask(priv, 0x81, tmp, 0x0f); 470 if (ret) 471 goto err; 472 473 tmp = interleave; 474 ret = hd29l2_wr_reg_mask(priv, 0x82, tmp, 0x03); 475 if (ret) 476 goto err; 477 } 478 479 /* ensure modulation validy */ 480 /* 0=QAM4_NR, 1=QAM4, 2=QAM16, 3=QAM32, 4=QAM64 */ 481 if (modulation > (ARRAY_SIZE(reg_mod_vals_tab[0].val) - 1)) { 482 dev_dbg(&priv->i2c->dev, "%s: modulation=%d not valid\n", 483 __func__, modulation); 484 goto err; 485 } 486 487 /* program registers according to modulation */ 488 for (i = 0; i < ARRAY_SIZE(reg_mod_vals_tab); i++) { 489 ret = hd29l2_wr_reg(priv, reg_mod_vals_tab[i].reg, 490 reg_mod_vals_tab[i].val[modulation]); 491 if (ret) 492 goto err; 493 } 494 495 /* read guard interval */ 496 ret = hd29l2_rd_reg_mask(priv, 0x81, &guard_interval, 0x03); 497 if (ret) 498 goto err; 499 500 /* read carrier mode */ 501 ret = hd29l2_rd_reg_mask(priv, 0x81, &carrier, 0x04); 502 if (ret) 503 goto err; 504 505 dev_dbg(&priv->i2c->dev, 506 "%s: modulation=%d guard_interval=%d carrier=%d\n", 507 __func__, modulation, guard_interval, carrier); 508 509 if ((carrier == HD29L2_CARRIER_MULTI) && (modulation == HD29L2_QAM64) && 510 (guard_interval == HD29L2_PN945)) { 511 dev_dbg(&priv->i2c->dev, "%s: C=3780 && QAM64 && PN945\n", 512 __func__); 513 514 ret = hd29l2_wr_reg(priv, 0x42, 0x33); 515 if (ret) 516 goto err; 517 518 ret = hd29l2_wr_reg(priv, 0xdd, 0x01); 519 if (ret) 520 goto err; 521 } 522 523 usleep_range(10000, 20000); 524 525 /* soft reset */ 526 ret = hd29l2_soft_reset(priv); 527 if (ret) 528 goto err; 529 530 /* wait demod lock */ 531 for (i = 30; i; i--) { 532 msleep(100); 533 534 /* read lock bit */ 535 ret = hd29l2_rd_reg_mask(priv, 0x05, &tmp, 0x01); 536 if (ret) 537 goto err; 538 539 if (tmp) 540 break; 541 } 542 543 dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i); 544 545 if (i == 0) 546 return DVBFE_ALGO_SEARCH_AGAIN; 547 548 return DVBFE_ALGO_SEARCH_SUCCESS; 549err: 550 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 551 return DVBFE_ALGO_SEARCH_ERROR; 552} 553 554static int hd29l2_get_frontend_algo(struct dvb_frontend *fe) 555{ 556 return DVBFE_ALGO_CUSTOM; 557} 558 559static int hd29l2_get_frontend(struct dvb_frontend *fe) 560{ 561 int ret; 562 struct hd29l2_priv *priv = fe->demodulator_priv; 563 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 564 u8 buf[3]; 565 u32 if_ctl; 566 char *str_constellation, *str_code_rate, *str_constellation_code_rate, 567 *str_guard_interval, *str_carrier, *str_guard_interval_carrier, 568 *str_interleave, *str_interleave_; 569 570 ret = hd29l2_rd_reg(priv, 0x7d, &buf[0]); 571 if (ret) 572 goto err; 573 574 ret = hd29l2_rd_regs(priv, 0x81, &buf[1], 2); 575 if (ret) 576 goto err; 577 578 /* constellation, 0x7d[2:0] */ 579 switch ((buf[0] >> 0) & 0x07) { 580 case 0: /* QAM4NR */ 581 str_constellation = "QAM4NR"; 582 c->modulation = QAM_AUTO; /* FIXME */ 583 break; 584 case 1: /* QAM4 */ 585 str_constellation = "QAM4"; 586 c->modulation = QPSK; /* FIXME */ 587 break; 588 case 2: 589 str_constellation = "QAM16"; 590 c->modulation = QAM_16; 591 break; 592 case 3: 593 str_constellation = "QAM32"; 594 c->modulation = QAM_32; 595 break; 596 case 4: 597 str_constellation = "QAM64"; 598 c->modulation = QAM_64; 599 break; 600 default: 601 str_constellation = "?"; 602 } 603 604 /* LDPC code rate, 0x7d[4:3] */ 605 switch ((buf[0] >> 3) & 0x03) { 606 case 0: /* 0.4 */ 607 str_code_rate = "0.4"; 608 c->fec_inner = FEC_AUTO; /* FIXME */ 609 break; 610 case 1: /* 0.6 */ 611 str_code_rate = "0.6"; 612 c->fec_inner = FEC_3_5; 613 break; 614 case 2: /* 0.8 */ 615 str_code_rate = "0.8"; 616 c->fec_inner = FEC_4_5; 617 break; 618 default: 619 str_code_rate = "?"; 620 } 621 622 /* constellation & code rate set, 0x7d[6] */ 623 switch ((buf[0] >> 6) & 0x01) { 624 case 0: 625 str_constellation_code_rate = "manual"; 626 break; 627 case 1: 628 str_constellation_code_rate = "auto"; 629 break; 630 default: 631 str_constellation_code_rate = "?"; 632 } 633 634 /* frame header, 0x81[1:0] */ 635 switch ((buf[1] >> 0) & 0x03) { 636 case 0: /* PN945 */ 637 str_guard_interval = "PN945"; 638 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */ 639 break; 640 case 1: /* PN595 */ 641 str_guard_interval = "PN595"; 642 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */ 643 break; 644 case 2: /* PN420 */ 645 str_guard_interval = "PN420"; 646 c->guard_interval = GUARD_INTERVAL_AUTO; /* FIXME */ 647 break; 648 default: 649 str_guard_interval = "?"; 650 } 651 652 /* carrier, 0x81[2] */ 653 switch ((buf[1] >> 2) & 0x01) { 654 case 0: 655 str_carrier = "C=1"; 656 break; 657 case 1: 658 str_carrier = "C=3780"; 659 break; 660 default: 661 str_carrier = "?"; 662 } 663 664 /* frame header & carrier set, 0x81[3] */ 665 switch ((buf[1] >> 3) & 0x01) { 666 case 0: 667 str_guard_interval_carrier = "manual"; 668 break; 669 case 1: 670 str_guard_interval_carrier = "auto"; 671 break; 672 default: 673 str_guard_interval_carrier = "?"; 674 } 675 676 /* interleave, 0x82[0] */ 677 switch ((buf[2] >> 0) & 0x01) { 678 case 0: 679 str_interleave = "M=720"; 680 break; 681 case 1: 682 str_interleave = "M=240"; 683 break; 684 default: 685 str_interleave = "?"; 686 } 687 688 /* interleave set, 0x82[1] */ 689 switch ((buf[2] >> 1) & 0x01) { 690 case 0: 691 str_interleave_ = "manual"; 692 break; 693 case 1: 694 str_interleave_ = "auto"; 695 break; 696 default: 697 str_interleave_ = "?"; 698 } 699 700 /* 701 * We can read out current detected NCO and use that value next 702 * time instead of calculating new value from targed IF. 703 * I think it will not effect receiver sensitivity but gaining lock 704 * after tune could be easier... 705 */ 706 ret = hd29l2_rd_regs(priv, 0xb1, &buf[0], 3); 707 if (ret) 708 goto err; 709 710 if_ctl = (buf[0] << 16) | ((buf[1] - 7) << 8) | buf[2]; 711 712 dev_dbg(&priv->i2c->dev, "%s: %s %s %s | %s %s %s | %s %s | NCO=%06x\n", 713 __func__, str_constellation, str_code_rate, 714 str_constellation_code_rate, str_guard_interval, 715 str_carrier, str_guard_interval_carrier, str_interleave, 716 str_interleave_, if_ctl); 717 return 0; 718err: 719 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 720 return ret; 721} 722 723static int hd29l2_init(struct dvb_frontend *fe) 724{ 725 int ret, i; 726 struct hd29l2_priv *priv = fe->demodulator_priv; 727 u8 tmp; 728 static const struct reg_val tab[] = { 729 { 0x3a, 0x06 }, 730 { 0x3b, 0x03 }, 731 { 0x3c, 0x04 }, 732 { 0xaf, 0x06 }, 733 { 0xb0, 0x1b }, 734 { 0x80, 0x64 }, 735 { 0x10, 0x38 }, 736 }; 737 738 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 739 740 /* reset demod */ 741 /* it is recommended to HW reset chip using RST_N pin */ 742 if (fe->callback) { 743 ret = fe->callback(fe, DVB_FRONTEND_COMPONENT_DEMOD, 0, 0); 744 if (ret) 745 goto err; 746 747 /* reprogramming needed because HW reset clears registers */ 748 priv->tuner_i2c_addr_programmed = false; 749 } 750 751 /* init */ 752 for (i = 0; i < ARRAY_SIZE(tab); i++) { 753 ret = hd29l2_wr_reg(priv, tab[i].reg, tab[i].val); 754 if (ret) 755 goto err; 756 } 757 758 /* TS params */ 759 ret = hd29l2_rd_reg(priv, 0x36, &tmp); 760 if (ret) 761 goto err; 762 763 tmp &= 0x1b; 764 tmp |= priv->cfg.ts_mode; 765 ret = hd29l2_wr_reg(priv, 0x36, tmp); 766 if (ret) 767 goto err; 768 769 ret = hd29l2_rd_reg(priv, 0x31, &tmp); 770 tmp &= 0xef; 771 772 if (!(priv->cfg.ts_mode >> 7)) 773 /* set b4 for serial TS */ 774 tmp |= 0x10; 775 776 ret = hd29l2_wr_reg(priv, 0x31, tmp); 777 if (ret) 778 goto err; 779 780 return ret; 781err: 782 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 783 return ret; 784} 785 786static void hd29l2_release(struct dvb_frontend *fe) 787{ 788 struct hd29l2_priv *priv = fe->demodulator_priv; 789 kfree(priv); 790} 791 792static struct dvb_frontend_ops hd29l2_ops; 793 794struct dvb_frontend *hd29l2_attach(const struct hd29l2_config *config, 795 struct i2c_adapter *i2c) 796{ 797 int ret; 798 struct hd29l2_priv *priv = NULL; 799 u8 tmp; 800 801 /* allocate memory for the internal state */ 802 priv = kzalloc(sizeof(struct hd29l2_priv), GFP_KERNEL); 803 if (priv == NULL) 804 goto err; 805 806 /* setup the state */ 807 priv->i2c = i2c; 808 memcpy(&priv->cfg, config, sizeof(struct hd29l2_config)); 809 810 811 /* check if the demod is there */ 812 ret = hd29l2_rd_reg(priv, 0x00, &tmp); 813 if (ret) 814 goto err; 815 816 /* create dvb_frontend */ 817 memcpy(&priv->fe.ops, &hd29l2_ops, sizeof(struct dvb_frontend_ops)); 818 priv->fe.demodulator_priv = priv; 819 820 return &priv->fe; 821err: 822 kfree(priv); 823 return NULL; 824} 825EXPORT_SYMBOL(hd29l2_attach); 826 827static struct dvb_frontend_ops hd29l2_ops = { 828 .delsys = { SYS_DVBT }, 829 .info = { 830 .name = "HDIC HD29L2 DMB-TH", 831 .frequency_min = 474000000, 832 .frequency_max = 858000000, 833 .frequency_stepsize = 10000, 834 .caps = FE_CAN_FEC_AUTO | 835 FE_CAN_QPSK | 836 FE_CAN_QAM_16 | 837 FE_CAN_QAM_32 | 838 FE_CAN_QAM_64 | 839 FE_CAN_QAM_AUTO | 840 FE_CAN_TRANSMISSION_MODE_AUTO | 841 FE_CAN_BANDWIDTH_AUTO | 842 FE_CAN_GUARD_INTERVAL_AUTO | 843 FE_CAN_HIERARCHY_AUTO | 844 FE_CAN_RECOVER 845 }, 846 847 .release = hd29l2_release, 848 849 .init = hd29l2_init, 850 851 .get_frontend_algo = hd29l2_get_frontend_algo, 852 .search = hd29l2_search, 853 .get_frontend = hd29l2_get_frontend, 854 855 .read_status = hd29l2_read_status, 856 .read_snr = hd29l2_read_snr, 857 .read_signal_strength = hd29l2_read_signal_strength, 858 .read_ber = hd29l2_read_ber, 859 .read_ucblocks = hd29l2_read_ucblocks, 860 861 .i2c_gate_ctrl = hd29l2_i2c_gate_ctrl, 862}; 863 864MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 865MODULE_DESCRIPTION("HDIC HD29L2 DMB-TH demodulator driver"); 866MODULE_LICENSE("GPL"); 867