1/*
2    bt848.h - Bt848 register offsets
3
4    Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
5
6    This program is free software; you can redistribute it and/or modify
7    it under the terms of the GNU General Public License as published by
8    the Free Software Foundation; either version 2 of the License, or
9    (at your option) any later version.
10
11    This program is distributed in the hope that it will be useful,
12    but WITHOUT ANY WARRANTY; without even the implied warranty of
13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14    GNU General Public License for more details.
15
16    You should have received a copy of the GNU General Public License
17    along with this program; if not, write to the Free Software
18    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef _BT848_H_
22#define _BT848_H_
23
24#ifndef PCI_VENDOR_ID_BROOKTREE
25#define PCI_VENDOR_ID_BROOKTREE 0x109e
26#endif
27#ifndef PCI_DEVICE_ID_BT848
28#define PCI_DEVICE_ID_BT848     0x350
29#endif
30#ifndef PCI_DEVICE_ID_BT849
31#define PCI_DEVICE_ID_BT849     0x351
32#endif
33#ifndef PCI_DEVICE_ID_FUSION879
34#define PCI_DEVICE_ID_FUSION879	0x36c
35#endif
36
37#ifndef PCI_DEVICE_ID_BT878
38#define PCI_DEVICE_ID_BT878     0x36e
39#endif
40#ifndef PCI_DEVICE_ID_BT879
41#define PCI_DEVICE_ID_BT879     0x36f
42#endif
43
44/* Brooktree 848 registers */
45
46#define BT848_DSTATUS          0x000
47#define BT848_DSTATUS_PRES     (1<<7)
48#define BT848_DSTATUS_HLOC     (1<<6)
49#define BT848_DSTATUS_FIELD    (1<<5)
50#define BT848_DSTATUS_NUML     (1<<4)
51#define BT848_DSTATUS_CSEL     (1<<3)
52#define BT848_DSTATUS_PLOCK    (1<<2)
53#define BT848_DSTATUS_LOF      (1<<1)
54#define BT848_DSTATUS_COF      (1<<0)
55
56#define BT848_IFORM            0x004
57#define BT848_IFORM_HACTIVE    (1<<7)
58#define BT848_IFORM_MUXSEL     (3<<5)
59#define BT848_IFORM_MUX0       (2<<5)
60#define BT848_IFORM_MUX1       (3<<5)
61#define BT848_IFORM_MUX2       (1<<5)
62#define BT848_IFORM_XTSEL      (3<<3)
63#define BT848_IFORM_XT0        (1<<3)
64#define BT848_IFORM_XT1        (2<<3)
65#define BT848_IFORM_XTAUTO     (3<<3)
66#define BT848_IFORM_XTBOTH     (3<<3)
67#define BT848_IFORM_NTSC       1
68#define BT848_IFORM_NTSC_J     2
69#define BT848_IFORM_PAL_BDGHI  3
70#define BT848_IFORM_PAL_M      4
71#define BT848_IFORM_PAL_N      5
72#define BT848_IFORM_SECAM      6
73#define BT848_IFORM_PAL_NC     7
74#define BT848_IFORM_AUTO       0
75#define BT848_IFORM_NORM       7
76
77#define BT848_TDEC             0x008
78#define BT848_TDEC_DEC_FIELD   (1<<7)
79#define BT848_TDEC_FLDALIGN    (1<<6)
80#define BT848_TDEC_DEC_RAT     (0x1f)
81
82#define BT848_E_CROP           0x00C
83#define BT848_O_CROP           0x08C
84
85#define BT848_E_VDELAY_LO      0x010
86#define BT848_O_VDELAY_LO      0x090
87
88#define BT848_E_VACTIVE_LO     0x014
89#define BT848_O_VACTIVE_LO     0x094
90
91#define BT848_E_HDELAY_LO      0x018
92#define BT848_O_HDELAY_LO      0x098
93
94#define BT848_E_HACTIVE_LO     0x01C
95#define BT848_O_HACTIVE_LO     0x09C
96
97#define BT848_E_HSCALE_HI      0x020
98#define BT848_O_HSCALE_HI      0x0A0
99
100#define BT848_E_HSCALE_LO      0x024
101#define BT848_O_HSCALE_LO      0x0A4
102
103#define BT848_BRIGHT           0x028
104
105#define BT848_E_CONTROL        0x02C
106#define BT848_O_CONTROL        0x0AC
107#define BT848_CONTROL_LNOTCH    (1<<7)
108#define BT848_CONTROL_COMP      (1<<6)
109#define BT848_CONTROL_LDEC      (1<<5)
110#define BT848_CONTROL_CBSENSE   (1<<4)
111#define BT848_CONTROL_CON_MSB   (1<<2)
112#define BT848_CONTROL_SAT_U_MSB (1<<1)
113#define BT848_CONTROL_SAT_V_MSB (1<<0)
114
115#define BT848_CONTRAST_LO      0x030
116#define BT848_SAT_U_LO         0x034
117#define BT848_SAT_V_LO         0x038
118#define BT848_HUE              0x03C
119
120#define BT848_E_SCLOOP         0x040
121#define BT848_O_SCLOOP         0x0C0
122#define BT848_SCLOOP_CAGC       (1<<6)
123#define BT848_SCLOOP_CKILL      (1<<5)
124#define BT848_SCLOOP_HFILT_AUTO (0<<3)
125#define BT848_SCLOOP_HFILT_CIF  (1<<3)
126#define BT848_SCLOOP_HFILT_QCIF (2<<3)
127#define BT848_SCLOOP_HFILT_ICON (3<<3)
128
129#define BT848_SCLOOP_PEAK       (1<<7)
130#define BT848_SCLOOP_HFILT_MINP (1<<3)
131#define BT848_SCLOOP_HFILT_MEDP (2<<3)
132#define BT848_SCLOOP_HFILT_MAXP (3<<3)
133
134
135#define BT848_OFORM            0x048
136#define BT848_OFORM_RANGE      (1<<7)
137#define BT848_OFORM_CORE0      (0<<5)
138#define BT848_OFORM_CORE8      (1<<5)
139#define BT848_OFORM_CORE16     (2<<5)
140#define BT848_OFORM_CORE32     (3<<5)
141
142#define BT848_E_VSCALE_HI      0x04C
143#define BT848_O_VSCALE_HI      0x0CC
144#define BT848_VSCALE_YCOMB     (1<<7)
145#define BT848_VSCALE_COMB      (1<<6)
146#define BT848_VSCALE_INT       (1<<5)
147#define BT848_VSCALE_HI        15
148
149#define BT848_E_VSCALE_LO      0x050
150#define BT848_O_VSCALE_LO      0x0D0
151#define BT848_TEST             0x054
152#define BT848_ADELAY           0x060
153#define BT848_BDELAY           0x064
154
155#define BT848_ADC              0x068
156#define BT848_ADC_RESERVED     (2<<6)
157#define BT848_ADC_SYNC_T       (1<<5)
158#define BT848_ADC_AGC_EN       (1<<4)
159#define BT848_ADC_CLK_SLEEP    (1<<3)
160#define BT848_ADC_Y_SLEEP      (1<<2)
161#define BT848_ADC_C_SLEEP      (1<<1)
162#define BT848_ADC_CRUSH        (1<<0)
163
164#define BT848_WC_UP            0x044
165#define BT848_WC_DOWN          0x078
166
167#define BT848_E_VTC            0x06C
168#define BT848_O_VTC            0x0EC
169#define BT848_VTC_HSFMT        (1<<7)
170#define BT848_VTC_VFILT_2TAP   0
171#define BT848_VTC_VFILT_3TAP   1
172#define BT848_VTC_VFILT_4TAP   2
173#define BT848_VTC_VFILT_5TAP   3
174
175#define BT848_SRESET           0x07C
176
177#define BT848_COLOR_FMT             0x0D4
178#define BT848_COLOR_FMT_O_RGB32     (0<<4)
179#define BT848_COLOR_FMT_O_RGB24     (1<<4)
180#define BT848_COLOR_FMT_O_RGB16     (2<<4)
181#define BT848_COLOR_FMT_O_RGB15     (3<<4)
182#define BT848_COLOR_FMT_O_YUY2      (4<<4)
183#define BT848_COLOR_FMT_O_BtYUV     (5<<4)
184#define BT848_COLOR_FMT_O_Y8        (6<<4)
185#define BT848_COLOR_FMT_O_RGB8      (7<<4)
186#define BT848_COLOR_FMT_O_YCrCb422  (8<<4)
187#define BT848_COLOR_FMT_O_YCrCb411  (9<<4)
188#define BT848_COLOR_FMT_O_RAW       (14<<4)
189#define BT848_COLOR_FMT_E_RGB32     0
190#define BT848_COLOR_FMT_E_RGB24     1
191#define BT848_COLOR_FMT_E_RGB16     2
192#define BT848_COLOR_FMT_E_RGB15     3
193#define BT848_COLOR_FMT_E_YUY2      4
194#define BT848_COLOR_FMT_E_BtYUV     5
195#define BT848_COLOR_FMT_E_Y8        6
196#define BT848_COLOR_FMT_E_RGB8      7
197#define BT848_COLOR_FMT_E_YCrCb422  8
198#define BT848_COLOR_FMT_E_YCrCb411  9
199#define BT848_COLOR_FMT_E_RAW       14
200
201#define BT848_COLOR_FMT_RGB32       0x00
202#define BT848_COLOR_FMT_RGB24       0x11
203#define BT848_COLOR_FMT_RGB16       0x22
204#define BT848_COLOR_FMT_RGB15       0x33
205#define BT848_COLOR_FMT_YUY2        0x44
206#define BT848_COLOR_FMT_BtYUV       0x55
207#define BT848_COLOR_FMT_Y8          0x66
208#define BT848_COLOR_FMT_RGB8        0x77
209#define BT848_COLOR_FMT_YCrCb422    0x88
210#define BT848_COLOR_FMT_YCrCb411    0x99
211#define BT848_COLOR_FMT_RAW         0xee
212
213#define BT848_VTOTAL_LO             0xB0
214#define BT848_VTOTAL_HI             0xB4
215
216#define BT848_COLOR_CTL                0x0D8
217#define BT848_COLOR_CTL_EXT_FRMRATE    (1<<7)
218#define BT848_COLOR_CTL_COLOR_BARS     (1<<6)
219#define BT848_COLOR_CTL_RGB_DED        (1<<5)
220#define BT848_COLOR_CTL_GAMMA          (1<<4)
221#define BT848_COLOR_CTL_WSWAP_ODD      (1<<3)
222#define BT848_COLOR_CTL_WSWAP_EVEN     (1<<2)
223#define BT848_COLOR_CTL_BSWAP_ODD      (1<<1)
224#define BT848_COLOR_CTL_BSWAP_EVEN     (1<<0)
225
226#define BT848_CAP_CTL                  0x0DC
227#define BT848_CAP_CTL_DITH_FRAME       (1<<4)
228#define BT848_CAP_CTL_CAPTURE_VBI_ODD  (1<<3)
229#define BT848_CAP_CTL_CAPTURE_VBI_EVEN (1<<2)
230#define BT848_CAP_CTL_CAPTURE_ODD      (1<<1)
231#define BT848_CAP_CTL_CAPTURE_EVEN     (1<<0)
232
233#define BT848_VBI_PACK_SIZE    0x0E0
234
235#define BT848_VBI_PACK_DEL     0x0E4
236#define BT848_VBI_PACK_DEL_VBI_HDELAY 0xfc
237#define BT848_VBI_PACK_DEL_EXT_FRAME  2
238#define BT848_VBI_PACK_DEL_VBI_PKT_HI 1
239
240
241#define BT848_INT_STAT         0x100
242#define BT848_INT_MASK         0x104
243
244#define BT848_INT_ETBF         (1<<23)
245
246#define BT848_INT_RISCS   (0xf<<28)
247#define BT848_INT_RISC_EN (1<<27)
248#define BT848_INT_RACK    (1<<25)
249#define BT848_INT_FIELD   (1<<24)
250#define BT848_INT_SCERR   (1<<19)
251#define BT848_INT_OCERR   (1<<18)
252#define BT848_INT_PABORT  (1<<17)
253#define BT848_INT_RIPERR  (1<<16)
254#define BT848_INT_PPERR   (1<<15)
255#define BT848_INT_FDSR    (1<<14)
256#define BT848_INT_FTRGT   (1<<13)
257#define BT848_INT_FBUS    (1<<12)
258#define BT848_INT_RISCI   (1<<11)
259#define BT848_INT_GPINT   (1<<9)
260#define BT848_INT_I2CDONE (1<<8)
261#define BT848_INT_VPRES   (1<<5)
262#define BT848_INT_HLOCK   (1<<4)
263#define BT848_INT_OFLOW   (1<<3)
264#define BT848_INT_HSYNC   (1<<2)
265#define BT848_INT_VSYNC   (1<<1)
266#define BT848_INT_FMTCHG  (1<<0)
267
268
269#define BT848_GPIO_DMA_CTL             0x10C
270#define BT848_GPIO_DMA_CTL_GPINTC      (1<<15)
271#define BT848_GPIO_DMA_CTL_GPINTI      (1<<14)
272#define BT848_GPIO_DMA_CTL_GPWEC       (1<<13)
273#define BT848_GPIO_DMA_CTL_GPIOMODE    (3<<11)
274#define BT848_GPIO_DMA_CTL_GPCLKMODE   (1<<10)
275#define BT848_GPIO_DMA_CTL_PLTP23_4    (0<<6)
276#define BT848_GPIO_DMA_CTL_PLTP23_8    (1<<6)
277#define BT848_GPIO_DMA_CTL_PLTP23_16   (2<<6)
278#define BT848_GPIO_DMA_CTL_PLTP23_32   (3<<6)
279#define BT848_GPIO_DMA_CTL_PLTP1_4     (0<<4)
280#define BT848_GPIO_DMA_CTL_PLTP1_8     (1<<4)
281#define BT848_GPIO_DMA_CTL_PLTP1_16    (2<<4)
282#define BT848_GPIO_DMA_CTL_PLTP1_32    (3<<4)
283#define BT848_GPIO_DMA_CTL_PKTP_4      (0<<2)
284#define BT848_GPIO_DMA_CTL_PKTP_8      (1<<2)
285#define BT848_GPIO_DMA_CTL_PKTP_16     (2<<2)
286#define BT848_GPIO_DMA_CTL_PKTP_32     (3<<2)
287#define BT848_GPIO_DMA_CTL_RISC_ENABLE (1<<1)
288#define BT848_GPIO_DMA_CTL_FIFO_ENABLE (1<<0)
289
290#define BT848_I2C              0x110
291#define BT878_I2C_MODE         (1<<7)
292#define BT878_I2C_RATE         (1<<6)
293#define BT878_I2C_NOSTOP       (1<<5)
294#define BT878_I2C_NOSTART      (1<<4)
295#define BT848_I2C_DIV          (0xf<<4)
296#define BT848_I2C_SYNC         (1<<3)
297#define BT848_I2C_W3B	       (1<<2)
298#define BT848_I2C_SCL          (1<<1)
299#define BT848_I2C_SDA          (1<<0)
300
301#define BT848_RISC_STRT_ADD    0x114
302#define BT848_GPIO_OUT_EN      0x118
303#define BT848_GPIO_REG_INP     0x11C
304#define BT848_RISC_COUNT       0x120
305#define BT848_GPIO_DATA        0x200
306
307
308/* Bt848 RISC commands */
309
310/* only for the SYNC RISC command */
311#define BT848_FIFO_STATUS_FM1  0x06
312#define BT848_FIFO_STATUS_FM3  0x0e
313#define BT848_FIFO_STATUS_SOL  0x02
314#define BT848_FIFO_STATUS_EOL4 0x01
315#define BT848_FIFO_STATUS_EOL3 0x0d
316#define BT848_FIFO_STATUS_EOL2 0x09
317#define BT848_FIFO_STATUS_EOL1 0x05
318#define BT848_FIFO_STATUS_VRE  0x04
319#define BT848_FIFO_STATUS_VRO  0x0c
320#define BT848_FIFO_STATUS_PXV  0x00
321
322#define BT848_RISC_RESYNC      (1<<15)
323
324/* WRITE and SKIP */
325/* disable which bytes of each DWORD */
326#define BT848_RISC_BYTE0       (1U<<12)
327#define BT848_RISC_BYTE1       (1U<<13)
328#define BT848_RISC_BYTE2       (1U<<14)
329#define BT848_RISC_BYTE3       (1U<<15)
330#define BT848_RISC_BYTE_ALL    (0x0fU<<12)
331#define BT848_RISC_BYTE_NONE   0
332/* cause RISCI */
333#define BT848_RISC_IRQ         (1U<<24)
334/* RISC command is last one in this line */
335#define BT848_RISC_EOL         (1U<<26)
336/* RISC command is first one in this line */
337#define BT848_RISC_SOL         (1U<<27)
338
339#define BT848_RISC_WRITE       (0x01U<<28)
340#define BT848_RISC_SKIP        (0x02U<<28)
341#define BT848_RISC_WRITEC      (0x05U<<28)
342#define BT848_RISC_JUMP        (0x07U<<28)
343#define BT848_RISC_SYNC        (0x08U<<28)
344
345#define BT848_RISC_WRITE123    (0x09U<<28)
346#define BT848_RISC_SKIP123     (0x0aU<<28)
347#define BT848_RISC_WRITE1S23   (0x0bU<<28)
348
349
350/* Bt848A and higher only !! */
351#define BT848_TGLB             0x080
352#define BT848_TGCTRL           0x084
353#define BT848_FCAP             0x0E8
354#define BT848_PLL_F_LO         0x0F0
355#define BT848_PLL_F_HI         0x0F4
356
357#define BT848_PLL_XCI          0x0F8
358#define BT848_PLL_X            (1<<7)
359#define BT848_PLL_C            (1<<6)
360
361#define BT848_DVSIF            0x0FC
362
363/* Bt878 register */
364
365#define BT878_DEVCTRL 0x40
366#define BT878_EN_TBFX 0x02
367#define BT878_EN_VSFX 0x04
368
369#endif
370