efx.c revision 2ec030144f648a6dd208f95f55ece212f1b72771
1/**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2005-2006 Fen Systems Ltd. 4 * Copyright 2005-2013 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11#include <linux/module.h> 12#include <linux/pci.h> 13#include <linux/netdevice.h> 14#include <linux/etherdevice.h> 15#include <linux/delay.h> 16#include <linux/notifier.h> 17#include <linux/ip.h> 18#include <linux/tcp.h> 19#include <linux/in.h> 20#include <linux/ethtool.h> 21#include <linux/topology.h> 22#include <linux/gfp.h> 23#include <linux/aer.h> 24#include <linux/interrupt.h> 25#include "net_driver.h" 26#include "efx.h" 27#include "nic.h" 28#include "selftest.h" 29 30#include "mcdi.h" 31#include "workarounds.h" 32 33/************************************************************************** 34 * 35 * Type name strings 36 * 37 ************************************************************************** 38 */ 39 40/* Loopback mode names (see LOOPBACK_MODE()) */ 41const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; 42const char *const efx_loopback_mode_names[] = { 43 [LOOPBACK_NONE] = "NONE", 44 [LOOPBACK_DATA] = "DATAPATH", 45 [LOOPBACK_GMAC] = "GMAC", 46 [LOOPBACK_XGMII] = "XGMII", 47 [LOOPBACK_XGXS] = "XGXS", 48 [LOOPBACK_XAUI] = "XAUI", 49 [LOOPBACK_GMII] = "GMII", 50 [LOOPBACK_SGMII] = "SGMII", 51 [LOOPBACK_XGBR] = "XGBR", 52 [LOOPBACK_XFI] = "XFI", 53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR", 54 [LOOPBACK_GMII_FAR] = "GMII_FAR", 55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR", 56 [LOOPBACK_XFI_FAR] = "XFI_FAR", 57 [LOOPBACK_GPHY] = "GPHY", 58 [LOOPBACK_PHYXS] = "PHYXS", 59 [LOOPBACK_PCS] = "PCS", 60 [LOOPBACK_PMAPMD] = "PMA/PMD", 61 [LOOPBACK_XPORT] = "XPORT", 62 [LOOPBACK_XGMII_WS] = "XGMII_WS", 63 [LOOPBACK_XAUI_WS] = "XAUI_WS", 64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", 65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", 66 [LOOPBACK_GMII_WS] = "GMII_WS", 67 [LOOPBACK_XFI_WS] = "XFI_WS", 68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", 69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS", 70}; 71 72const unsigned int efx_reset_type_max = RESET_TYPE_MAX; 73const char *const efx_reset_type_names[] = { 74 [RESET_TYPE_INVISIBLE] = "INVISIBLE", 75 [RESET_TYPE_ALL] = "ALL", 76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 77 [RESET_TYPE_WORLD] = "WORLD", 78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 79 [RESET_TYPE_DISABLE] = "DISABLE", 80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 81 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY", 83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", 84 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 86}; 87 88/* Reset workqueue. If any NIC has a hardware failure then a reset will be 89 * queued onto this work queue. This is not a per-nic work queue, because 90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. 91 */ 92static struct workqueue_struct *reset_workqueue; 93 94/************************************************************************** 95 * 96 * Configurable values 97 * 98 *************************************************************************/ 99 100/* 101 * Use separate channels for TX and RX events 102 * 103 * Set this to 1 to use separate channels for TX and RX. It allows us 104 * to control interrupt affinity separately for TX and RX. 105 * 106 * This is only used in MSI-X interrupt mode 107 */ 108static bool separate_tx_channels; 109module_param(separate_tx_channels, bool, 0444); 110MODULE_PARM_DESC(separate_tx_channels, 111 "Use separate channels for TX and RX"); 112 113/* This is the weight assigned to each of the (per-channel) virtual 114 * NAPI devices. 115 */ 116static int napi_weight = 64; 117 118/* This is the time (in jiffies) between invocations of the hardware 119 * monitor. 120 * On Falcon-based NICs, this will: 121 * - Check the on-board hardware monitor; 122 * - Poll the link state and reconfigure the hardware as necessary. 123 * On Siena-based NICs for power systems with EEH support, this will give EEH a 124 * chance to start. 125 */ 126static unsigned int efx_monitor_interval = 1 * HZ; 127 128/* Initial interrupt moderation settings. They can be modified after 129 * module load with ethtool. 130 * 131 * The default for RX should strike a balance between increasing the 132 * round-trip latency and reducing overhead. 133 */ 134static unsigned int rx_irq_mod_usec = 60; 135 136/* Initial interrupt moderation settings. They can be modified after 137 * module load with ethtool. 138 * 139 * This default is chosen to ensure that a 10G link does not go idle 140 * while a TX queue is stopped after it has become full. A queue is 141 * restarted when it drops below half full. The time this takes (assuming 142 * worst case 3 descriptors per packet and 1024 descriptors) is 143 * 512 / 3 * 1.2 = 205 usec. 144 */ 145static unsigned int tx_irq_mod_usec = 150; 146 147/* This is the first interrupt mode to try out of: 148 * 0 => MSI-X 149 * 1 => MSI 150 * 2 => legacy 151 */ 152static unsigned int interrupt_mode; 153 154/* This is the requested number of CPUs to use for Receive-Side Scaling (RSS), 155 * i.e. the number of CPUs among which we may distribute simultaneous 156 * interrupt handling. 157 * 158 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt. 159 * The default (0) means to assign an interrupt to each core. 160 */ 161static unsigned int rss_cpus; 162module_param(rss_cpus, uint, 0444); 163MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling"); 164 165static bool phy_flash_cfg; 166module_param(phy_flash_cfg, bool, 0644); 167MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); 168 169static unsigned irq_adapt_low_thresh = 8000; 170module_param(irq_adapt_low_thresh, uint, 0644); 171MODULE_PARM_DESC(irq_adapt_low_thresh, 172 "Threshold score for reducing IRQ moderation"); 173 174static unsigned irq_adapt_high_thresh = 16000; 175module_param(irq_adapt_high_thresh, uint, 0644); 176MODULE_PARM_DESC(irq_adapt_high_thresh, 177 "Threshold score for increasing IRQ moderation"); 178 179static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | 180 NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 181 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | 182 NETIF_MSG_TX_ERR | NETIF_MSG_HW); 183module_param(debug, uint, 0); 184MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); 185 186/************************************************************************** 187 * 188 * Utility functions and prototypes 189 * 190 *************************************************************************/ 191 192static int efx_soft_enable_interrupts(struct efx_nic *efx); 193static void efx_soft_disable_interrupts(struct efx_nic *efx); 194static void efx_remove_channel(struct efx_channel *channel); 195static void efx_remove_channels(struct efx_nic *efx); 196static const struct efx_channel_type efx_default_channel_type; 197static void efx_remove_port(struct efx_nic *efx); 198static void efx_init_napi_channel(struct efx_channel *channel); 199static void efx_fini_napi(struct efx_nic *efx); 200static void efx_fini_napi_channel(struct efx_channel *channel); 201static void efx_fini_struct(struct efx_nic *efx); 202static void efx_start_all(struct efx_nic *efx); 203static void efx_stop_all(struct efx_nic *efx); 204 205#define EFX_ASSERT_RESET_SERIALISED(efx) \ 206 do { \ 207 if ((efx->state == STATE_READY) || \ 208 (efx->state == STATE_RECOVERY) || \ 209 (efx->state == STATE_DISABLED)) \ 210 ASSERT_RTNL(); \ 211 } while (0) 212 213static int efx_check_disabled(struct efx_nic *efx) 214{ 215 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { 216 netif_err(efx, drv, efx->net_dev, 217 "device is disabled due to earlier errors\n"); 218 return -EIO; 219 } 220 return 0; 221} 222 223/************************************************************************** 224 * 225 * Event queue processing 226 * 227 *************************************************************************/ 228 229/* Process channel's event queue 230 * 231 * This function is responsible for processing the event queue of a 232 * single channel. The caller must guarantee that this function will 233 * never be concurrently called more than once on the same channel, 234 * though different channels may be being processed concurrently. 235 */ 236static int efx_process_channel(struct efx_channel *channel, int budget) 237{ 238 int spent; 239 240 if (unlikely(!channel->enabled)) 241 return 0; 242 243 spent = efx_nic_process_eventq(channel, budget); 244 if (spent && efx_channel_has_rx_queue(channel)) { 245 struct efx_rx_queue *rx_queue = 246 efx_channel_get_rx_queue(channel); 247 248 efx_rx_flush_packet(channel); 249 efx_fast_push_rx_descriptors(rx_queue); 250 } 251 252 return spent; 253} 254 255/* NAPI poll handler 256 * 257 * NAPI guarantees serialisation of polls of the same device, which 258 * provides the guarantee required by efx_process_channel(). 259 */ 260static int efx_poll(struct napi_struct *napi, int budget) 261{ 262 struct efx_channel *channel = 263 container_of(napi, struct efx_channel, napi_str); 264 struct efx_nic *efx = channel->efx; 265 int spent; 266 267 netif_vdbg(efx, intr, efx->net_dev, 268 "channel %d NAPI poll executing on CPU %d\n", 269 channel->channel, raw_smp_processor_id()); 270 271 spent = efx_process_channel(channel, budget); 272 273 if (spent < budget) { 274 if (efx_channel_has_rx_queue(channel) && 275 efx->irq_rx_adaptive && 276 unlikely(++channel->irq_count == 1000)) { 277 if (unlikely(channel->irq_mod_score < 278 irq_adapt_low_thresh)) { 279 if (channel->irq_moderation > 1) { 280 channel->irq_moderation -= 1; 281 efx->type->push_irq_moderation(channel); 282 } 283 } else if (unlikely(channel->irq_mod_score > 284 irq_adapt_high_thresh)) { 285 if (channel->irq_moderation < 286 efx->irq_rx_moderation) { 287 channel->irq_moderation += 1; 288 efx->type->push_irq_moderation(channel); 289 } 290 } 291 channel->irq_count = 0; 292 channel->irq_mod_score = 0; 293 } 294 295 efx_filter_rfs_expire(channel); 296 297 /* There is no race here; although napi_disable() will 298 * only wait for napi_complete(), this isn't a problem 299 * since efx_nic_eventq_read_ack() will have no effect if 300 * interrupts have already been disabled. 301 */ 302 napi_complete(napi); 303 efx_nic_eventq_read_ack(channel); 304 } 305 306 return spent; 307} 308 309/* Create event queue 310 * Event queue memory allocations are done only once. If the channel 311 * is reset, the memory buffer will be reused; this guards against 312 * errors during channel reset and also simplifies interrupt handling. 313 */ 314static int efx_probe_eventq(struct efx_channel *channel) 315{ 316 struct efx_nic *efx = channel->efx; 317 unsigned long entries; 318 319 netif_dbg(efx, probe, efx->net_dev, 320 "chan %d create event queue\n", channel->channel); 321 322 /* Build an event queue with room for one event per tx and rx buffer, 323 * plus some extra for link state events and MCDI completions. */ 324 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); 325 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE); 326 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1; 327 328 return efx_nic_probe_eventq(channel); 329} 330 331/* Prepare channel's event queue */ 332static int efx_init_eventq(struct efx_channel *channel) 333{ 334 struct efx_nic *efx = channel->efx; 335 int rc; 336 337 EFX_WARN_ON_PARANOID(channel->eventq_init); 338 339 netif_dbg(efx, drv, efx->net_dev, 340 "chan %d init event queue\n", channel->channel); 341 342 rc = efx_nic_init_eventq(channel); 343 if (rc == 0) { 344 efx->type->push_irq_moderation(channel); 345 channel->eventq_read_ptr = 0; 346 channel->eventq_init = true; 347 } 348 return rc; 349} 350 351/* Enable event queue processing and NAPI */ 352static void efx_start_eventq(struct efx_channel *channel) 353{ 354 netif_dbg(channel->efx, ifup, channel->efx->net_dev, 355 "chan %d start event queue\n", channel->channel); 356 357 /* Make sure the NAPI handler sees the enabled flag set */ 358 channel->enabled = true; 359 smp_wmb(); 360 361 napi_enable(&channel->napi_str); 362 efx_nic_eventq_read_ack(channel); 363} 364 365/* Disable event queue processing and NAPI */ 366static void efx_stop_eventq(struct efx_channel *channel) 367{ 368 if (!channel->enabled) 369 return; 370 371 napi_disable(&channel->napi_str); 372 channel->enabled = false; 373} 374 375static void efx_fini_eventq(struct efx_channel *channel) 376{ 377 if (!channel->eventq_init) 378 return; 379 380 netif_dbg(channel->efx, drv, channel->efx->net_dev, 381 "chan %d fini event queue\n", channel->channel); 382 383 efx_nic_fini_eventq(channel); 384 channel->eventq_init = false; 385} 386 387static void efx_remove_eventq(struct efx_channel *channel) 388{ 389 netif_dbg(channel->efx, drv, channel->efx->net_dev, 390 "chan %d remove event queue\n", channel->channel); 391 392 efx_nic_remove_eventq(channel); 393} 394 395/************************************************************************** 396 * 397 * Channel handling 398 * 399 *************************************************************************/ 400 401/* Allocate and initialise a channel structure. */ 402static struct efx_channel * 403efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel) 404{ 405 struct efx_channel *channel; 406 struct efx_rx_queue *rx_queue; 407 struct efx_tx_queue *tx_queue; 408 int j; 409 410 channel = kzalloc(sizeof(*channel), GFP_KERNEL); 411 if (!channel) 412 return NULL; 413 414 channel->efx = efx; 415 channel->channel = i; 416 channel->type = &efx_default_channel_type; 417 418 for (j = 0; j < EFX_TXQ_TYPES; j++) { 419 tx_queue = &channel->tx_queue[j]; 420 tx_queue->efx = efx; 421 tx_queue->queue = i * EFX_TXQ_TYPES + j; 422 tx_queue->channel = channel; 423 } 424 425 rx_queue = &channel->rx_queue; 426 rx_queue->efx = efx; 427 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 428 (unsigned long)rx_queue); 429 430 return channel; 431} 432 433/* Allocate and initialise a channel structure, copying parameters 434 * (but not resources) from an old channel structure. 435 */ 436static struct efx_channel * 437efx_copy_channel(const struct efx_channel *old_channel) 438{ 439 struct efx_channel *channel; 440 struct efx_rx_queue *rx_queue; 441 struct efx_tx_queue *tx_queue; 442 int j; 443 444 channel = kmalloc(sizeof(*channel), GFP_KERNEL); 445 if (!channel) 446 return NULL; 447 448 *channel = *old_channel; 449 450 channel->napi_dev = NULL; 451 memset(&channel->eventq, 0, sizeof(channel->eventq)); 452 453 for (j = 0; j < EFX_TXQ_TYPES; j++) { 454 tx_queue = &channel->tx_queue[j]; 455 if (tx_queue->channel) 456 tx_queue->channel = channel; 457 tx_queue->buffer = NULL; 458 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); 459 } 460 461 rx_queue = &channel->rx_queue; 462 rx_queue->buffer = NULL; 463 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); 464 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 465 (unsigned long)rx_queue); 466 467 return channel; 468} 469 470static int efx_probe_channel(struct efx_channel *channel) 471{ 472 struct efx_tx_queue *tx_queue; 473 struct efx_rx_queue *rx_queue; 474 int rc; 475 476 netif_dbg(channel->efx, probe, channel->efx->net_dev, 477 "creating channel %d\n", channel->channel); 478 479 rc = channel->type->pre_probe(channel); 480 if (rc) 481 goto fail; 482 483 rc = efx_probe_eventq(channel); 484 if (rc) 485 goto fail; 486 487 efx_for_each_channel_tx_queue(tx_queue, channel) { 488 rc = efx_probe_tx_queue(tx_queue); 489 if (rc) 490 goto fail; 491 } 492 493 efx_for_each_channel_rx_queue(rx_queue, channel) { 494 rc = efx_probe_rx_queue(rx_queue); 495 if (rc) 496 goto fail; 497 } 498 499 channel->n_rx_frm_trunc = 0; 500 501 return 0; 502 503fail: 504 efx_remove_channel(channel); 505 return rc; 506} 507 508static void 509efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len) 510{ 511 struct efx_nic *efx = channel->efx; 512 const char *type; 513 int number; 514 515 number = channel->channel; 516 if (efx->tx_channel_offset == 0) { 517 type = ""; 518 } else if (channel->channel < efx->tx_channel_offset) { 519 type = "-rx"; 520 } else { 521 type = "-tx"; 522 number -= efx->tx_channel_offset; 523 } 524 snprintf(buf, len, "%s%s-%d", efx->name, type, number); 525} 526 527static void efx_set_channel_names(struct efx_nic *efx) 528{ 529 struct efx_channel *channel; 530 531 efx_for_each_channel(channel, efx) 532 channel->type->get_name(channel, 533 efx->msi_context[channel->channel].name, 534 sizeof(efx->msi_context[0].name)); 535} 536 537static int efx_probe_channels(struct efx_nic *efx) 538{ 539 struct efx_channel *channel; 540 int rc; 541 542 /* Restart special buffer allocation */ 543 efx->next_buffer_table = 0; 544 545 /* Probe channels in reverse, so that any 'extra' channels 546 * use the start of the buffer table. This allows the traffic 547 * channels to be resized without moving them or wasting the 548 * entries before them. 549 */ 550 efx_for_each_channel_rev(channel, efx) { 551 rc = efx_probe_channel(channel); 552 if (rc) { 553 netif_err(efx, probe, efx->net_dev, 554 "failed to create channel %d\n", 555 channel->channel); 556 goto fail; 557 } 558 } 559 efx_set_channel_names(efx); 560 561 return 0; 562 563fail: 564 efx_remove_channels(efx); 565 return rc; 566} 567 568/* Channels are shutdown and reinitialised whilst the NIC is running 569 * to propagate configuration changes (mtu, checksum offload), or 570 * to clear hardware error conditions 571 */ 572static void efx_start_datapath(struct efx_nic *efx) 573{ 574 bool old_rx_scatter = efx->rx_scatter; 575 struct efx_tx_queue *tx_queue; 576 struct efx_rx_queue *rx_queue; 577 struct efx_channel *channel; 578 size_t rx_buf_len; 579 580 /* Calculate the rx buffer allocation parameters required to 581 * support the current MTU, including padding for header 582 * alignment and overruns. 583 */ 584 efx->rx_dma_len = (efx->rx_prefix_size + 585 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + 586 efx->type->rx_buffer_padding); 587 rx_buf_len = (sizeof(struct efx_rx_page_state) + 588 efx->rx_ip_align + efx->rx_dma_len); 589 if (rx_buf_len <= PAGE_SIZE) { 590 efx->rx_scatter = efx->type->always_rx_scatter; 591 efx->rx_buffer_order = 0; 592 } else if (efx->type->can_rx_scatter) { 593 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES); 594 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 595 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE, 596 EFX_RX_BUF_ALIGNMENT) > 597 PAGE_SIZE); 598 efx->rx_scatter = true; 599 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; 600 efx->rx_buffer_order = 0; 601 } else { 602 efx->rx_scatter = false; 603 efx->rx_buffer_order = get_order(rx_buf_len); 604 } 605 606 efx_rx_config_page_split(efx); 607 if (efx->rx_buffer_order) 608 netif_dbg(efx, drv, efx->net_dev, 609 "RX buf len=%u; page order=%u batch=%u\n", 610 efx->rx_dma_len, efx->rx_buffer_order, 611 efx->rx_pages_per_batch); 612 else 613 netif_dbg(efx, drv, efx->net_dev, 614 "RX buf len=%u step=%u bpp=%u; page batch=%u\n", 615 efx->rx_dma_len, efx->rx_page_buf_step, 616 efx->rx_bufs_per_page, efx->rx_pages_per_batch); 617 618 /* RX filters may also have scatter-enabled flags */ 619 if (efx->rx_scatter != old_rx_scatter) 620 efx->type->filter_update_rx_scatter(efx); 621 622 /* We must keep at least one descriptor in a TX ring empty. 623 * We could avoid this when the queue size does not exactly 624 * match the hardware ring size, but it's not that important. 625 * Therefore we stop the queue when one more skb might fill 626 * the ring completely. We wake it when half way back to 627 * empty. 628 */ 629 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); 630 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; 631 632 /* Initialise the channels */ 633 efx_for_each_channel(channel, efx) { 634 efx_for_each_channel_tx_queue(tx_queue, channel) { 635 efx_init_tx_queue(tx_queue); 636 atomic_inc(&efx->active_queues); 637 } 638 639 efx_for_each_channel_rx_queue(rx_queue, channel) { 640 efx_init_rx_queue(rx_queue); 641 atomic_inc(&efx->active_queues); 642 efx_nic_generate_fill_event(rx_queue); 643 } 644 645 WARN_ON(channel->rx_pkt_n_frags); 646 } 647 648 efx_ptp_start_datapath(efx); 649 650 if (netif_device_present(efx->net_dev)) 651 netif_tx_wake_all_queues(efx->net_dev); 652} 653 654static void efx_stop_datapath(struct efx_nic *efx) 655{ 656 struct efx_channel *channel; 657 struct efx_tx_queue *tx_queue; 658 struct efx_rx_queue *rx_queue; 659 int rc; 660 661 EFX_ASSERT_RESET_SERIALISED(efx); 662 BUG_ON(efx->port_enabled); 663 664 efx_ptp_stop_datapath(efx); 665 666 /* Stop RX refill */ 667 efx_for_each_channel(channel, efx) { 668 efx_for_each_channel_rx_queue(rx_queue, channel) 669 rx_queue->refill_enabled = false; 670 } 671 672 efx_for_each_channel(channel, efx) { 673 /* RX packet processing is pipelined, so wait for the 674 * NAPI handler to complete. At least event queue 0 675 * might be kept active by non-data events, so don't 676 * use napi_synchronize() but actually disable NAPI 677 * temporarily. 678 */ 679 if (efx_channel_has_rx_queue(channel)) { 680 efx_stop_eventq(channel); 681 efx_start_eventq(channel); 682 } 683 } 684 685 rc = efx->type->fini_dmaq(efx); 686 if (rc && EFX_WORKAROUND_7803(efx)) { 687 /* Schedule a reset to recover from the flush failure. The 688 * descriptor caches reference memory we're about to free, 689 * but falcon_reconfigure_mac_wrapper() won't reconnect 690 * the MACs because of the pending reset. 691 */ 692 netif_err(efx, drv, efx->net_dev, 693 "Resetting to recover from flush failure\n"); 694 efx_schedule_reset(efx, RESET_TYPE_ALL); 695 } else if (rc) { 696 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); 697 } else { 698 netif_dbg(efx, drv, efx->net_dev, 699 "successfully flushed all queues\n"); 700 } 701 702 efx_for_each_channel(channel, efx) { 703 efx_for_each_channel_rx_queue(rx_queue, channel) 704 efx_fini_rx_queue(rx_queue); 705 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 706 efx_fini_tx_queue(tx_queue); 707 } 708} 709 710static void efx_remove_channel(struct efx_channel *channel) 711{ 712 struct efx_tx_queue *tx_queue; 713 struct efx_rx_queue *rx_queue; 714 715 netif_dbg(channel->efx, drv, channel->efx->net_dev, 716 "destroy chan %d\n", channel->channel); 717 718 efx_for_each_channel_rx_queue(rx_queue, channel) 719 efx_remove_rx_queue(rx_queue); 720 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 721 efx_remove_tx_queue(tx_queue); 722 efx_remove_eventq(channel); 723 channel->type->post_remove(channel); 724} 725 726static void efx_remove_channels(struct efx_nic *efx) 727{ 728 struct efx_channel *channel; 729 730 efx_for_each_channel(channel, efx) 731 efx_remove_channel(channel); 732} 733 734int 735efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) 736{ 737 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; 738 u32 old_rxq_entries, old_txq_entries; 739 unsigned i, next_buffer_table = 0; 740 int rc, rc2; 741 742 rc = efx_check_disabled(efx); 743 if (rc) 744 return rc; 745 746 /* Not all channels should be reallocated. We must avoid 747 * reallocating their buffer table entries. 748 */ 749 efx_for_each_channel(channel, efx) { 750 struct efx_rx_queue *rx_queue; 751 struct efx_tx_queue *tx_queue; 752 753 if (channel->type->copy) 754 continue; 755 next_buffer_table = max(next_buffer_table, 756 channel->eventq.index + 757 channel->eventq.entries); 758 efx_for_each_channel_rx_queue(rx_queue, channel) 759 next_buffer_table = max(next_buffer_table, 760 rx_queue->rxd.index + 761 rx_queue->rxd.entries); 762 efx_for_each_channel_tx_queue(tx_queue, channel) 763 next_buffer_table = max(next_buffer_table, 764 tx_queue->txd.index + 765 tx_queue->txd.entries); 766 } 767 768 efx_device_detach_sync(efx); 769 efx_stop_all(efx); 770 efx_soft_disable_interrupts(efx); 771 772 /* Clone channels (where possible) */ 773 memset(other_channel, 0, sizeof(other_channel)); 774 for (i = 0; i < efx->n_channels; i++) { 775 channel = efx->channel[i]; 776 if (channel->type->copy) 777 channel = channel->type->copy(channel); 778 if (!channel) { 779 rc = -ENOMEM; 780 goto out; 781 } 782 other_channel[i] = channel; 783 } 784 785 /* Swap entry counts and channel pointers */ 786 old_rxq_entries = efx->rxq_entries; 787 old_txq_entries = efx->txq_entries; 788 efx->rxq_entries = rxq_entries; 789 efx->txq_entries = txq_entries; 790 for (i = 0; i < efx->n_channels; i++) { 791 channel = efx->channel[i]; 792 efx->channel[i] = other_channel[i]; 793 other_channel[i] = channel; 794 } 795 796 /* Restart buffer table allocation */ 797 efx->next_buffer_table = next_buffer_table; 798 799 for (i = 0; i < efx->n_channels; i++) { 800 channel = efx->channel[i]; 801 if (!channel->type->copy) 802 continue; 803 rc = efx_probe_channel(channel); 804 if (rc) 805 goto rollback; 806 efx_init_napi_channel(efx->channel[i]); 807 } 808 809out: 810 /* Destroy unused channel structures */ 811 for (i = 0; i < efx->n_channels; i++) { 812 channel = other_channel[i]; 813 if (channel && channel->type->copy) { 814 efx_fini_napi_channel(channel); 815 efx_remove_channel(channel); 816 kfree(channel); 817 } 818 } 819 820 rc2 = efx_soft_enable_interrupts(efx); 821 if (rc2) { 822 rc = rc ? rc : rc2; 823 netif_err(efx, drv, efx->net_dev, 824 "unable to restart interrupts on channel reallocation\n"); 825 efx_schedule_reset(efx, RESET_TYPE_DISABLE); 826 } else { 827 efx_start_all(efx); 828 netif_device_attach(efx->net_dev); 829 } 830 return rc; 831 832rollback: 833 /* Swap back */ 834 efx->rxq_entries = old_rxq_entries; 835 efx->txq_entries = old_txq_entries; 836 for (i = 0; i < efx->n_channels; i++) { 837 channel = efx->channel[i]; 838 efx->channel[i] = other_channel[i]; 839 other_channel[i] = channel; 840 } 841 goto out; 842} 843 844void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) 845{ 846 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); 847} 848 849static const struct efx_channel_type efx_default_channel_type = { 850 .pre_probe = efx_channel_dummy_op_int, 851 .post_remove = efx_channel_dummy_op_void, 852 .get_name = efx_get_channel_name, 853 .copy = efx_copy_channel, 854 .keep_eventq = false, 855}; 856 857int efx_channel_dummy_op_int(struct efx_channel *channel) 858{ 859 return 0; 860} 861 862void efx_channel_dummy_op_void(struct efx_channel *channel) 863{ 864} 865 866/************************************************************************** 867 * 868 * Port handling 869 * 870 **************************************************************************/ 871 872/* This ensures that the kernel is kept informed (via 873 * netif_carrier_on/off) of the link status, and also maintains the 874 * link status's stop on the port's TX queue. 875 */ 876void efx_link_status_changed(struct efx_nic *efx) 877{ 878 struct efx_link_state *link_state = &efx->link_state; 879 880 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure 881 * that no events are triggered between unregister_netdev() and the 882 * driver unloading. A more general condition is that NETDEV_CHANGE 883 * can only be generated between NETDEV_UP and NETDEV_DOWN */ 884 if (!netif_running(efx->net_dev)) 885 return; 886 887 if (link_state->up != netif_carrier_ok(efx->net_dev)) { 888 efx->n_link_state_changes++; 889 890 if (link_state->up) 891 netif_carrier_on(efx->net_dev); 892 else 893 netif_carrier_off(efx->net_dev); 894 } 895 896 /* Status message for kernel log */ 897 if (link_state->up) 898 netif_info(efx, link, efx->net_dev, 899 "link up at %uMbps %s-duplex (MTU %d)\n", 900 link_state->speed, link_state->fd ? "full" : "half", 901 efx->net_dev->mtu); 902 else 903 netif_info(efx, link, efx->net_dev, "link down\n"); 904} 905 906void efx_link_set_advertising(struct efx_nic *efx, u32 advertising) 907{ 908 efx->link_advertising = advertising; 909 if (advertising) { 910 if (advertising & ADVERTISED_Pause) 911 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX); 912 else 913 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); 914 if (advertising & ADVERTISED_Asym_Pause) 915 efx->wanted_fc ^= EFX_FC_TX; 916 } 917} 918 919void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) 920{ 921 efx->wanted_fc = wanted_fc; 922 if (efx->link_advertising) { 923 if (wanted_fc & EFX_FC_RX) 924 efx->link_advertising |= (ADVERTISED_Pause | 925 ADVERTISED_Asym_Pause); 926 else 927 efx->link_advertising &= ~(ADVERTISED_Pause | 928 ADVERTISED_Asym_Pause); 929 if (wanted_fc & EFX_FC_TX) 930 efx->link_advertising ^= ADVERTISED_Asym_Pause; 931 } 932} 933 934static void efx_fini_port(struct efx_nic *efx); 935 936/* Push loopback/power/transmit disable settings to the PHY, and reconfigure 937 * the MAC appropriately. All other PHY configuration changes are pushed 938 * through phy_op->set_settings(), and pushed asynchronously to the MAC 939 * through efx_monitor(). 940 * 941 * Callers must hold the mac_lock 942 */ 943int __efx_reconfigure_port(struct efx_nic *efx) 944{ 945 enum efx_phy_mode phy_mode; 946 int rc; 947 948 WARN_ON(!mutex_is_locked(&efx->mac_lock)); 949 950 /* Disable PHY transmit in mac level loopbacks */ 951 phy_mode = efx->phy_mode; 952 if (LOOPBACK_INTERNAL(efx)) 953 efx->phy_mode |= PHY_MODE_TX_DISABLED; 954 else 955 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; 956 957 rc = efx->type->reconfigure_port(efx); 958 959 if (rc) 960 efx->phy_mode = phy_mode; 961 962 return rc; 963} 964 965/* Reinitialise the MAC to pick up new PHY settings, even if the port is 966 * disabled. */ 967int efx_reconfigure_port(struct efx_nic *efx) 968{ 969 int rc; 970 971 EFX_ASSERT_RESET_SERIALISED(efx); 972 973 mutex_lock(&efx->mac_lock); 974 rc = __efx_reconfigure_port(efx); 975 mutex_unlock(&efx->mac_lock); 976 977 return rc; 978} 979 980/* Asynchronous work item for changing MAC promiscuity and multicast 981 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current 982 * MAC directly. */ 983static void efx_mac_work(struct work_struct *data) 984{ 985 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); 986 987 mutex_lock(&efx->mac_lock); 988 if (efx->port_enabled) 989 efx->type->reconfigure_mac(efx); 990 mutex_unlock(&efx->mac_lock); 991} 992 993static int efx_probe_port(struct efx_nic *efx) 994{ 995 int rc; 996 997 netif_dbg(efx, probe, efx->net_dev, "create port\n"); 998 999 if (phy_flash_cfg) 1000 efx->phy_mode = PHY_MODE_SPECIAL; 1001 1002 /* Connect up MAC/PHY operations table */ 1003 rc = efx->type->probe_port(efx); 1004 if (rc) 1005 return rc; 1006 1007 /* Initialise MAC address to permanent address */ 1008 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN); 1009 1010 return 0; 1011} 1012 1013static int efx_init_port(struct efx_nic *efx) 1014{ 1015 int rc; 1016 1017 netif_dbg(efx, drv, efx->net_dev, "init port\n"); 1018 1019 mutex_lock(&efx->mac_lock); 1020 1021 rc = efx->phy_op->init(efx); 1022 if (rc) 1023 goto fail1; 1024 1025 efx->port_initialized = true; 1026 1027 /* Reconfigure the MAC before creating dma queues (required for 1028 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */ 1029 efx->type->reconfigure_mac(efx); 1030 1031 /* Ensure the PHY advertises the correct flow control settings */ 1032 rc = efx->phy_op->reconfigure(efx); 1033 if (rc) 1034 goto fail2; 1035 1036 mutex_unlock(&efx->mac_lock); 1037 return 0; 1038 1039fail2: 1040 efx->phy_op->fini(efx); 1041fail1: 1042 mutex_unlock(&efx->mac_lock); 1043 return rc; 1044} 1045 1046static void efx_start_port(struct efx_nic *efx) 1047{ 1048 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); 1049 BUG_ON(efx->port_enabled); 1050 1051 mutex_lock(&efx->mac_lock); 1052 efx->port_enabled = true; 1053 1054 /* efx_mac_work() might have been scheduled after efx_stop_port(), 1055 * and then cancelled by efx_flush_all() */ 1056 efx->type->reconfigure_mac(efx); 1057 1058 mutex_unlock(&efx->mac_lock); 1059} 1060 1061/* Prevent efx_mac_work() and efx_monitor() from working */ 1062static void efx_stop_port(struct efx_nic *efx) 1063{ 1064 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); 1065 1066 mutex_lock(&efx->mac_lock); 1067 efx->port_enabled = false; 1068 mutex_unlock(&efx->mac_lock); 1069 1070 /* Serialise against efx_set_multicast_list() */ 1071 netif_addr_lock_bh(efx->net_dev); 1072 netif_addr_unlock_bh(efx->net_dev); 1073} 1074 1075static void efx_fini_port(struct efx_nic *efx) 1076{ 1077 netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); 1078 1079 if (!efx->port_initialized) 1080 return; 1081 1082 efx->phy_op->fini(efx); 1083 efx->port_initialized = false; 1084 1085 efx->link_state.up = false; 1086 efx_link_status_changed(efx); 1087} 1088 1089static void efx_remove_port(struct efx_nic *efx) 1090{ 1091 netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); 1092 1093 efx->type->remove_port(efx); 1094} 1095 1096/************************************************************************** 1097 * 1098 * NIC handling 1099 * 1100 **************************************************************************/ 1101 1102/* This configures the PCI device to enable I/O and DMA. */ 1103static int efx_init_io(struct efx_nic *efx) 1104{ 1105 struct pci_dev *pci_dev = efx->pci_dev; 1106 dma_addr_t dma_mask = efx->type->max_dma_mask; 1107 unsigned int mem_map_size = efx->type->mem_map_size(efx); 1108 int rc; 1109 1110 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); 1111 1112 rc = pci_enable_device(pci_dev); 1113 if (rc) { 1114 netif_err(efx, probe, efx->net_dev, 1115 "failed to enable PCI device\n"); 1116 goto fail1; 1117 } 1118 1119 pci_set_master(pci_dev); 1120 1121 /* Set the PCI DMA mask. Try all possibilities from our 1122 * genuine mask down to 32 bits, because some architectures 1123 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit 1124 * masks event though they reject 46 bit masks. 1125 */ 1126 while (dma_mask > 0x7fffffffUL) { 1127 if (dma_supported(&pci_dev->dev, dma_mask)) { 1128 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); 1129 if (rc == 0) 1130 break; 1131 } 1132 dma_mask >>= 1; 1133 } 1134 if (rc) { 1135 netif_err(efx, probe, efx->net_dev, 1136 "could not find a suitable DMA mask\n"); 1137 goto fail2; 1138 } 1139 netif_dbg(efx, probe, efx->net_dev, 1140 "using DMA mask %llx\n", (unsigned long long) dma_mask); 1141 1142 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR); 1143 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc"); 1144 if (rc) { 1145 netif_err(efx, probe, efx->net_dev, 1146 "request for memory BAR failed\n"); 1147 rc = -EIO; 1148 goto fail3; 1149 } 1150 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); 1151 if (!efx->membase) { 1152 netif_err(efx, probe, efx->net_dev, 1153 "could not map memory BAR at %llx+%x\n", 1154 (unsigned long long)efx->membase_phys, mem_map_size); 1155 rc = -ENOMEM; 1156 goto fail4; 1157 } 1158 netif_dbg(efx, probe, efx->net_dev, 1159 "memory BAR at %llx+%x (virtual %p)\n", 1160 (unsigned long long)efx->membase_phys, mem_map_size, 1161 efx->membase); 1162 1163 return 0; 1164 1165 fail4: 1166 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1167 fail3: 1168 efx->membase_phys = 0; 1169 fail2: 1170 pci_disable_device(efx->pci_dev); 1171 fail1: 1172 return rc; 1173} 1174 1175static void efx_fini_io(struct efx_nic *efx) 1176{ 1177 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); 1178 1179 if (efx->membase) { 1180 iounmap(efx->membase); 1181 efx->membase = NULL; 1182 } 1183 1184 if (efx->membase_phys) { 1185 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1186 efx->membase_phys = 0; 1187 } 1188 1189 pci_disable_device(efx->pci_dev); 1190} 1191 1192static unsigned int efx_wanted_parallelism(struct efx_nic *efx) 1193{ 1194 cpumask_var_t thread_mask; 1195 unsigned int count; 1196 int cpu; 1197 1198 if (rss_cpus) { 1199 count = rss_cpus; 1200 } else { 1201 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) { 1202 netif_warn(efx, probe, efx->net_dev, 1203 "RSS disabled due to allocation failure\n"); 1204 return 1; 1205 } 1206 1207 count = 0; 1208 for_each_online_cpu(cpu) { 1209 if (!cpumask_test_cpu(cpu, thread_mask)) { 1210 ++count; 1211 cpumask_or(thread_mask, thread_mask, 1212 topology_thread_cpumask(cpu)); 1213 } 1214 } 1215 1216 free_cpumask_var(thread_mask); 1217 } 1218 1219 /* If RSS is requested for the PF *and* VFs then we can't write RSS 1220 * table entries that are inaccessible to VFs 1221 */ 1222 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 && 1223 count > efx_vf_size(efx)) { 1224 netif_warn(efx, probe, efx->net_dev, 1225 "Reducing number of RSS channels from %u to %u for " 1226 "VF support. Increase vf-msix-limit to use more " 1227 "channels on the PF.\n", 1228 count, efx_vf_size(efx)); 1229 count = efx_vf_size(efx); 1230 } 1231 1232 return count; 1233} 1234 1235/* Probe the number and type of interrupts we are able to obtain, and 1236 * the resulting numbers of channels and RX queues. 1237 */ 1238static int efx_probe_interrupts(struct efx_nic *efx) 1239{ 1240 unsigned int extra_channels = 0; 1241 unsigned int i, j; 1242 int rc; 1243 1244 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) 1245 if (efx->extra_channel_type[i]) 1246 ++extra_channels; 1247 1248 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { 1249 struct msix_entry xentries[EFX_MAX_CHANNELS]; 1250 unsigned int n_channels; 1251 1252 n_channels = efx_wanted_parallelism(efx); 1253 if (separate_tx_channels) 1254 n_channels *= 2; 1255 n_channels += extra_channels; 1256 n_channels = min(n_channels, efx->max_channels); 1257 1258 for (i = 0; i < n_channels; i++) 1259 xentries[i].entry = i; 1260 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels); 1261 if (rc > 0) { 1262 netif_err(efx, drv, efx->net_dev, 1263 "WARNING: Insufficient MSI-X vectors" 1264 " available (%d < %u).\n", rc, n_channels); 1265 netif_err(efx, drv, efx->net_dev, 1266 "WARNING: Performance may be reduced.\n"); 1267 EFX_BUG_ON_PARANOID(rc >= n_channels); 1268 n_channels = rc; 1269 rc = pci_enable_msix(efx->pci_dev, xentries, 1270 n_channels); 1271 } 1272 1273 if (rc == 0) { 1274 efx->n_channels = n_channels; 1275 if (n_channels > extra_channels) 1276 n_channels -= extra_channels; 1277 if (separate_tx_channels) { 1278 efx->n_tx_channels = max(n_channels / 2, 1U); 1279 efx->n_rx_channels = max(n_channels - 1280 efx->n_tx_channels, 1281 1U); 1282 } else { 1283 efx->n_tx_channels = n_channels; 1284 efx->n_rx_channels = n_channels; 1285 } 1286 for (i = 0; i < efx->n_channels; i++) 1287 efx_get_channel(efx, i)->irq = 1288 xentries[i].vector; 1289 } else { 1290 /* Fall back to single channel MSI */ 1291 efx->interrupt_mode = EFX_INT_MODE_MSI; 1292 netif_err(efx, drv, efx->net_dev, 1293 "could not enable MSI-X\n"); 1294 } 1295 } 1296 1297 /* Try single interrupt MSI */ 1298 if (efx->interrupt_mode == EFX_INT_MODE_MSI) { 1299 efx->n_channels = 1; 1300 efx->n_rx_channels = 1; 1301 efx->n_tx_channels = 1; 1302 rc = pci_enable_msi(efx->pci_dev); 1303 if (rc == 0) { 1304 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq; 1305 } else { 1306 netif_err(efx, drv, efx->net_dev, 1307 "could not enable MSI\n"); 1308 efx->interrupt_mode = EFX_INT_MODE_LEGACY; 1309 } 1310 } 1311 1312 /* Assume legacy interrupts */ 1313 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) { 1314 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0); 1315 efx->n_rx_channels = 1; 1316 efx->n_tx_channels = 1; 1317 efx->legacy_irq = efx->pci_dev->irq; 1318 } 1319 1320 /* Assign extra channels if possible */ 1321 j = efx->n_channels; 1322 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) { 1323 if (!efx->extra_channel_type[i]) 1324 continue; 1325 if (efx->interrupt_mode != EFX_INT_MODE_MSIX || 1326 efx->n_channels <= extra_channels) { 1327 efx->extra_channel_type[i]->handle_no_channel(efx); 1328 } else { 1329 --j; 1330 efx_get_channel(efx, j)->type = 1331 efx->extra_channel_type[i]; 1332 } 1333 } 1334 1335 /* RSS might be usable on VFs even if it is disabled on the PF */ 1336 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ? 1337 efx->n_rx_channels : efx_vf_size(efx)); 1338 1339 return 0; 1340} 1341 1342static int efx_soft_enable_interrupts(struct efx_nic *efx) 1343{ 1344 struct efx_channel *channel, *end_channel; 1345 int rc; 1346 1347 BUG_ON(efx->state == STATE_DISABLED); 1348 1349 efx->irq_soft_enabled = true; 1350 smp_wmb(); 1351 1352 efx_for_each_channel(channel, efx) { 1353 if (!channel->type->keep_eventq) { 1354 rc = efx_init_eventq(channel); 1355 if (rc) 1356 goto fail; 1357 } 1358 efx_start_eventq(channel); 1359 } 1360 1361 efx_mcdi_mode_event(efx); 1362 1363 return 0; 1364fail: 1365 end_channel = channel; 1366 efx_for_each_channel(channel, efx) { 1367 if (channel == end_channel) 1368 break; 1369 efx_stop_eventq(channel); 1370 if (!channel->type->keep_eventq) 1371 efx_fini_eventq(channel); 1372 } 1373 1374 return rc; 1375} 1376 1377static void efx_soft_disable_interrupts(struct efx_nic *efx) 1378{ 1379 struct efx_channel *channel; 1380 1381 if (efx->state == STATE_DISABLED) 1382 return; 1383 1384 efx_mcdi_mode_poll(efx); 1385 1386 efx->irq_soft_enabled = false; 1387 smp_wmb(); 1388 1389 if (efx->legacy_irq) 1390 synchronize_irq(efx->legacy_irq); 1391 1392 efx_for_each_channel(channel, efx) { 1393 if (channel->irq) 1394 synchronize_irq(channel->irq); 1395 1396 efx_stop_eventq(channel); 1397 if (!channel->type->keep_eventq) 1398 efx_fini_eventq(channel); 1399 } 1400 1401 /* Flush the asynchronous MCDI request queue */ 1402 efx_mcdi_flush_async(efx); 1403} 1404 1405static int efx_enable_interrupts(struct efx_nic *efx) 1406{ 1407 struct efx_channel *channel, *end_channel; 1408 int rc; 1409 1410 BUG_ON(efx->state == STATE_DISABLED); 1411 1412 if (efx->eeh_disabled_legacy_irq) { 1413 enable_irq(efx->legacy_irq); 1414 efx->eeh_disabled_legacy_irq = false; 1415 } 1416 1417 efx->type->irq_enable_master(efx); 1418 1419 efx_for_each_channel(channel, efx) { 1420 if (channel->type->keep_eventq) { 1421 rc = efx_init_eventq(channel); 1422 if (rc) 1423 goto fail; 1424 } 1425 } 1426 1427 rc = efx_soft_enable_interrupts(efx); 1428 if (rc) 1429 goto fail; 1430 1431 return 0; 1432 1433fail: 1434 end_channel = channel; 1435 efx_for_each_channel(channel, efx) { 1436 if (channel == end_channel) 1437 break; 1438 if (channel->type->keep_eventq) 1439 efx_fini_eventq(channel); 1440 } 1441 1442 efx->type->irq_disable_non_ev(efx); 1443 1444 return rc; 1445} 1446 1447static void efx_disable_interrupts(struct efx_nic *efx) 1448{ 1449 struct efx_channel *channel; 1450 1451 efx_soft_disable_interrupts(efx); 1452 1453 efx_for_each_channel(channel, efx) { 1454 if (channel->type->keep_eventq) 1455 efx_fini_eventq(channel); 1456 } 1457 1458 efx->type->irq_disable_non_ev(efx); 1459} 1460 1461static void efx_remove_interrupts(struct efx_nic *efx) 1462{ 1463 struct efx_channel *channel; 1464 1465 /* Remove MSI/MSI-X interrupts */ 1466 efx_for_each_channel(channel, efx) 1467 channel->irq = 0; 1468 pci_disable_msi(efx->pci_dev); 1469 pci_disable_msix(efx->pci_dev); 1470 1471 /* Remove legacy interrupt */ 1472 efx->legacy_irq = 0; 1473} 1474 1475static void efx_set_channels(struct efx_nic *efx) 1476{ 1477 struct efx_channel *channel; 1478 struct efx_tx_queue *tx_queue; 1479 1480 efx->tx_channel_offset = 1481 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0; 1482 1483 /* We need to mark which channels really have RX and TX 1484 * queues, and adjust the TX queue numbers if we have separate 1485 * RX-only and TX-only channels. 1486 */ 1487 efx_for_each_channel(channel, efx) { 1488 if (channel->channel < efx->n_rx_channels) 1489 channel->rx_queue.core_index = channel->channel; 1490 else 1491 channel->rx_queue.core_index = -1; 1492 1493 efx_for_each_channel_tx_queue(tx_queue, channel) 1494 tx_queue->queue -= (efx->tx_channel_offset * 1495 EFX_TXQ_TYPES); 1496 } 1497} 1498 1499static int efx_probe_nic(struct efx_nic *efx) 1500{ 1501 size_t i; 1502 int rc; 1503 1504 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); 1505 1506 /* Carry out hardware-type specific initialisation */ 1507 rc = efx->type->probe(efx); 1508 if (rc) 1509 return rc; 1510 1511 /* Determine the number of channels and queues by trying to hook 1512 * in MSI-X interrupts. */ 1513 rc = efx_probe_interrupts(efx); 1514 if (rc) 1515 goto fail1; 1516 1517 rc = efx->type->dimension_resources(efx); 1518 if (rc) 1519 goto fail2; 1520 1521 if (efx->n_channels > 1) 1522 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key)); 1523 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++) 1524 efx->rx_indir_table[i] = 1525 ethtool_rxfh_indir_default(i, efx->rss_spread); 1526 1527 efx_set_channels(efx); 1528 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); 1529 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); 1530 1531 /* Initialise the interrupt moderation settings */ 1532 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true, 1533 true); 1534 1535 return 0; 1536 1537fail2: 1538 efx_remove_interrupts(efx); 1539fail1: 1540 efx->type->remove(efx); 1541 return rc; 1542} 1543 1544static void efx_remove_nic(struct efx_nic *efx) 1545{ 1546 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); 1547 1548 efx_remove_interrupts(efx); 1549 efx->type->remove(efx); 1550} 1551 1552static int efx_probe_filters(struct efx_nic *efx) 1553{ 1554 int rc; 1555 1556 spin_lock_init(&efx->filter_lock); 1557 1558 rc = efx->type->filter_table_probe(efx); 1559 if (rc) 1560 return rc; 1561 1562#ifdef CONFIG_RFS_ACCEL 1563 if (efx->type->offload_features & NETIF_F_NTUPLE) { 1564 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters, 1565 sizeof(*efx->rps_flow_id), 1566 GFP_KERNEL); 1567 if (!efx->rps_flow_id) { 1568 efx->type->filter_table_remove(efx); 1569 return -ENOMEM; 1570 } 1571 } 1572#endif 1573 1574 return 0; 1575} 1576 1577static void efx_remove_filters(struct efx_nic *efx) 1578{ 1579#ifdef CONFIG_RFS_ACCEL 1580 kfree(efx->rps_flow_id); 1581#endif 1582 efx->type->filter_table_remove(efx); 1583} 1584 1585static void efx_restore_filters(struct efx_nic *efx) 1586{ 1587 efx->type->filter_table_restore(efx); 1588} 1589 1590/************************************************************************** 1591 * 1592 * NIC startup/shutdown 1593 * 1594 *************************************************************************/ 1595 1596static int efx_probe_all(struct efx_nic *efx) 1597{ 1598 int rc; 1599 1600 rc = efx_probe_nic(efx); 1601 if (rc) { 1602 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); 1603 goto fail1; 1604 } 1605 1606 rc = efx_probe_port(efx); 1607 if (rc) { 1608 netif_err(efx, probe, efx->net_dev, "failed to create port\n"); 1609 goto fail2; 1610 } 1611 1612 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT); 1613 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) { 1614 rc = -EINVAL; 1615 goto fail3; 1616 } 1617 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; 1618 1619 rc = efx_probe_filters(efx); 1620 if (rc) { 1621 netif_err(efx, probe, efx->net_dev, 1622 "failed to create filter tables\n"); 1623 goto fail3; 1624 } 1625 1626 rc = efx_probe_channels(efx); 1627 if (rc) 1628 goto fail4; 1629 1630 return 0; 1631 1632 fail4: 1633 efx_remove_filters(efx); 1634 fail3: 1635 efx_remove_port(efx); 1636 fail2: 1637 efx_remove_nic(efx); 1638 fail1: 1639 return rc; 1640} 1641 1642/* If the interface is supposed to be running but is not, start 1643 * the hardware and software data path, regular activity for the port 1644 * (MAC statistics, link polling, etc.) and schedule the port to be 1645 * reconfigured. Interrupts must already be enabled. This function 1646 * is safe to call multiple times, so long as the NIC is not disabled. 1647 * Requires the RTNL lock. 1648 */ 1649static void efx_start_all(struct efx_nic *efx) 1650{ 1651 EFX_ASSERT_RESET_SERIALISED(efx); 1652 BUG_ON(efx->state == STATE_DISABLED); 1653 1654 /* Check that it is appropriate to restart the interface. All 1655 * of these flags are safe to read under just the rtnl lock */ 1656 if (efx->port_enabled || !netif_running(efx->net_dev)) 1657 return; 1658 1659 efx_start_port(efx); 1660 efx_start_datapath(efx); 1661 1662 /* Start the hardware monitor if there is one */ 1663 if (efx->type->monitor != NULL) 1664 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1665 efx_monitor_interval); 1666 1667 /* If link state detection is normally event-driven, we have 1668 * to poll now because we could have missed a change 1669 */ 1670 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) { 1671 mutex_lock(&efx->mac_lock); 1672 if (efx->phy_op->poll(efx)) 1673 efx_link_status_changed(efx); 1674 mutex_unlock(&efx->mac_lock); 1675 } 1676 1677 efx->type->start_stats(efx); 1678} 1679 1680/* Flush all delayed work. Should only be called when no more delayed work 1681 * will be scheduled. This doesn't flush pending online resets (efx_reset), 1682 * since we're holding the rtnl_lock at this point. */ 1683static void efx_flush_all(struct efx_nic *efx) 1684{ 1685 /* Make sure the hardware monitor and event self-test are stopped */ 1686 cancel_delayed_work_sync(&efx->monitor_work); 1687 efx_selftest_async_cancel(efx); 1688 /* Stop scheduled port reconfigurations */ 1689 cancel_work_sync(&efx->mac_work); 1690} 1691 1692/* Quiesce the hardware and software data path, and regular activity 1693 * for the port without bringing the link down. Safe to call multiple 1694 * times with the NIC in almost any state, but interrupts should be 1695 * enabled. Requires the RTNL lock. 1696 */ 1697static void efx_stop_all(struct efx_nic *efx) 1698{ 1699 EFX_ASSERT_RESET_SERIALISED(efx); 1700 1701 /* port_enabled can be read safely under the rtnl lock */ 1702 if (!efx->port_enabled) 1703 return; 1704 1705 efx->type->stop_stats(efx); 1706 efx_stop_port(efx); 1707 1708 /* Flush efx_mac_work(), refill_workqueue, monitor_work */ 1709 efx_flush_all(efx); 1710 1711 /* Stop the kernel transmit interface. This is only valid if 1712 * the device is stopped or detached; otherwise the watchdog 1713 * may fire immediately. 1714 */ 1715 WARN_ON(netif_running(efx->net_dev) && 1716 netif_device_present(efx->net_dev)); 1717 netif_tx_disable(efx->net_dev); 1718 1719 efx_stop_datapath(efx); 1720} 1721 1722static void efx_remove_all(struct efx_nic *efx) 1723{ 1724 efx_remove_channels(efx); 1725 efx_remove_filters(efx); 1726 efx_remove_port(efx); 1727 efx_remove_nic(efx); 1728} 1729 1730/************************************************************************** 1731 * 1732 * Interrupt moderation 1733 * 1734 **************************************************************************/ 1735 1736static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns) 1737{ 1738 if (usecs == 0) 1739 return 0; 1740 if (usecs * 1000 < quantum_ns) 1741 return 1; /* never round down to 0 */ 1742 return usecs * 1000 / quantum_ns; 1743} 1744 1745/* Set interrupt moderation parameters */ 1746int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, 1747 unsigned int rx_usecs, bool rx_adaptive, 1748 bool rx_may_override_tx) 1749{ 1750 struct efx_channel *channel; 1751 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max * 1752 efx->timer_quantum_ns, 1753 1000); 1754 unsigned int tx_ticks; 1755 unsigned int rx_ticks; 1756 1757 EFX_ASSERT_RESET_SERIALISED(efx); 1758 1759 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max) 1760 return -EINVAL; 1761 1762 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns); 1763 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns); 1764 1765 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 && 1766 !rx_may_override_tx) { 1767 netif_err(efx, drv, efx->net_dev, "Channels are shared. " 1768 "RX and TX IRQ moderation must be equal\n"); 1769 return -EINVAL; 1770 } 1771 1772 efx->irq_rx_adaptive = rx_adaptive; 1773 efx->irq_rx_moderation = rx_ticks; 1774 efx_for_each_channel(channel, efx) { 1775 if (efx_channel_has_rx_queue(channel)) 1776 channel->irq_moderation = rx_ticks; 1777 else if (efx_channel_has_tx_queues(channel)) 1778 channel->irq_moderation = tx_ticks; 1779 } 1780 1781 return 0; 1782} 1783 1784void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, 1785 unsigned int *rx_usecs, bool *rx_adaptive) 1786{ 1787 /* We must round up when converting ticks to microseconds 1788 * because we round down when converting the other way. 1789 */ 1790 1791 *rx_adaptive = efx->irq_rx_adaptive; 1792 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation * 1793 efx->timer_quantum_ns, 1794 1000); 1795 1796 /* If channels are shared between RX and TX, so is IRQ 1797 * moderation. Otherwise, IRQ moderation is the same for all 1798 * TX channels and is not adaptive. 1799 */ 1800 if (efx->tx_channel_offset == 0) 1801 *tx_usecs = *rx_usecs; 1802 else 1803 *tx_usecs = DIV_ROUND_UP( 1804 efx->channel[efx->tx_channel_offset]->irq_moderation * 1805 efx->timer_quantum_ns, 1806 1000); 1807} 1808 1809/************************************************************************** 1810 * 1811 * Hardware monitor 1812 * 1813 **************************************************************************/ 1814 1815/* Run periodically off the general workqueue */ 1816static void efx_monitor(struct work_struct *data) 1817{ 1818 struct efx_nic *efx = container_of(data, struct efx_nic, 1819 monitor_work.work); 1820 1821 netif_vdbg(efx, timer, efx->net_dev, 1822 "hardware monitor executing on CPU %d\n", 1823 raw_smp_processor_id()); 1824 BUG_ON(efx->type->monitor == NULL); 1825 1826 /* If the mac_lock is already held then it is likely a port 1827 * reconfiguration is already in place, which will likely do 1828 * most of the work of monitor() anyway. */ 1829 if (mutex_trylock(&efx->mac_lock)) { 1830 if (efx->port_enabled) 1831 efx->type->monitor(efx); 1832 mutex_unlock(&efx->mac_lock); 1833 } 1834 1835 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1836 efx_monitor_interval); 1837} 1838 1839/************************************************************************** 1840 * 1841 * ioctls 1842 * 1843 *************************************************************************/ 1844 1845/* Net device ioctl 1846 * Context: process, rtnl_lock() held. 1847 */ 1848static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) 1849{ 1850 struct efx_nic *efx = netdev_priv(net_dev); 1851 struct mii_ioctl_data *data = if_mii(ifr); 1852 1853 if (cmd == SIOCSHWTSTAMP) 1854 return efx_ptp_ioctl(efx, ifr, cmd); 1855 1856 /* Convert phy_id from older PRTAD/DEVAD format */ 1857 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) && 1858 (data->phy_id & 0xfc00) == 0x0400) 1859 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; 1860 1861 return mdio_mii_ioctl(&efx->mdio, data, cmd); 1862} 1863 1864/************************************************************************** 1865 * 1866 * NAPI interface 1867 * 1868 **************************************************************************/ 1869 1870static void efx_init_napi_channel(struct efx_channel *channel) 1871{ 1872 struct efx_nic *efx = channel->efx; 1873 1874 channel->napi_dev = efx->net_dev; 1875 netif_napi_add(channel->napi_dev, &channel->napi_str, 1876 efx_poll, napi_weight); 1877} 1878 1879static void efx_init_napi(struct efx_nic *efx) 1880{ 1881 struct efx_channel *channel; 1882 1883 efx_for_each_channel(channel, efx) 1884 efx_init_napi_channel(channel); 1885} 1886 1887static void efx_fini_napi_channel(struct efx_channel *channel) 1888{ 1889 if (channel->napi_dev) 1890 netif_napi_del(&channel->napi_str); 1891 channel->napi_dev = NULL; 1892} 1893 1894static void efx_fini_napi(struct efx_nic *efx) 1895{ 1896 struct efx_channel *channel; 1897 1898 efx_for_each_channel(channel, efx) 1899 efx_fini_napi_channel(channel); 1900} 1901 1902/************************************************************************** 1903 * 1904 * Kernel netpoll interface 1905 * 1906 *************************************************************************/ 1907 1908#ifdef CONFIG_NET_POLL_CONTROLLER 1909 1910/* Although in the common case interrupts will be disabled, this is not 1911 * guaranteed. However, all our work happens inside the NAPI callback, 1912 * so no locking is required. 1913 */ 1914static void efx_netpoll(struct net_device *net_dev) 1915{ 1916 struct efx_nic *efx = netdev_priv(net_dev); 1917 struct efx_channel *channel; 1918 1919 efx_for_each_channel(channel, efx) 1920 efx_schedule_channel(channel); 1921} 1922 1923#endif 1924 1925/************************************************************************** 1926 * 1927 * Kernel net device interface 1928 * 1929 *************************************************************************/ 1930 1931/* Context: process, rtnl_lock() held. */ 1932static int efx_net_open(struct net_device *net_dev) 1933{ 1934 struct efx_nic *efx = netdev_priv(net_dev); 1935 int rc; 1936 1937 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", 1938 raw_smp_processor_id()); 1939 1940 rc = efx_check_disabled(efx); 1941 if (rc) 1942 return rc; 1943 if (efx->phy_mode & PHY_MODE_SPECIAL) 1944 return -EBUSY; 1945 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL)) 1946 return -EIO; 1947 1948 /* Notify the kernel of the link state polled during driver load, 1949 * before the monitor starts running */ 1950 efx_link_status_changed(efx); 1951 1952 efx_start_all(efx); 1953 efx_selftest_async_start(efx); 1954 return 0; 1955} 1956 1957/* Context: process, rtnl_lock() held. 1958 * Note that the kernel will ignore our return code; this method 1959 * should really be a void. 1960 */ 1961static int efx_net_stop(struct net_device *net_dev) 1962{ 1963 struct efx_nic *efx = netdev_priv(net_dev); 1964 1965 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", 1966 raw_smp_processor_id()); 1967 1968 /* Stop the device and flush all the channels */ 1969 efx_stop_all(efx); 1970 1971 return 0; 1972} 1973 1974/* Context: process, dev_base_lock or RTNL held, non-blocking. */ 1975static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, 1976 struct rtnl_link_stats64 *stats) 1977{ 1978 struct efx_nic *efx = netdev_priv(net_dev); 1979 1980 spin_lock_bh(&efx->stats_lock); 1981 efx->type->update_stats(efx, NULL, stats); 1982 spin_unlock_bh(&efx->stats_lock); 1983 1984 return stats; 1985} 1986 1987/* Context: netif_tx_lock held, BHs disabled. */ 1988static void efx_watchdog(struct net_device *net_dev) 1989{ 1990 struct efx_nic *efx = netdev_priv(net_dev); 1991 1992 netif_err(efx, tx_err, efx->net_dev, 1993 "TX stuck with port_enabled=%d: resetting channels\n", 1994 efx->port_enabled); 1995 1996 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); 1997} 1998 1999 2000/* Context: process, rtnl_lock() held. */ 2001static int efx_change_mtu(struct net_device *net_dev, int new_mtu) 2002{ 2003 struct efx_nic *efx = netdev_priv(net_dev); 2004 int rc; 2005 2006 rc = efx_check_disabled(efx); 2007 if (rc) 2008 return rc; 2009 if (new_mtu > EFX_MAX_MTU) 2010 return -EINVAL; 2011 2012 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); 2013 2014 efx_device_detach_sync(efx); 2015 efx_stop_all(efx); 2016 2017 mutex_lock(&efx->mac_lock); 2018 net_dev->mtu = new_mtu; 2019 efx->type->reconfigure_mac(efx); 2020 mutex_unlock(&efx->mac_lock); 2021 2022 efx_start_all(efx); 2023 netif_device_attach(efx->net_dev); 2024 return 0; 2025} 2026 2027static int efx_set_mac_address(struct net_device *net_dev, void *data) 2028{ 2029 struct efx_nic *efx = netdev_priv(net_dev); 2030 struct sockaddr *addr = data; 2031 char *new_addr = addr->sa_data; 2032 2033 if (!is_valid_ether_addr(new_addr)) { 2034 netif_err(efx, drv, efx->net_dev, 2035 "invalid ethernet MAC address requested: %pM\n", 2036 new_addr); 2037 return -EADDRNOTAVAIL; 2038 } 2039 2040 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len); 2041 efx_sriov_mac_address_changed(efx); 2042 2043 /* Reconfigure the MAC */ 2044 mutex_lock(&efx->mac_lock); 2045 efx->type->reconfigure_mac(efx); 2046 mutex_unlock(&efx->mac_lock); 2047 2048 return 0; 2049} 2050 2051/* Context: netif_addr_lock held, BHs disabled. */ 2052static void efx_set_rx_mode(struct net_device *net_dev) 2053{ 2054 struct efx_nic *efx = netdev_priv(net_dev); 2055 2056 if (efx->port_enabled) 2057 queue_work(efx->workqueue, &efx->mac_work); 2058 /* Otherwise efx_start_port() will do this */ 2059} 2060 2061static int efx_set_features(struct net_device *net_dev, netdev_features_t data) 2062{ 2063 struct efx_nic *efx = netdev_priv(net_dev); 2064 2065 /* If disabling RX n-tuple filtering, clear existing filters */ 2066 if (net_dev->features & ~data & NETIF_F_NTUPLE) 2067 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); 2068 2069 return 0; 2070} 2071 2072static const struct net_device_ops efx_farch_netdev_ops = { 2073 .ndo_open = efx_net_open, 2074 .ndo_stop = efx_net_stop, 2075 .ndo_get_stats64 = efx_net_stats, 2076 .ndo_tx_timeout = efx_watchdog, 2077 .ndo_start_xmit = efx_hard_start_xmit, 2078 .ndo_validate_addr = eth_validate_addr, 2079 .ndo_do_ioctl = efx_ioctl, 2080 .ndo_change_mtu = efx_change_mtu, 2081 .ndo_set_mac_address = efx_set_mac_address, 2082 .ndo_set_rx_mode = efx_set_rx_mode, 2083 .ndo_set_features = efx_set_features, 2084#ifdef CONFIG_SFC_SRIOV 2085 .ndo_set_vf_mac = efx_sriov_set_vf_mac, 2086 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan, 2087 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk, 2088 .ndo_get_vf_config = efx_sriov_get_vf_config, 2089#endif 2090#ifdef CONFIG_NET_POLL_CONTROLLER 2091 .ndo_poll_controller = efx_netpoll, 2092#endif 2093 .ndo_setup_tc = efx_setup_tc, 2094#ifdef CONFIG_RFS_ACCEL 2095 .ndo_rx_flow_steer = efx_filter_rfs, 2096#endif 2097}; 2098 2099static const struct net_device_ops efx_ef10_netdev_ops = { 2100 .ndo_open = efx_net_open, 2101 .ndo_stop = efx_net_stop, 2102 .ndo_get_stats64 = efx_net_stats, 2103 .ndo_tx_timeout = efx_watchdog, 2104 .ndo_start_xmit = efx_hard_start_xmit, 2105 .ndo_validate_addr = eth_validate_addr, 2106 .ndo_do_ioctl = efx_ioctl, 2107 .ndo_change_mtu = efx_change_mtu, 2108 .ndo_set_mac_address = efx_set_mac_address, 2109 .ndo_set_rx_mode = efx_set_rx_mode, 2110 .ndo_set_features = efx_set_features, 2111#ifdef CONFIG_NET_POLL_CONTROLLER 2112 .ndo_poll_controller = efx_netpoll, 2113#endif 2114#ifdef CONFIG_RFS_ACCEL 2115 .ndo_rx_flow_steer = efx_filter_rfs, 2116#endif 2117}; 2118 2119static void efx_update_name(struct efx_nic *efx) 2120{ 2121 strcpy(efx->name, efx->net_dev->name); 2122 efx_mtd_rename(efx); 2123 efx_set_channel_names(efx); 2124} 2125 2126static int efx_netdev_event(struct notifier_block *this, 2127 unsigned long event, void *ptr) 2128{ 2129 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr); 2130 2131 if ((net_dev->netdev_ops == &efx_farch_netdev_ops || 2132 net_dev->netdev_ops == &efx_ef10_netdev_ops) && 2133 event == NETDEV_CHANGENAME) 2134 efx_update_name(netdev_priv(net_dev)); 2135 2136 return NOTIFY_DONE; 2137} 2138 2139static struct notifier_block efx_netdev_notifier = { 2140 .notifier_call = efx_netdev_event, 2141}; 2142 2143static ssize_t 2144show_phy_type(struct device *dev, struct device_attribute *attr, char *buf) 2145{ 2146 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2147 return sprintf(buf, "%d\n", efx->phy_type); 2148} 2149static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL); 2150 2151static int efx_register_netdev(struct efx_nic *efx) 2152{ 2153 struct net_device *net_dev = efx->net_dev; 2154 struct efx_channel *channel; 2155 int rc; 2156 2157 net_dev->watchdog_timeo = 5 * HZ; 2158 net_dev->irq = efx->pci_dev->irq; 2159 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { 2160 net_dev->netdev_ops = &efx_ef10_netdev_ops; 2161 net_dev->priv_flags |= IFF_UNICAST_FLT; 2162 } else { 2163 net_dev->netdev_ops = &efx_farch_netdev_ops; 2164 } 2165 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops); 2166 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS; 2167 2168 rtnl_lock(); 2169 2170 /* Enable resets to be scheduled and check whether any were 2171 * already requested. If so, the NIC is probably hosed so we 2172 * abort. 2173 */ 2174 efx->state = STATE_READY; 2175 smp_mb(); /* ensure we change state before checking reset_pending */ 2176 if (efx->reset_pending) { 2177 netif_err(efx, probe, efx->net_dev, 2178 "aborting probe due to scheduled reset\n"); 2179 rc = -EIO; 2180 goto fail_locked; 2181 } 2182 2183 rc = dev_alloc_name(net_dev, net_dev->name); 2184 if (rc < 0) 2185 goto fail_locked; 2186 efx_update_name(efx); 2187 2188 /* Always start with carrier off; PHY events will detect the link */ 2189 netif_carrier_off(net_dev); 2190 2191 rc = register_netdevice(net_dev); 2192 if (rc) 2193 goto fail_locked; 2194 2195 efx_for_each_channel(channel, efx) { 2196 struct efx_tx_queue *tx_queue; 2197 efx_for_each_channel_tx_queue(tx_queue, channel) 2198 efx_init_tx_queue_core_txq(tx_queue); 2199 } 2200 2201 rtnl_unlock(); 2202 2203 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2204 if (rc) { 2205 netif_err(efx, drv, efx->net_dev, 2206 "failed to init net dev attributes\n"); 2207 goto fail_registered; 2208 } 2209 2210 return 0; 2211 2212fail_registered: 2213 rtnl_lock(); 2214 unregister_netdevice(net_dev); 2215fail_locked: 2216 efx->state = STATE_UNINIT; 2217 rtnl_unlock(); 2218 netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); 2219 return rc; 2220} 2221 2222static void efx_unregister_netdev(struct efx_nic *efx) 2223{ 2224 if (!efx->net_dev) 2225 return; 2226 2227 BUG_ON(netdev_priv(efx->net_dev) != efx); 2228 2229 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); 2230 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2231 2232 rtnl_lock(); 2233 unregister_netdevice(efx->net_dev); 2234 efx->state = STATE_UNINIT; 2235 rtnl_unlock(); 2236} 2237 2238/************************************************************************** 2239 * 2240 * Device reset and suspend 2241 * 2242 **************************************************************************/ 2243 2244/* Tears down the entire software state and most of the hardware state 2245 * before reset. */ 2246void efx_reset_down(struct efx_nic *efx, enum reset_type method) 2247{ 2248 EFX_ASSERT_RESET_SERIALISED(efx); 2249 2250 efx_stop_all(efx); 2251 efx_disable_interrupts(efx); 2252 2253 mutex_lock(&efx->mac_lock); 2254 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) 2255 efx->phy_op->fini(efx); 2256 efx->type->fini(efx); 2257} 2258 2259/* This function will always ensure that the locks acquired in 2260 * efx_reset_down() are released. A failure return code indicates 2261 * that we were unable to reinitialise the hardware, and the 2262 * driver should be disabled. If ok is false, then the rx and tx 2263 * engines are not restarted, pending a RESET_DISABLE. */ 2264int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) 2265{ 2266 int rc; 2267 2268 EFX_ASSERT_RESET_SERIALISED(efx); 2269 2270 rc = efx->type->init(efx); 2271 if (rc) { 2272 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 2273 goto fail; 2274 } 2275 2276 if (!ok) 2277 goto fail; 2278 2279 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) { 2280 rc = efx->phy_op->init(efx); 2281 if (rc) 2282 goto fail; 2283 if (efx->phy_op->reconfigure(efx)) 2284 netif_err(efx, drv, efx->net_dev, 2285 "could not restore PHY settings\n"); 2286 } 2287 2288 rc = efx_enable_interrupts(efx); 2289 if (rc) 2290 goto fail; 2291 efx_restore_filters(efx); 2292 efx_sriov_reset(efx); 2293 2294 mutex_unlock(&efx->mac_lock); 2295 2296 efx_start_all(efx); 2297 2298 return 0; 2299 2300fail: 2301 efx->port_initialized = false; 2302 2303 mutex_unlock(&efx->mac_lock); 2304 2305 return rc; 2306} 2307 2308/* Reset the NIC using the specified method. Note that the reset may 2309 * fail, in which case the card will be left in an unusable state. 2310 * 2311 * Caller must hold the rtnl_lock. 2312 */ 2313int efx_reset(struct efx_nic *efx, enum reset_type method) 2314{ 2315 int rc, rc2; 2316 bool disabled; 2317 2318 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", 2319 RESET_TYPE(method)); 2320 2321 efx_device_detach_sync(efx); 2322 efx_reset_down(efx, method); 2323 2324 rc = efx->type->reset(efx, method); 2325 if (rc) { 2326 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); 2327 goto out; 2328 } 2329 2330 /* Clear flags for the scopes we covered. We assume the NIC and 2331 * driver are now quiescent so that there is no race here. 2332 */ 2333 efx->reset_pending &= -(1 << (method + 1)); 2334 2335 /* Reinitialise bus-mastering, which may have been turned off before 2336 * the reset was scheduled. This is still appropriate, even in the 2337 * RESET_TYPE_DISABLE since this driver generally assumes the hardware 2338 * can respond to requests. */ 2339 pci_set_master(efx->pci_dev); 2340 2341out: 2342 /* Leave device stopped if necessary */ 2343 disabled = rc || 2344 method == RESET_TYPE_DISABLE || 2345 method == RESET_TYPE_RECOVER_OR_DISABLE; 2346 rc2 = efx_reset_up(efx, method, !disabled); 2347 if (rc2) { 2348 disabled = true; 2349 if (!rc) 2350 rc = rc2; 2351 } 2352 2353 if (disabled) { 2354 dev_close(efx->net_dev); 2355 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); 2356 efx->state = STATE_DISABLED; 2357 } else { 2358 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); 2359 netif_device_attach(efx->net_dev); 2360 } 2361 return rc; 2362} 2363 2364/* Try recovery mechanisms. 2365 * For now only EEH is supported. 2366 * Returns 0 if the recovery mechanisms are unsuccessful. 2367 * Returns a non-zero value otherwise. 2368 */ 2369int efx_try_recovery(struct efx_nic *efx) 2370{ 2371#ifdef CONFIG_EEH 2372 /* A PCI error can occur and not be seen by EEH because nothing 2373 * happens on the PCI bus. In this case the driver may fail and 2374 * schedule a 'recover or reset', leading to this recovery handler. 2375 * Manually call the eeh failure check function. 2376 */ 2377 struct eeh_dev *eehdev = 2378 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev)); 2379 2380 if (eeh_dev_check_failure(eehdev)) { 2381 /* The EEH mechanisms will handle the error and reset the 2382 * device if necessary. 2383 */ 2384 return 1; 2385 } 2386#endif 2387 return 0; 2388} 2389 2390/* The worker thread exists so that code that cannot sleep can 2391 * schedule a reset for later. 2392 */ 2393static void efx_reset_work(struct work_struct *data) 2394{ 2395 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); 2396 unsigned long pending; 2397 enum reset_type method; 2398 2399 pending = ACCESS_ONCE(efx->reset_pending); 2400 method = fls(pending) - 1; 2401 2402 if ((method == RESET_TYPE_RECOVER_OR_DISABLE || 2403 method == RESET_TYPE_RECOVER_OR_ALL) && 2404 efx_try_recovery(efx)) 2405 return; 2406 2407 if (!pending) 2408 return; 2409 2410 rtnl_lock(); 2411 2412 /* We checked the state in efx_schedule_reset() but it may 2413 * have changed by now. Now that we have the RTNL lock, 2414 * it cannot change again. 2415 */ 2416 if (efx->state == STATE_READY) 2417 (void)efx_reset(efx, method); 2418 2419 rtnl_unlock(); 2420} 2421 2422void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) 2423{ 2424 enum reset_type method; 2425 2426 if (efx->state == STATE_RECOVERY) { 2427 netif_dbg(efx, drv, efx->net_dev, 2428 "recovering: skip scheduling %s reset\n", 2429 RESET_TYPE(type)); 2430 return; 2431 } 2432 2433 switch (type) { 2434 case RESET_TYPE_INVISIBLE: 2435 case RESET_TYPE_ALL: 2436 case RESET_TYPE_RECOVER_OR_ALL: 2437 case RESET_TYPE_WORLD: 2438 case RESET_TYPE_DISABLE: 2439 case RESET_TYPE_RECOVER_OR_DISABLE: 2440 method = type; 2441 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 2442 RESET_TYPE(method)); 2443 break; 2444 default: 2445 method = efx->type->map_reset_reason(type); 2446 netif_dbg(efx, drv, efx->net_dev, 2447 "scheduling %s reset for %s\n", 2448 RESET_TYPE(method), RESET_TYPE(type)); 2449 break; 2450 } 2451 2452 set_bit(method, &efx->reset_pending); 2453 smp_mb(); /* ensure we change reset_pending before checking state */ 2454 2455 /* If we're not READY then just leave the flags set as the cue 2456 * to abort probing or reschedule the reset later. 2457 */ 2458 if (ACCESS_ONCE(efx->state) != STATE_READY) 2459 return; 2460 2461 /* efx_process_channel() will no longer read events once a 2462 * reset is scheduled. So switch back to poll'd MCDI completions. */ 2463 efx_mcdi_mode_poll(efx); 2464 2465 queue_work(reset_workqueue, &efx->reset_work); 2466} 2467 2468/************************************************************************** 2469 * 2470 * List of NICs we support 2471 * 2472 **************************************************************************/ 2473 2474/* PCI device ID table */ 2475static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = { 2476 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2477 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0), 2478 .driver_data = (unsigned long) &falcon_a1_nic_type}, 2479 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2480 PCI_DEVICE_ID_SOLARFLARE_SFC4000B), 2481 .driver_data = (unsigned long) &falcon_b0_nic_type}, 2482 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */ 2483 .driver_data = (unsigned long) &siena_a0_nic_type}, 2484 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */ 2485 .driver_data = (unsigned long) &siena_a0_nic_type}, 2486 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */ 2487 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2488 {0} /* end of list */ 2489}; 2490 2491/************************************************************************** 2492 * 2493 * Dummy PHY/MAC operations 2494 * 2495 * Can be used for some unimplemented operations 2496 * Needed so all function pointers are valid and do not have to be tested 2497 * before use 2498 * 2499 **************************************************************************/ 2500int efx_port_dummy_op_int(struct efx_nic *efx) 2501{ 2502 return 0; 2503} 2504void efx_port_dummy_op_void(struct efx_nic *efx) {} 2505 2506static bool efx_port_dummy_op_poll(struct efx_nic *efx) 2507{ 2508 return false; 2509} 2510 2511static const struct efx_phy_operations efx_dummy_phy_operations = { 2512 .init = efx_port_dummy_op_int, 2513 .reconfigure = efx_port_dummy_op_int, 2514 .poll = efx_port_dummy_op_poll, 2515 .fini = efx_port_dummy_op_void, 2516}; 2517 2518/************************************************************************** 2519 * 2520 * Data housekeeping 2521 * 2522 **************************************************************************/ 2523 2524/* This zeroes out and then fills in the invariants in a struct 2525 * efx_nic (including all sub-structures). 2526 */ 2527static int efx_init_struct(struct efx_nic *efx, 2528 struct pci_dev *pci_dev, struct net_device *net_dev) 2529{ 2530 int i; 2531 2532 /* Initialise common structures */ 2533 spin_lock_init(&efx->biu_lock); 2534#ifdef CONFIG_SFC_MTD 2535 INIT_LIST_HEAD(&efx->mtd_list); 2536#endif 2537 INIT_WORK(&efx->reset_work, efx_reset_work); 2538 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); 2539 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work); 2540 efx->pci_dev = pci_dev; 2541 efx->msg_enable = debug; 2542 efx->state = STATE_UNINIT; 2543 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); 2544 2545 efx->net_dev = net_dev; 2546 efx->rx_prefix_size = efx->type->rx_prefix_size; 2547 efx->rx_ip_align = 2548 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0; 2549 efx->rx_packet_hash_offset = 2550 efx->type->rx_hash_offset - efx->type->rx_prefix_size; 2551 spin_lock_init(&efx->stats_lock); 2552 mutex_init(&efx->mac_lock); 2553 efx->phy_op = &efx_dummy_phy_operations; 2554 efx->mdio.dev = net_dev; 2555 INIT_WORK(&efx->mac_work, efx_mac_work); 2556 init_waitqueue_head(&efx->flush_wq); 2557 2558 for (i = 0; i < EFX_MAX_CHANNELS; i++) { 2559 efx->channel[i] = efx_alloc_channel(efx, i, NULL); 2560 if (!efx->channel[i]) 2561 goto fail; 2562 efx->msi_context[i].efx = efx; 2563 efx->msi_context[i].index = i; 2564 } 2565 2566 /* Higher numbered interrupt modes are less capable! */ 2567 efx->interrupt_mode = max(efx->type->max_interrupt_mode, 2568 interrupt_mode); 2569 2570 /* Would be good to use the net_dev name, but we're too early */ 2571 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", 2572 pci_name(pci_dev)); 2573 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); 2574 if (!efx->workqueue) 2575 goto fail; 2576 2577 return 0; 2578 2579fail: 2580 efx_fini_struct(efx); 2581 return -ENOMEM; 2582} 2583 2584static void efx_fini_struct(struct efx_nic *efx) 2585{ 2586 int i; 2587 2588 for (i = 0; i < EFX_MAX_CHANNELS; i++) 2589 kfree(efx->channel[i]); 2590 2591 if (efx->workqueue) { 2592 destroy_workqueue(efx->workqueue); 2593 efx->workqueue = NULL; 2594 } 2595} 2596 2597/************************************************************************** 2598 * 2599 * PCI interface 2600 * 2601 **************************************************************************/ 2602 2603/* Main body of final NIC shutdown code 2604 * This is called only at module unload (or hotplug removal). 2605 */ 2606static void efx_pci_remove_main(struct efx_nic *efx) 2607{ 2608 /* Flush reset_work. It can no longer be scheduled since we 2609 * are not READY. 2610 */ 2611 BUG_ON(efx->state == STATE_READY); 2612 cancel_work_sync(&efx->reset_work); 2613 2614 efx_disable_interrupts(efx); 2615 efx_nic_fini_interrupt(efx); 2616 efx_fini_port(efx); 2617 efx->type->fini(efx); 2618 efx_fini_napi(efx); 2619 efx_remove_all(efx); 2620} 2621 2622/* Final NIC shutdown 2623 * This is called only at module unload (or hotplug removal). 2624 */ 2625static void efx_pci_remove(struct pci_dev *pci_dev) 2626{ 2627 struct efx_nic *efx; 2628 2629 efx = pci_get_drvdata(pci_dev); 2630 if (!efx) 2631 return; 2632 2633 /* Mark the NIC as fini, then stop the interface */ 2634 rtnl_lock(); 2635 dev_close(efx->net_dev); 2636 efx_disable_interrupts(efx); 2637 rtnl_unlock(); 2638 2639 efx_sriov_fini(efx); 2640 efx_unregister_netdev(efx); 2641 2642 efx_mtd_remove(efx); 2643 2644 efx_pci_remove_main(efx); 2645 2646 efx_fini_io(efx); 2647 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); 2648 2649 efx_fini_struct(efx); 2650 pci_set_drvdata(pci_dev, NULL); 2651 free_netdev(efx->net_dev); 2652 2653 pci_disable_pcie_error_reporting(pci_dev); 2654}; 2655 2656/* NIC VPD information 2657 * Called during probe to display the part number of the 2658 * installed NIC. VPD is potentially very large but this should 2659 * always appear within the first 512 bytes. 2660 */ 2661#define SFC_VPD_LEN 512 2662static void efx_print_product_vpd(struct efx_nic *efx) 2663{ 2664 struct pci_dev *dev = efx->pci_dev; 2665 char vpd_data[SFC_VPD_LEN]; 2666 ssize_t vpd_size; 2667 int i, j; 2668 2669 /* Get the vpd data from the device */ 2670 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data); 2671 if (vpd_size <= 0) { 2672 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n"); 2673 return; 2674 } 2675 2676 /* Get the Read only section */ 2677 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA); 2678 if (i < 0) { 2679 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n"); 2680 return; 2681 } 2682 2683 j = pci_vpd_lrdt_size(&vpd_data[i]); 2684 i += PCI_VPD_LRDT_TAG_SIZE; 2685 if (i + j > vpd_size) 2686 j = vpd_size - i; 2687 2688 /* Get the Part number */ 2689 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN"); 2690 if (i < 0) { 2691 netif_err(efx, drv, efx->net_dev, "Part number not found\n"); 2692 return; 2693 } 2694 2695 j = pci_vpd_info_field_size(&vpd_data[i]); 2696 i += PCI_VPD_INFO_FLD_HDR_SIZE; 2697 if (i + j > vpd_size) { 2698 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n"); 2699 return; 2700 } 2701 2702 netif_info(efx, drv, efx->net_dev, 2703 "Part Number : %.*s\n", j, &vpd_data[i]); 2704} 2705 2706 2707/* Main body of NIC initialisation 2708 * This is called at module load (or hotplug insertion, theoretically). 2709 */ 2710static int efx_pci_probe_main(struct efx_nic *efx) 2711{ 2712 int rc; 2713 2714 /* Do start-of-day initialisation */ 2715 rc = efx_probe_all(efx); 2716 if (rc) 2717 goto fail1; 2718 2719 efx_init_napi(efx); 2720 2721 rc = efx->type->init(efx); 2722 if (rc) { 2723 netif_err(efx, probe, efx->net_dev, 2724 "failed to initialise NIC\n"); 2725 goto fail3; 2726 } 2727 2728 rc = efx_init_port(efx); 2729 if (rc) { 2730 netif_err(efx, probe, efx->net_dev, 2731 "failed to initialise port\n"); 2732 goto fail4; 2733 } 2734 2735 rc = efx_nic_init_interrupt(efx); 2736 if (rc) 2737 goto fail5; 2738 rc = efx_enable_interrupts(efx); 2739 if (rc) 2740 goto fail6; 2741 2742 return 0; 2743 2744 fail6: 2745 efx_nic_fini_interrupt(efx); 2746 fail5: 2747 efx_fini_port(efx); 2748 fail4: 2749 efx->type->fini(efx); 2750 fail3: 2751 efx_fini_napi(efx); 2752 efx_remove_all(efx); 2753 fail1: 2754 return rc; 2755} 2756 2757/* NIC initialisation 2758 * 2759 * This is called at module load (or hotplug insertion, 2760 * theoretically). It sets up PCI mappings, resets the NIC, 2761 * sets up and registers the network devices with the kernel and hooks 2762 * the interrupt service routine. It does not prepare the device for 2763 * transmission; this is left to the first time one of the network 2764 * interfaces is brought up (i.e. efx_net_open). 2765 */ 2766static int efx_pci_probe(struct pci_dev *pci_dev, 2767 const struct pci_device_id *entry) 2768{ 2769 struct net_device *net_dev; 2770 struct efx_nic *efx; 2771 int rc; 2772 2773 /* Allocate and initialise a struct net_device and struct efx_nic */ 2774 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES, 2775 EFX_MAX_RX_QUEUES); 2776 if (!net_dev) 2777 return -ENOMEM; 2778 efx = netdev_priv(net_dev); 2779 efx->type = (const struct efx_nic_type *) entry->driver_data; 2780 net_dev->features |= (efx->type->offload_features | NETIF_F_SG | 2781 NETIF_F_HIGHDMA | NETIF_F_TSO | 2782 NETIF_F_RXCSUM); 2783 if (efx->type->offload_features & NETIF_F_V6_CSUM) 2784 net_dev->features |= NETIF_F_TSO6; 2785 /* Mask for features that also apply to VLAN devices */ 2786 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | 2787 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO | 2788 NETIF_F_RXCSUM); 2789 /* All offloads can be toggled */ 2790 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA; 2791 pci_set_drvdata(pci_dev, efx); 2792 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 2793 rc = efx_init_struct(efx, pci_dev, net_dev); 2794 if (rc) 2795 goto fail1; 2796 2797 netif_info(efx, probe, efx->net_dev, 2798 "Solarflare NIC detected\n"); 2799 2800 efx_print_product_vpd(efx); 2801 2802 /* Set up basic I/O (BAR mappings etc) */ 2803 rc = efx_init_io(efx); 2804 if (rc) 2805 goto fail2; 2806 2807 rc = efx_pci_probe_main(efx); 2808 if (rc) 2809 goto fail3; 2810 2811 rc = efx_register_netdev(efx); 2812 if (rc) 2813 goto fail4; 2814 2815 rc = efx_sriov_init(efx); 2816 if (rc) 2817 netif_err(efx, probe, efx->net_dev, 2818 "SR-IOV can't be enabled rc %d\n", rc); 2819 2820 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); 2821 2822 /* Try to create MTDs, but allow this to fail */ 2823 rtnl_lock(); 2824 rc = efx_mtd_probe(efx); 2825 rtnl_unlock(); 2826 if (rc) 2827 netif_warn(efx, probe, efx->net_dev, 2828 "failed to create MTDs (%d)\n", rc); 2829 2830 rc = pci_enable_pcie_error_reporting(pci_dev); 2831 if (rc && rc != -EINVAL) 2832 netif_warn(efx, probe, efx->net_dev, 2833 "pci_enable_pcie_error_reporting failed (%d)\n", rc); 2834 2835 return 0; 2836 2837 fail4: 2838 efx_pci_remove_main(efx); 2839 fail3: 2840 efx_fini_io(efx); 2841 fail2: 2842 efx_fini_struct(efx); 2843 fail1: 2844 pci_set_drvdata(pci_dev, NULL); 2845 WARN_ON(rc > 0); 2846 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); 2847 free_netdev(net_dev); 2848 return rc; 2849} 2850 2851static int efx_pm_freeze(struct device *dev) 2852{ 2853 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2854 2855 rtnl_lock(); 2856 2857 if (efx->state != STATE_DISABLED) { 2858 efx->state = STATE_UNINIT; 2859 2860 efx_device_detach_sync(efx); 2861 2862 efx_stop_all(efx); 2863 efx_disable_interrupts(efx); 2864 } 2865 2866 rtnl_unlock(); 2867 2868 return 0; 2869} 2870 2871static int efx_pm_thaw(struct device *dev) 2872{ 2873 int rc; 2874 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2875 2876 rtnl_lock(); 2877 2878 if (efx->state != STATE_DISABLED) { 2879 rc = efx_enable_interrupts(efx); 2880 if (rc) 2881 goto fail; 2882 2883 mutex_lock(&efx->mac_lock); 2884 efx->phy_op->reconfigure(efx); 2885 mutex_unlock(&efx->mac_lock); 2886 2887 efx_start_all(efx); 2888 2889 netif_device_attach(efx->net_dev); 2890 2891 efx->state = STATE_READY; 2892 2893 efx->type->resume_wol(efx); 2894 } 2895 2896 rtnl_unlock(); 2897 2898 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ 2899 queue_work(reset_workqueue, &efx->reset_work); 2900 2901 return 0; 2902 2903fail: 2904 rtnl_unlock(); 2905 2906 return rc; 2907} 2908 2909static int efx_pm_poweroff(struct device *dev) 2910{ 2911 struct pci_dev *pci_dev = to_pci_dev(dev); 2912 struct efx_nic *efx = pci_get_drvdata(pci_dev); 2913 2914 efx->type->fini(efx); 2915 2916 efx->reset_pending = 0; 2917 2918 pci_save_state(pci_dev); 2919 return pci_set_power_state(pci_dev, PCI_D3hot); 2920} 2921 2922/* Used for both resume and restore */ 2923static int efx_pm_resume(struct device *dev) 2924{ 2925 struct pci_dev *pci_dev = to_pci_dev(dev); 2926 struct efx_nic *efx = pci_get_drvdata(pci_dev); 2927 int rc; 2928 2929 rc = pci_set_power_state(pci_dev, PCI_D0); 2930 if (rc) 2931 return rc; 2932 pci_restore_state(pci_dev); 2933 rc = pci_enable_device(pci_dev); 2934 if (rc) 2935 return rc; 2936 pci_set_master(efx->pci_dev); 2937 rc = efx->type->reset(efx, RESET_TYPE_ALL); 2938 if (rc) 2939 return rc; 2940 rc = efx->type->init(efx); 2941 if (rc) 2942 return rc; 2943 rc = efx_pm_thaw(dev); 2944 return rc; 2945} 2946 2947static int efx_pm_suspend(struct device *dev) 2948{ 2949 int rc; 2950 2951 efx_pm_freeze(dev); 2952 rc = efx_pm_poweroff(dev); 2953 if (rc) 2954 efx_pm_resume(dev); 2955 return rc; 2956} 2957 2958static const struct dev_pm_ops efx_pm_ops = { 2959 .suspend = efx_pm_suspend, 2960 .resume = efx_pm_resume, 2961 .freeze = efx_pm_freeze, 2962 .thaw = efx_pm_thaw, 2963 .poweroff = efx_pm_poweroff, 2964 .restore = efx_pm_resume, 2965}; 2966 2967/* A PCI error affecting this device was detected. 2968 * At this point MMIO and DMA may be disabled. 2969 * Stop the software path and request a slot reset. 2970 */ 2971static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, 2972 enum pci_channel_state state) 2973{ 2974 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 2975 struct efx_nic *efx = pci_get_drvdata(pdev); 2976 2977 if (state == pci_channel_io_perm_failure) 2978 return PCI_ERS_RESULT_DISCONNECT; 2979 2980 rtnl_lock(); 2981 2982 if (efx->state != STATE_DISABLED) { 2983 efx->state = STATE_RECOVERY; 2984 efx->reset_pending = 0; 2985 2986 efx_device_detach_sync(efx); 2987 2988 efx_stop_all(efx); 2989 efx_disable_interrupts(efx); 2990 2991 status = PCI_ERS_RESULT_NEED_RESET; 2992 } else { 2993 /* If the interface is disabled we don't want to do anything 2994 * with it. 2995 */ 2996 status = PCI_ERS_RESULT_RECOVERED; 2997 } 2998 2999 rtnl_unlock(); 3000 3001 pci_disable_device(pdev); 3002 3003 return status; 3004} 3005 3006/* Fake a successfull reset, which will be performed later in efx_io_resume. */ 3007static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) 3008{ 3009 struct efx_nic *efx = pci_get_drvdata(pdev); 3010 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3011 int rc; 3012 3013 if (pci_enable_device(pdev)) { 3014 netif_err(efx, hw, efx->net_dev, 3015 "Cannot re-enable PCI device after reset.\n"); 3016 status = PCI_ERS_RESULT_DISCONNECT; 3017 } 3018 3019 rc = pci_cleanup_aer_uncorrect_error_status(pdev); 3020 if (rc) { 3021 netif_err(efx, hw, efx->net_dev, 3022 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc); 3023 /* Non-fatal error. Continue. */ 3024 } 3025 3026 return status; 3027} 3028 3029/* Perform the actual reset and resume I/O operations. */ 3030static void efx_io_resume(struct pci_dev *pdev) 3031{ 3032 struct efx_nic *efx = pci_get_drvdata(pdev); 3033 int rc; 3034 3035 rtnl_lock(); 3036 3037 if (efx->state == STATE_DISABLED) 3038 goto out; 3039 3040 rc = efx_reset(efx, RESET_TYPE_ALL); 3041 if (rc) { 3042 netif_err(efx, hw, efx->net_dev, 3043 "efx_reset failed after PCI error (%d)\n", rc); 3044 } else { 3045 efx->state = STATE_READY; 3046 netif_dbg(efx, hw, efx->net_dev, 3047 "Done resetting and resuming IO after PCI error.\n"); 3048 } 3049 3050out: 3051 rtnl_unlock(); 3052} 3053 3054/* For simplicity and reliability, we always require a slot reset and try to 3055 * reset the hardware when a pci error affecting the device is detected. 3056 * We leave both the link_reset and mmio_enabled callback unimplemented: 3057 * with our request for slot reset the mmio_enabled callback will never be 3058 * called, and the link_reset callback is not used by AER or EEH mechanisms. 3059 */ 3060static struct pci_error_handlers efx_err_handlers = { 3061 .error_detected = efx_io_error_detected, 3062 .slot_reset = efx_io_slot_reset, 3063 .resume = efx_io_resume, 3064}; 3065 3066static struct pci_driver efx_pci_driver = { 3067 .name = KBUILD_MODNAME, 3068 .id_table = efx_pci_table, 3069 .probe = efx_pci_probe, 3070 .remove = efx_pci_remove, 3071 .driver.pm = &efx_pm_ops, 3072 .err_handler = &efx_err_handlers, 3073}; 3074 3075/************************************************************************** 3076 * 3077 * Kernel module interface 3078 * 3079 *************************************************************************/ 3080 3081module_param(interrupt_mode, uint, 0444); 3082MODULE_PARM_DESC(interrupt_mode, 3083 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)"); 3084 3085static int __init efx_init_module(void) 3086{ 3087 int rc; 3088 3089 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n"); 3090 3091 rc = register_netdevice_notifier(&efx_netdev_notifier); 3092 if (rc) 3093 goto err_notifier; 3094 3095 rc = efx_init_sriov(); 3096 if (rc) 3097 goto err_sriov; 3098 3099 reset_workqueue = create_singlethread_workqueue("sfc_reset"); 3100 if (!reset_workqueue) { 3101 rc = -ENOMEM; 3102 goto err_reset; 3103 } 3104 3105 rc = pci_register_driver(&efx_pci_driver); 3106 if (rc < 0) 3107 goto err_pci; 3108 3109 return 0; 3110 3111 err_pci: 3112 destroy_workqueue(reset_workqueue); 3113 err_reset: 3114 efx_fini_sriov(); 3115 err_sriov: 3116 unregister_netdevice_notifier(&efx_netdev_notifier); 3117 err_notifier: 3118 return rc; 3119} 3120 3121static void __exit efx_exit_module(void) 3122{ 3123 printk(KERN_INFO "Solarflare NET driver unloading\n"); 3124 3125 pci_unregister_driver(&efx_pci_driver); 3126 destroy_workqueue(reset_workqueue); 3127 efx_fini_sriov(); 3128 unregister_netdevice_notifier(&efx_netdev_notifier); 3129 3130} 3131 3132module_init(efx_init_module); 3133module_exit(efx_exit_module); 3134 3135MODULE_AUTHOR("Solarflare Communications and " 3136 "Michael Brown <mbrown@fensystems.co.uk>"); 3137MODULE_DESCRIPTION("Solarflare Communications network driver"); 3138MODULE_LICENSE("GPL"); 3139MODULE_DEVICE_TABLE(pci, efx_pci_table); 3140