efx.c revision 3166950070ce6b9d1443758d82c0a42779a02153
1/**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2005-2006 Fen Systems Ltd. 4 * Copyright 2005-2013 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11#include <linux/module.h> 12#include <linux/pci.h> 13#include <linux/netdevice.h> 14#include <linux/etherdevice.h> 15#include <linux/delay.h> 16#include <linux/notifier.h> 17#include <linux/ip.h> 18#include <linux/tcp.h> 19#include <linux/in.h> 20#include <linux/ethtool.h> 21#include <linux/topology.h> 22#include <linux/gfp.h> 23#include <linux/aer.h> 24#include <linux/interrupt.h> 25#include "net_driver.h" 26#include "efx.h" 27#include "nic.h" 28#include "selftest.h" 29 30#include "mcdi.h" 31#include "workarounds.h" 32 33/************************************************************************** 34 * 35 * Type name strings 36 * 37 ************************************************************************** 38 */ 39 40/* Loopback mode names (see LOOPBACK_MODE()) */ 41const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; 42const char *const efx_loopback_mode_names[] = { 43 [LOOPBACK_NONE] = "NONE", 44 [LOOPBACK_DATA] = "DATAPATH", 45 [LOOPBACK_GMAC] = "GMAC", 46 [LOOPBACK_XGMII] = "XGMII", 47 [LOOPBACK_XGXS] = "XGXS", 48 [LOOPBACK_XAUI] = "XAUI", 49 [LOOPBACK_GMII] = "GMII", 50 [LOOPBACK_SGMII] = "SGMII", 51 [LOOPBACK_XGBR] = "XGBR", 52 [LOOPBACK_XFI] = "XFI", 53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR", 54 [LOOPBACK_GMII_FAR] = "GMII_FAR", 55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR", 56 [LOOPBACK_XFI_FAR] = "XFI_FAR", 57 [LOOPBACK_GPHY] = "GPHY", 58 [LOOPBACK_PHYXS] = "PHYXS", 59 [LOOPBACK_PCS] = "PCS", 60 [LOOPBACK_PMAPMD] = "PMA/PMD", 61 [LOOPBACK_XPORT] = "XPORT", 62 [LOOPBACK_XGMII_WS] = "XGMII_WS", 63 [LOOPBACK_XAUI_WS] = "XAUI_WS", 64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", 65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", 66 [LOOPBACK_GMII_WS] = "GMII_WS", 67 [LOOPBACK_XFI_WS] = "XFI_WS", 68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", 69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS", 70}; 71 72const unsigned int efx_reset_type_max = RESET_TYPE_MAX; 73const char *const efx_reset_type_names[] = { 74 [RESET_TYPE_INVISIBLE] = "INVISIBLE", 75 [RESET_TYPE_ALL] = "ALL", 76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 77 [RESET_TYPE_WORLD] = "WORLD", 78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 79 [RESET_TYPE_DISABLE] = "DISABLE", 80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 81 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY", 83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", 84 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 86}; 87 88/* Reset workqueue. If any NIC has a hardware failure then a reset will be 89 * queued onto this work queue. This is not a per-nic work queue, because 90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. 91 */ 92static struct workqueue_struct *reset_workqueue; 93 94/************************************************************************** 95 * 96 * Configurable values 97 * 98 *************************************************************************/ 99 100/* 101 * Use separate channels for TX and RX events 102 * 103 * Set this to 1 to use separate channels for TX and RX. It allows us 104 * to control interrupt affinity separately for TX and RX. 105 * 106 * This is only used in MSI-X interrupt mode 107 */ 108static bool separate_tx_channels; 109module_param(separate_tx_channels, bool, 0444); 110MODULE_PARM_DESC(separate_tx_channels, 111 "Use separate channels for TX and RX"); 112 113/* This is the weight assigned to each of the (per-channel) virtual 114 * NAPI devices. 115 */ 116static int napi_weight = 64; 117 118/* This is the time (in jiffies) between invocations of the hardware 119 * monitor. 120 * On Falcon-based NICs, this will: 121 * - Check the on-board hardware monitor; 122 * - Poll the link state and reconfigure the hardware as necessary. 123 * On Siena-based NICs for power systems with EEH support, this will give EEH a 124 * chance to start. 125 */ 126static unsigned int efx_monitor_interval = 1 * HZ; 127 128/* Initial interrupt moderation settings. They can be modified after 129 * module load with ethtool. 130 * 131 * The default for RX should strike a balance between increasing the 132 * round-trip latency and reducing overhead. 133 */ 134static unsigned int rx_irq_mod_usec = 60; 135 136/* Initial interrupt moderation settings. They can be modified after 137 * module load with ethtool. 138 * 139 * This default is chosen to ensure that a 10G link does not go idle 140 * while a TX queue is stopped after it has become full. A queue is 141 * restarted when it drops below half full. The time this takes (assuming 142 * worst case 3 descriptors per packet and 1024 descriptors) is 143 * 512 / 3 * 1.2 = 205 usec. 144 */ 145static unsigned int tx_irq_mod_usec = 150; 146 147/* This is the first interrupt mode to try out of: 148 * 0 => MSI-X 149 * 1 => MSI 150 * 2 => legacy 151 */ 152static unsigned int interrupt_mode; 153 154/* This is the requested number of CPUs to use for Receive-Side Scaling (RSS), 155 * i.e. the number of CPUs among which we may distribute simultaneous 156 * interrupt handling. 157 * 158 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt. 159 * The default (0) means to assign an interrupt to each core. 160 */ 161static unsigned int rss_cpus; 162module_param(rss_cpus, uint, 0444); 163MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling"); 164 165static bool phy_flash_cfg; 166module_param(phy_flash_cfg, bool, 0644); 167MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); 168 169static unsigned irq_adapt_low_thresh = 8000; 170module_param(irq_adapt_low_thresh, uint, 0644); 171MODULE_PARM_DESC(irq_adapt_low_thresh, 172 "Threshold score for reducing IRQ moderation"); 173 174static unsigned irq_adapt_high_thresh = 16000; 175module_param(irq_adapt_high_thresh, uint, 0644); 176MODULE_PARM_DESC(irq_adapt_high_thresh, 177 "Threshold score for increasing IRQ moderation"); 178 179static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | 180 NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 181 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | 182 NETIF_MSG_TX_ERR | NETIF_MSG_HW); 183module_param(debug, uint, 0); 184MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); 185 186/************************************************************************** 187 * 188 * Utility functions and prototypes 189 * 190 *************************************************************************/ 191 192static int efx_soft_enable_interrupts(struct efx_nic *efx); 193static void efx_soft_disable_interrupts(struct efx_nic *efx); 194static void efx_remove_channel(struct efx_channel *channel); 195static void efx_remove_channels(struct efx_nic *efx); 196static const struct efx_channel_type efx_default_channel_type; 197static void efx_remove_port(struct efx_nic *efx); 198static void efx_init_napi_channel(struct efx_channel *channel); 199static void efx_fini_napi(struct efx_nic *efx); 200static void efx_fini_napi_channel(struct efx_channel *channel); 201static void efx_fini_struct(struct efx_nic *efx); 202static void efx_start_all(struct efx_nic *efx); 203static void efx_stop_all(struct efx_nic *efx); 204 205#define EFX_ASSERT_RESET_SERIALISED(efx) \ 206 do { \ 207 if ((efx->state == STATE_READY) || \ 208 (efx->state == STATE_RECOVERY) || \ 209 (efx->state == STATE_DISABLED)) \ 210 ASSERT_RTNL(); \ 211 } while (0) 212 213static int efx_check_disabled(struct efx_nic *efx) 214{ 215 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { 216 netif_err(efx, drv, efx->net_dev, 217 "device is disabled due to earlier errors\n"); 218 return -EIO; 219 } 220 return 0; 221} 222 223/************************************************************************** 224 * 225 * Event queue processing 226 * 227 *************************************************************************/ 228 229/* Process channel's event queue 230 * 231 * This function is responsible for processing the event queue of a 232 * single channel. The caller must guarantee that this function will 233 * never be concurrently called more than once on the same channel, 234 * though different channels may be being processed concurrently. 235 */ 236static int efx_process_channel(struct efx_channel *channel, int budget) 237{ 238 int spent; 239 240 if (unlikely(!channel->enabled)) 241 return 0; 242 243 spent = efx_nic_process_eventq(channel, budget); 244 if (spent && efx_channel_has_rx_queue(channel)) { 245 struct efx_rx_queue *rx_queue = 246 efx_channel_get_rx_queue(channel); 247 248 efx_rx_flush_packet(channel); 249 efx_fast_push_rx_descriptors(rx_queue); 250 } 251 252 return spent; 253} 254 255/* NAPI poll handler 256 * 257 * NAPI guarantees serialisation of polls of the same device, which 258 * provides the guarantee required by efx_process_channel(). 259 */ 260static int efx_poll(struct napi_struct *napi, int budget) 261{ 262 struct efx_channel *channel = 263 container_of(napi, struct efx_channel, napi_str); 264 struct efx_nic *efx = channel->efx; 265 int spent; 266 267 netif_vdbg(efx, intr, efx->net_dev, 268 "channel %d NAPI poll executing on CPU %d\n", 269 channel->channel, raw_smp_processor_id()); 270 271 spent = efx_process_channel(channel, budget); 272 273 if (spent < budget) { 274 if (efx_channel_has_rx_queue(channel) && 275 efx->irq_rx_adaptive && 276 unlikely(++channel->irq_count == 1000)) { 277 if (unlikely(channel->irq_mod_score < 278 irq_adapt_low_thresh)) { 279 if (channel->irq_moderation > 1) { 280 channel->irq_moderation -= 1; 281 efx->type->push_irq_moderation(channel); 282 } 283 } else if (unlikely(channel->irq_mod_score > 284 irq_adapt_high_thresh)) { 285 if (channel->irq_moderation < 286 efx->irq_rx_moderation) { 287 channel->irq_moderation += 1; 288 efx->type->push_irq_moderation(channel); 289 } 290 } 291 channel->irq_count = 0; 292 channel->irq_mod_score = 0; 293 } 294 295 efx_filter_rfs_expire(channel); 296 297 /* There is no race here; although napi_disable() will 298 * only wait for napi_complete(), this isn't a problem 299 * since efx_nic_eventq_read_ack() will have no effect if 300 * interrupts have already been disabled. 301 */ 302 napi_complete(napi); 303 efx_nic_eventq_read_ack(channel); 304 } 305 306 return spent; 307} 308 309/* Create event queue 310 * Event queue memory allocations are done only once. If the channel 311 * is reset, the memory buffer will be reused; this guards against 312 * errors during channel reset and also simplifies interrupt handling. 313 */ 314static int efx_probe_eventq(struct efx_channel *channel) 315{ 316 struct efx_nic *efx = channel->efx; 317 unsigned long entries; 318 319 netif_dbg(efx, probe, efx->net_dev, 320 "chan %d create event queue\n", channel->channel); 321 322 /* Build an event queue with room for one event per tx and rx buffer, 323 * plus some extra for link state events and MCDI completions. */ 324 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); 325 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE); 326 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1; 327 328 return efx_nic_probe_eventq(channel); 329} 330 331/* Prepare channel's event queue */ 332static int efx_init_eventq(struct efx_channel *channel) 333{ 334 struct efx_nic *efx = channel->efx; 335 int rc; 336 337 EFX_WARN_ON_PARANOID(channel->eventq_init); 338 339 netif_dbg(efx, drv, efx->net_dev, 340 "chan %d init event queue\n", channel->channel); 341 342 rc = efx_nic_init_eventq(channel); 343 if (rc == 0) { 344 efx->type->push_irq_moderation(channel); 345 channel->eventq_read_ptr = 0; 346 channel->eventq_init = true; 347 } 348 return rc; 349} 350 351/* Enable event queue processing and NAPI */ 352static void efx_start_eventq(struct efx_channel *channel) 353{ 354 netif_dbg(channel->efx, ifup, channel->efx->net_dev, 355 "chan %d start event queue\n", channel->channel); 356 357 /* Make sure the NAPI handler sees the enabled flag set */ 358 channel->enabled = true; 359 smp_wmb(); 360 361 napi_enable(&channel->napi_str); 362 efx_nic_eventq_read_ack(channel); 363} 364 365/* Disable event queue processing and NAPI */ 366static void efx_stop_eventq(struct efx_channel *channel) 367{ 368 if (!channel->enabled) 369 return; 370 371 napi_disable(&channel->napi_str); 372 channel->enabled = false; 373} 374 375static void efx_fini_eventq(struct efx_channel *channel) 376{ 377 if (!channel->eventq_init) 378 return; 379 380 netif_dbg(channel->efx, drv, channel->efx->net_dev, 381 "chan %d fini event queue\n", channel->channel); 382 383 efx_nic_fini_eventq(channel); 384 channel->eventq_init = false; 385} 386 387static void efx_remove_eventq(struct efx_channel *channel) 388{ 389 netif_dbg(channel->efx, drv, channel->efx->net_dev, 390 "chan %d remove event queue\n", channel->channel); 391 392 efx_nic_remove_eventq(channel); 393} 394 395/************************************************************************** 396 * 397 * Channel handling 398 * 399 *************************************************************************/ 400 401/* Allocate and initialise a channel structure. */ 402static struct efx_channel * 403efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel) 404{ 405 struct efx_channel *channel; 406 struct efx_rx_queue *rx_queue; 407 struct efx_tx_queue *tx_queue; 408 int j; 409 410 channel = kzalloc(sizeof(*channel), GFP_KERNEL); 411 if (!channel) 412 return NULL; 413 414 channel->efx = efx; 415 channel->channel = i; 416 channel->type = &efx_default_channel_type; 417 418 for (j = 0; j < EFX_TXQ_TYPES; j++) { 419 tx_queue = &channel->tx_queue[j]; 420 tx_queue->efx = efx; 421 tx_queue->queue = i * EFX_TXQ_TYPES + j; 422 tx_queue->channel = channel; 423 } 424 425 rx_queue = &channel->rx_queue; 426 rx_queue->efx = efx; 427 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 428 (unsigned long)rx_queue); 429 430 return channel; 431} 432 433/* Allocate and initialise a channel structure, copying parameters 434 * (but not resources) from an old channel structure. 435 */ 436static struct efx_channel * 437efx_copy_channel(const struct efx_channel *old_channel) 438{ 439 struct efx_channel *channel; 440 struct efx_rx_queue *rx_queue; 441 struct efx_tx_queue *tx_queue; 442 int j; 443 444 channel = kmalloc(sizeof(*channel), GFP_KERNEL); 445 if (!channel) 446 return NULL; 447 448 *channel = *old_channel; 449 450 channel->napi_dev = NULL; 451 memset(&channel->eventq, 0, sizeof(channel->eventq)); 452 453 for (j = 0; j < EFX_TXQ_TYPES; j++) { 454 tx_queue = &channel->tx_queue[j]; 455 if (tx_queue->channel) 456 tx_queue->channel = channel; 457 tx_queue->buffer = NULL; 458 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); 459 } 460 461 rx_queue = &channel->rx_queue; 462 rx_queue->buffer = NULL; 463 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); 464 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 465 (unsigned long)rx_queue); 466 467 return channel; 468} 469 470static int efx_probe_channel(struct efx_channel *channel) 471{ 472 struct efx_tx_queue *tx_queue; 473 struct efx_rx_queue *rx_queue; 474 int rc; 475 476 netif_dbg(channel->efx, probe, channel->efx->net_dev, 477 "creating channel %d\n", channel->channel); 478 479 rc = channel->type->pre_probe(channel); 480 if (rc) 481 goto fail; 482 483 rc = efx_probe_eventq(channel); 484 if (rc) 485 goto fail; 486 487 efx_for_each_channel_tx_queue(tx_queue, channel) { 488 rc = efx_probe_tx_queue(tx_queue); 489 if (rc) 490 goto fail; 491 } 492 493 efx_for_each_channel_rx_queue(rx_queue, channel) { 494 rc = efx_probe_rx_queue(rx_queue); 495 if (rc) 496 goto fail; 497 } 498 499 channel->n_rx_frm_trunc = 0; 500 501 return 0; 502 503fail: 504 efx_remove_channel(channel); 505 return rc; 506} 507 508static void 509efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len) 510{ 511 struct efx_nic *efx = channel->efx; 512 const char *type; 513 int number; 514 515 number = channel->channel; 516 if (efx->tx_channel_offset == 0) { 517 type = ""; 518 } else if (channel->channel < efx->tx_channel_offset) { 519 type = "-rx"; 520 } else { 521 type = "-tx"; 522 number -= efx->tx_channel_offset; 523 } 524 snprintf(buf, len, "%s%s-%d", efx->name, type, number); 525} 526 527static void efx_set_channel_names(struct efx_nic *efx) 528{ 529 struct efx_channel *channel; 530 531 efx_for_each_channel(channel, efx) 532 channel->type->get_name(channel, 533 efx->msi_context[channel->channel].name, 534 sizeof(efx->msi_context[0].name)); 535} 536 537static int efx_probe_channels(struct efx_nic *efx) 538{ 539 struct efx_channel *channel; 540 int rc; 541 542 /* Restart special buffer allocation */ 543 efx->next_buffer_table = 0; 544 545 /* Probe channels in reverse, so that any 'extra' channels 546 * use the start of the buffer table. This allows the traffic 547 * channels to be resized without moving them or wasting the 548 * entries before them. 549 */ 550 efx_for_each_channel_rev(channel, efx) { 551 rc = efx_probe_channel(channel); 552 if (rc) { 553 netif_err(efx, probe, efx->net_dev, 554 "failed to create channel %d\n", 555 channel->channel); 556 goto fail; 557 } 558 } 559 efx_set_channel_names(efx); 560 561 return 0; 562 563fail: 564 efx_remove_channels(efx); 565 return rc; 566} 567 568/* Channels are shutdown and reinitialised whilst the NIC is running 569 * to propagate configuration changes (mtu, checksum offload), or 570 * to clear hardware error conditions 571 */ 572static void efx_start_datapath(struct efx_nic *efx) 573{ 574 bool old_rx_scatter = efx->rx_scatter; 575 struct efx_tx_queue *tx_queue; 576 struct efx_rx_queue *rx_queue; 577 struct efx_channel *channel; 578 size_t rx_buf_len; 579 580 /* Calculate the rx buffer allocation parameters required to 581 * support the current MTU, including padding for header 582 * alignment and overruns. 583 */ 584 efx->rx_dma_len = (efx->rx_prefix_size + 585 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + 586 efx->type->rx_buffer_padding); 587 rx_buf_len = (sizeof(struct efx_rx_page_state) + 588 NET_IP_ALIGN + efx->rx_dma_len); 589 if (rx_buf_len <= PAGE_SIZE) { 590 efx->rx_scatter = efx->type->always_rx_scatter; 591 efx->rx_buffer_order = 0; 592 } else if (efx->type->can_rx_scatter) { 593 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES); 594 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 595 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE, 596 EFX_RX_BUF_ALIGNMENT) > 597 PAGE_SIZE); 598 efx->rx_scatter = true; 599 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; 600 efx->rx_buffer_order = 0; 601 } else { 602 efx->rx_scatter = false; 603 efx->rx_buffer_order = get_order(rx_buf_len); 604 } 605 606 efx_rx_config_page_split(efx); 607 if (efx->rx_buffer_order) 608 netif_dbg(efx, drv, efx->net_dev, 609 "RX buf len=%u; page order=%u batch=%u\n", 610 efx->rx_dma_len, efx->rx_buffer_order, 611 efx->rx_pages_per_batch); 612 else 613 netif_dbg(efx, drv, efx->net_dev, 614 "RX buf len=%u step=%u bpp=%u; page batch=%u\n", 615 efx->rx_dma_len, efx->rx_page_buf_step, 616 efx->rx_bufs_per_page, efx->rx_pages_per_batch); 617 618 /* RX filters may also have scatter-enabled flags */ 619 if (efx->rx_scatter != old_rx_scatter) 620 efx->type->filter_update_rx_scatter(efx); 621 622 /* We must keep at least one descriptor in a TX ring empty. 623 * We could avoid this when the queue size does not exactly 624 * match the hardware ring size, but it's not that important. 625 * Therefore we stop the queue when one more skb might fill 626 * the ring completely. We wake it when half way back to 627 * empty. 628 */ 629 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); 630 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; 631 632 /* Initialise the channels */ 633 efx_for_each_channel(channel, efx) { 634 efx_for_each_channel_tx_queue(tx_queue, channel) { 635 efx_init_tx_queue(tx_queue); 636 atomic_inc(&efx->active_queues); 637 } 638 639 efx_for_each_channel_rx_queue(rx_queue, channel) { 640 efx_init_rx_queue(rx_queue); 641 atomic_inc(&efx->active_queues); 642 efx_nic_generate_fill_event(rx_queue); 643 } 644 645 WARN_ON(channel->rx_pkt_n_frags); 646 } 647 648 if (netif_device_present(efx->net_dev)) 649 netif_tx_wake_all_queues(efx->net_dev); 650} 651 652static void efx_stop_datapath(struct efx_nic *efx) 653{ 654 struct efx_channel *channel; 655 struct efx_tx_queue *tx_queue; 656 struct efx_rx_queue *rx_queue; 657 int rc; 658 659 EFX_ASSERT_RESET_SERIALISED(efx); 660 BUG_ON(efx->port_enabled); 661 662 /* Stop RX refill */ 663 efx_for_each_channel(channel, efx) { 664 efx_for_each_channel_rx_queue(rx_queue, channel) 665 rx_queue->refill_enabled = false; 666 } 667 668 efx_for_each_channel(channel, efx) { 669 /* RX packet processing is pipelined, so wait for the 670 * NAPI handler to complete. At least event queue 0 671 * might be kept active by non-data events, so don't 672 * use napi_synchronize() but actually disable NAPI 673 * temporarily. 674 */ 675 if (efx_channel_has_rx_queue(channel)) { 676 efx_stop_eventq(channel); 677 efx_start_eventq(channel); 678 } 679 } 680 681 rc = efx->type->fini_dmaq(efx); 682 if (rc && EFX_WORKAROUND_7803(efx)) { 683 /* Schedule a reset to recover from the flush failure. The 684 * descriptor caches reference memory we're about to free, 685 * but falcon_reconfigure_mac_wrapper() won't reconnect 686 * the MACs because of the pending reset. 687 */ 688 netif_err(efx, drv, efx->net_dev, 689 "Resetting to recover from flush failure\n"); 690 efx_schedule_reset(efx, RESET_TYPE_ALL); 691 } else if (rc) { 692 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); 693 } else { 694 netif_dbg(efx, drv, efx->net_dev, 695 "successfully flushed all queues\n"); 696 } 697 698 efx_for_each_channel(channel, efx) { 699 efx_for_each_channel_rx_queue(rx_queue, channel) 700 efx_fini_rx_queue(rx_queue); 701 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 702 efx_fini_tx_queue(tx_queue); 703 } 704} 705 706static void efx_remove_channel(struct efx_channel *channel) 707{ 708 struct efx_tx_queue *tx_queue; 709 struct efx_rx_queue *rx_queue; 710 711 netif_dbg(channel->efx, drv, channel->efx->net_dev, 712 "destroy chan %d\n", channel->channel); 713 714 efx_for_each_channel_rx_queue(rx_queue, channel) 715 efx_remove_rx_queue(rx_queue); 716 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 717 efx_remove_tx_queue(tx_queue); 718 efx_remove_eventq(channel); 719 channel->type->post_remove(channel); 720} 721 722static void efx_remove_channels(struct efx_nic *efx) 723{ 724 struct efx_channel *channel; 725 726 efx_for_each_channel(channel, efx) 727 efx_remove_channel(channel); 728} 729 730int 731efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) 732{ 733 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; 734 u32 old_rxq_entries, old_txq_entries; 735 unsigned i, next_buffer_table = 0; 736 int rc, rc2; 737 738 rc = efx_check_disabled(efx); 739 if (rc) 740 return rc; 741 742 /* Not all channels should be reallocated. We must avoid 743 * reallocating their buffer table entries. 744 */ 745 efx_for_each_channel(channel, efx) { 746 struct efx_rx_queue *rx_queue; 747 struct efx_tx_queue *tx_queue; 748 749 if (channel->type->copy) 750 continue; 751 next_buffer_table = max(next_buffer_table, 752 channel->eventq.index + 753 channel->eventq.entries); 754 efx_for_each_channel_rx_queue(rx_queue, channel) 755 next_buffer_table = max(next_buffer_table, 756 rx_queue->rxd.index + 757 rx_queue->rxd.entries); 758 efx_for_each_channel_tx_queue(tx_queue, channel) 759 next_buffer_table = max(next_buffer_table, 760 tx_queue->txd.index + 761 tx_queue->txd.entries); 762 } 763 764 efx_device_detach_sync(efx); 765 efx_stop_all(efx); 766 efx_soft_disable_interrupts(efx); 767 768 /* Clone channels (where possible) */ 769 memset(other_channel, 0, sizeof(other_channel)); 770 for (i = 0; i < efx->n_channels; i++) { 771 channel = efx->channel[i]; 772 if (channel->type->copy) 773 channel = channel->type->copy(channel); 774 if (!channel) { 775 rc = -ENOMEM; 776 goto out; 777 } 778 other_channel[i] = channel; 779 } 780 781 /* Swap entry counts and channel pointers */ 782 old_rxq_entries = efx->rxq_entries; 783 old_txq_entries = efx->txq_entries; 784 efx->rxq_entries = rxq_entries; 785 efx->txq_entries = txq_entries; 786 for (i = 0; i < efx->n_channels; i++) { 787 channel = efx->channel[i]; 788 efx->channel[i] = other_channel[i]; 789 other_channel[i] = channel; 790 } 791 792 /* Restart buffer table allocation */ 793 efx->next_buffer_table = next_buffer_table; 794 795 for (i = 0; i < efx->n_channels; i++) { 796 channel = efx->channel[i]; 797 if (!channel->type->copy) 798 continue; 799 rc = efx_probe_channel(channel); 800 if (rc) 801 goto rollback; 802 efx_init_napi_channel(efx->channel[i]); 803 } 804 805out: 806 /* Destroy unused channel structures */ 807 for (i = 0; i < efx->n_channels; i++) { 808 channel = other_channel[i]; 809 if (channel && channel->type->copy) { 810 efx_fini_napi_channel(channel); 811 efx_remove_channel(channel); 812 kfree(channel); 813 } 814 } 815 816 rc2 = efx_soft_enable_interrupts(efx); 817 if (rc2) { 818 rc = rc ? rc : rc2; 819 netif_err(efx, drv, efx->net_dev, 820 "unable to restart interrupts on channel reallocation\n"); 821 efx_schedule_reset(efx, RESET_TYPE_DISABLE); 822 } else { 823 efx_start_all(efx); 824 netif_device_attach(efx->net_dev); 825 } 826 return rc; 827 828rollback: 829 /* Swap back */ 830 efx->rxq_entries = old_rxq_entries; 831 efx->txq_entries = old_txq_entries; 832 for (i = 0; i < efx->n_channels; i++) { 833 channel = efx->channel[i]; 834 efx->channel[i] = other_channel[i]; 835 other_channel[i] = channel; 836 } 837 goto out; 838} 839 840void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) 841{ 842 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); 843} 844 845static const struct efx_channel_type efx_default_channel_type = { 846 .pre_probe = efx_channel_dummy_op_int, 847 .post_remove = efx_channel_dummy_op_void, 848 .get_name = efx_get_channel_name, 849 .copy = efx_copy_channel, 850 .keep_eventq = false, 851}; 852 853int efx_channel_dummy_op_int(struct efx_channel *channel) 854{ 855 return 0; 856} 857 858void efx_channel_dummy_op_void(struct efx_channel *channel) 859{ 860} 861 862/************************************************************************** 863 * 864 * Port handling 865 * 866 **************************************************************************/ 867 868/* This ensures that the kernel is kept informed (via 869 * netif_carrier_on/off) of the link status, and also maintains the 870 * link status's stop on the port's TX queue. 871 */ 872void efx_link_status_changed(struct efx_nic *efx) 873{ 874 struct efx_link_state *link_state = &efx->link_state; 875 876 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure 877 * that no events are triggered between unregister_netdev() and the 878 * driver unloading. A more general condition is that NETDEV_CHANGE 879 * can only be generated between NETDEV_UP and NETDEV_DOWN */ 880 if (!netif_running(efx->net_dev)) 881 return; 882 883 if (link_state->up != netif_carrier_ok(efx->net_dev)) { 884 efx->n_link_state_changes++; 885 886 if (link_state->up) 887 netif_carrier_on(efx->net_dev); 888 else 889 netif_carrier_off(efx->net_dev); 890 } 891 892 /* Status message for kernel log */ 893 if (link_state->up) 894 netif_info(efx, link, efx->net_dev, 895 "link up at %uMbps %s-duplex (MTU %d)\n", 896 link_state->speed, link_state->fd ? "full" : "half", 897 efx->net_dev->mtu); 898 else 899 netif_info(efx, link, efx->net_dev, "link down\n"); 900} 901 902void efx_link_set_advertising(struct efx_nic *efx, u32 advertising) 903{ 904 efx->link_advertising = advertising; 905 if (advertising) { 906 if (advertising & ADVERTISED_Pause) 907 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX); 908 else 909 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); 910 if (advertising & ADVERTISED_Asym_Pause) 911 efx->wanted_fc ^= EFX_FC_TX; 912 } 913} 914 915void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) 916{ 917 efx->wanted_fc = wanted_fc; 918 if (efx->link_advertising) { 919 if (wanted_fc & EFX_FC_RX) 920 efx->link_advertising |= (ADVERTISED_Pause | 921 ADVERTISED_Asym_Pause); 922 else 923 efx->link_advertising &= ~(ADVERTISED_Pause | 924 ADVERTISED_Asym_Pause); 925 if (wanted_fc & EFX_FC_TX) 926 efx->link_advertising ^= ADVERTISED_Asym_Pause; 927 } 928} 929 930static void efx_fini_port(struct efx_nic *efx); 931 932/* Push loopback/power/transmit disable settings to the PHY, and reconfigure 933 * the MAC appropriately. All other PHY configuration changes are pushed 934 * through phy_op->set_settings(), and pushed asynchronously to the MAC 935 * through efx_monitor(). 936 * 937 * Callers must hold the mac_lock 938 */ 939int __efx_reconfigure_port(struct efx_nic *efx) 940{ 941 enum efx_phy_mode phy_mode; 942 int rc; 943 944 WARN_ON(!mutex_is_locked(&efx->mac_lock)); 945 946 /* Disable PHY transmit in mac level loopbacks */ 947 phy_mode = efx->phy_mode; 948 if (LOOPBACK_INTERNAL(efx)) 949 efx->phy_mode |= PHY_MODE_TX_DISABLED; 950 else 951 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; 952 953 rc = efx->type->reconfigure_port(efx); 954 955 if (rc) 956 efx->phy_mode = phy_mode; 957 958 return rc; 959} 960 961/* Reinitialise the MAC to pick up new PHY settings, even if the port is 962 * disabled. */ 963int efx_reconfigure_port(struct efx_nic *efx) 964{ 965 int rc; 966 967 EFX_ASSERT_RESET_SERIALISED(efx); 968 969 mutex_lock(&efx->mac_lock); 970 rc = __efx_reconfigure_port(efx); 971 mutex_unlock(&efx->mac_lock); 972 973 return rc; 974} 975 976/* Asynchronous work item for changing MAC promiscuity and multicast 977 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current 978 * MAC directly. */ 979static void efx_mac_work(struct work_struct *data) 980{ 981 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); 982 983 mutex_lock(&efx->mac_lock); 984 if (efx->port_enabled) 985 efx->type->reconfigure_mac(efx); 986 mutex_unlock(&efx->mac_lock); 987} 988 989static int efx_probe_port(struct efx_nic *efx) 990{ 991 int rc; 992 993 netif_dbg(efx, probe, efx->net_dev, "create port\n"); 994 995 if (phy_flash_cfg) 996 efx->phy_mode = PHY_MODE_SPECIAL; 997 998 /* Connect up MAC/PHY operations table */ 999 rc = efx->type->probe_port(efx); 1000 if (rc) 1001 return rc; 1002 1003 /* Initialise MAC address to permanent address */ 1004 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN); 1005 1006 return 0; 1007} 1008 1009static int efx_init_port(struct efx_nic *efx) 1010{ 1011 int rc; 1012 1013 netif_dbg(efx, drv, efx->net_dev, "init port\n"); 1014 1015 mutex_lock(&efx->mac_lock); 1016 1017 rc = efx->phy_op->init(efx); 1018 if (rc) 1019 goto fail1; 1020 1021 efx->port_initialized = true; 1022 1023 /* Reconfigure the MAC before creating dma queues (required for 1024 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */ 1025 efx->type->reconfigure_mac(efx); 1026 1027 /* Ensure the PHY advertises the correct flow control settings */ 1028 rc = efx->phy_op->reconfigure(efx); 1029 if (rc) 1030 goto fail2; 1031 1032 mutex_unlock(&efx->mac_lock); 1033 return 0; 1034 1035fail2: 1036 efx->phy_op->fini(efx); 1037fail1: 1038 mutex_unlock(&efx->mac_lock); 1039 return rc; 1040} 1041 1042static void efx_start_port(struct efx_nic *efx) 1043{ 1044 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); 1045 BUG_ON(efx->port_enabled); 1046 1047 mutex_lock(&efx->mac_lock); 1048 efx->port_enabled = true; 1049 1050 /* efx_mac_work() might have been scheduled after efx_stop_port(), 1051 * and then cancelled by efx_flush_all() */ 1052 efx->type->reconfigure_mac(efx); 1053 1054 mutex_unlock(&efx->mac_lock); 1055} 1056 1057/* Prevent efx_mac_work() and efx_monitor() from working */ 1058static void efx_stop_port(struct efx_nic *efx) 1059{ 1060 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); 1061 1062 mutex_lock(&efx->mac_lock); 1063 efx->port_enabled = false; 1064 mutex_unlock(&efx->mac_lock); 1065 1066 /* Serialise against efx_set_multicast_list() */ 1067 netif_addr_lock_bh(efx->net_dev); 1068 netif_addr_unlock_bh(efx->net_dev); 1069} 1070 1071static void efx_fini_port(struct efx_nic *efx) 1072{ 1073 netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); 1074 1075 if (!efx->port_initialized) 1076 return; 1077 1078 efx->phy_op->fini(efx); 1079 efx->port_initialized = false; 1080 1081 efx->link_state.up = false; 1082 efx_link_status_changed(efx); 1083} 1084 1085static void efx_remove_port(struct efx_nic *efx) 1086{ 1087 netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); 1088 1089 efx->type->remove_port(efx); 1090} 1091 1092/************************************************************************** 1093 * 1094 * NIC handling 1095 * 1096 **************************************************************************/ 1097 1098/* This configures the PCI device to enable I/O and DMA. */ 1099static int efx_init_io(struct efx_nic *efx) 1100{ 1101 struct pci_dev *pci_dev = efx->pci_dev; 1102 dma_addr_t dma_mask = efx->type->max_dma_mask; 1103 unsigned int mem_map_size = efx->type->mem_map_size(efx); 1104 int rc; 1105 1106 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); 1107 1108 rc = pci_enable_device(pci_dev); 1109 if (rc) { 1110 netif_err(efx, probe, efx->net_dev, 1111 "failed to enable PCI device\n"); 1112 goto fail1; 1113 } 1114 1115 pci_set_master(pci_dev); 1116 1117 /* Set the PCI DMA mask. Try all possibilities from our 1118 * genuine mask down to 32 bits, because some architectures 1119 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit 1120 * masks event though they reject 46 bit masks. 1121 */ 1122 while (dma_mask > 0x7fffffffUL) { 1123 if (dma_supported(&pci_dev->dev, dma_mask)) { 1124 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); 1125 if (rc == 0) 1126 break; 1127 } 1128 dma_mask >>= 1; 1129 } 1130 if (rc) { 1131 netif_err(efx, probe, efx->net_dev, 1132 "could not find a suitable DMA mask\n"); 1133 goto fail2; 1134 } 1135 netif_dbg(efx, probe, efx->net_dev, 1136 "using DMA mask %llx\n", (unsigned long long) dma_mask); 1137 1138 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR); 1139 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc"); 1140 if (rc) { 1141 netif_err(efx, probe, efx->net_dev, 1142 "request for memory BAR failed\n"); 1143 rc = -EIO; 1144 goto fail3; 1145 } 1146 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); 1147 if (!efx->membase) { 1148 netif_err(efx, probe, efx->net_dev, 1149 "could not map memory BAR at %llx+%x\n", 1150 (unsigned long long)efx->membase_phys, mem_map_size); 1151 rc = -ENOMEM; 1152 goto fail4; 1153 } 1154 netif_dbg(efx, probe, efx->net_dev, 1155 "memory BAR at %llx+%x (virtual %p)\n", 1156 (unsigned long long)efx->membase_phys, mem_map_size, 1157 efx->membase); 1158 1159 return 0; 1160 1161 fail4: 1162 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1163 fail3: 1164 efx->membase_phys = 0; 1165 fail2: 1166 pci_disable_device(efx->pci_dev); 1167 fail1: 1168 return rc; 1169} 1170 1171static void efx_fini_io(struct efx_nic *efx) 1172{ 1173 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); 1174 1175 if (efx->membase) { 1176 iounmap(efx->membase); 1177 efx->membase = NULL; 1178 } 1179 1180 if (efx->membase_phys) { 1181 pci_release_region(efx->pci_dev, EFX_MEM_BAR); 1182 efx->membase_phys = 0; 1183 } 1184 1185 pci_disable_device(efx->pci_dev); 1186} 1187 1188static unsigned int efx_wanted_parallelism(struct efx_nic *efx) 1189{ 1190 cpumask_var_t thread_mask; 1191 unsigned int count; 1192 int cpu; 1193 1194 if (rss_cpus) { 1195 count = rss_cpus; 1196 } else { 1197 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) { 1198 netif_warn(efx, probe, efx->net_dev, 1199 "RSS disabled due to allocation failure\n"); 1200 return 1; 1201 } 1202 1203 count = 0; 1204 for_each_online_cpu(cpu) { 1205 if (!cpumask_test_cpu(cpu, thread_mask)) { 1206 ++count; 1207 cpumask_or(thread_mask, thread_mask, 1208 topology_thread_cpumask(cpu)); 1209 } 1210 } 1211 1212 free_cpumask_var(thread_mask); 1213 } 1214 1215 /* If RSS is requested for the PF *and* VFs then we can't write RSS 1216 * table entries that are inaccessible to VFs 1217 */ 1218 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 && 1219 count > efx_vf_size(efx)) { 1220 netif_warn(efx, probe, efx->net_dev, 1221 "Reducing number of RSS channels from %u to %u for " 1222 "VF support. Increase vf-msix-limit to use more " 1223 "channels on the PF.\n", 1224 count, efx_vf_size(efx)); 1225 count = efx_vf_size(efx); 1226 } 1227 1228 return count; 1229} 1230 1231/* Probe the number and type of interrupts we are able to obtain, and 1232 * the resulting numbers of channels and RX queues. 1233 */ 1234static int efx_probe_interrupts(struct efx_nic *efx) 1235{ 1236 unsigned int extra_channels = 0; 1237 unsigned int i, j; 1238 int rc; 1239 1240 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) 1241 if (efx->extra_channel_type[i]) 1242 ++extra_channels; 1243 1244 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { 1245 struct msix_entry xentries[EFX_MAX_CHANNELS]; 1246 unsigned int n_channels; 1247 1248 n_channels = efx_wanted_parallelism(efx); 1249 if (separate_tx_channels) 1250 n_channels *= 2; 1251 n_channels += extra_channels; 1252 n_channels = min(n_channels, efx->max_channels); 1253 1254 for (i = 0; i < n_channels; i++) 1255 xentries[i].entry = i; 1256 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels); 1257 if (rc > 0) { 1258 netif_err(efx, drv, efx->net_dev, 1259 "WARNING: Insufficient MSI-X vectors" 1260 " available (%d < %u).\n", rc, n_channels); 1261 netif_err(efx, drv, efx->net_dev, 1262 "WARNING: Performance may be reduced.\n"); 1263 EFX_BUG_ON_PARANOID(rc >= n_channels); 1264 n_channels = rc; 1265 rc = pci_enable_msix(efx->pci_dev, xentries, 1266 n_channels); 1267 } 1268 1269 if (rc == 0) { 1270 efx->n_channels = n_channels; 1271 if (n_channels > extra_channels) 1272 n_channels -= extra_channels; 1273 if (separate_tx_channels) { 1274 efx->n_tx_channels = max(n_channels / 2, 1U); 1275 efx->n_rx_channels = max(n_channels - 1276 efx->n_tx_channels, 1277 1U); 1278 } else { 1279 efx->n_tx_channels = n_channels; 1280 efx->n_rx_channels = n_channels; 1281 } 1282 for (i = 0; i < efx->n_channels; i++) 1283 efx_get_channel(efx, i)->irq = 1284 xentries[i].vector; 1285 } else { 1286 /* Fall back to single channel MSI */ 1287 efx->interrupt_mode = EFX_INT_MODE_MSI; 1288 netif_err(efx, drv, efx->net_dev, 1289 "could not enable MSI-X\n"); 1290 } 1291 } 1292 1293 /* Try single interrupt MSI */ 1294 if (efx->interrupt_mode == EFX_INT_MODE_MSI) { 1295 efx->n_channels = 1; 1296 efx->n_rx_channels = 1; 1297 efx->n_tx_channels = 1; 1298 rc = pci_enable_msi(efx->pci_dev); 1299 if (rc == 0) { 1300 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq; 1301 } else { 1302 netif_err(efx, drv, efx->net_dev, 1303 "could not enable MSI\n"); 1304 efx->interrupt_mode = EFX_INT_MODE_LEGACY; 1305 } 1306 } 1307 1308 /* Assume legacy interrupts */ 1309 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) { 1310 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0); 1311 efx->n_rx_channels = 1; 1312 efx->n_tx_channels = 1; 1313 efx->legacy_irq = efx->pci_dev->irq; 1314 } 1315 1316 /* Assign extra channels if possible */ 1317 j = efx->n_channels; 1318 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) { 1319 if (!efx->extra_channel_type[i]) 1320 continue; 1321 if (efx->interrupt_mode != EFX_INT_MODE_MSIX || 1322 efx->n_channels <= extra_channels) { 1323 efx->extra_channel_type[i]->handle_no_channel(efx); 1324 } else { 1325 --j; 1326 efx_get_channel(efx, j)->type = 1327 efx->extra_channel_type[i]; 1328 } 1329 } 1330 1331 /* RSS might be usable on VFs even if it is disabled on the PF */ 1332 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ? 1333 efx->n_rx_channels : efx_vf_size(efx)); 1334 1335 return 0; 1336} 1337 1338static int efx_soft_enable_interrupts(struct efx_nic *efx) 1339{ 1340 struct efx_channel *channel, *end_channel; 1341 int rc; 1342 1343 BUG_ON(efx->state == STATE_DISABLED); 1344 1345 efx->irq_soft_enabled = true; 1346 smp_wmb(); 1347 1348 efx_for_each_channel(channel, efx) { 1349 if (!channel->type->keep_eventq) { 1350 rc = efx_init_eventq(channel); 1351 if (rc) 1352 goto fail; 1353 } 1354 efx_start_eventq(channel); 1355 } 1356 1357 efx_mcdi_mode_event(efx); 1358 1359 return 0; 1360fail: 1361 end_channel = channel; 1362 efx_for_each_channel(channel, efx) { 1363 if (channel == end_channel) 1364 break; 1365 efx_stop_eventq(channel); 1366 if (!channel->type->keep_eventq) 1367 efx_fini_eventq(channel); 1368 } 1369 1370 return rc; 1371} 1372 1373static void efx_soft_disable_interrupts(struct efx_nic *efx) 1374{ 1375 struct efx_channel *channel; 1376 1377 if (efx->state == STATE_DISABLED) 1378 return; 1379 1380 efx_mcdi_mode_poll(efx); 1381 1382 efx->irq_soft_enabled = false; 1383 smp_wmb(); 1384 1385 if (efx->legacy_irq) 1386 synchronize_irq(efx->legacy_irq); 1387 1388 efx_for_each_channel(channel, efx) { 1389 if (channel->irq) 1390 synchronize_irq(channel->irq); 1391 1392 efx_stop_eventq(channel); 1393 if (!channel->type->keep_eventq) 1394 efx_fini_eventq(channel); 1395 } 1396 1397 /* Flush the asynchronous MCDI request queue */ 1398 efx_mcdi_flush_async(efx); 1399} 1400 1401static int efx_enable_interrupts(struct efx_nic *efx) 1402{ 1403 struct efx_channel *channel, *end_channel; 1404 int rc; 1405 1406 BUG_ON(efx->state == STATE_DISABLED); 1407 1408 if (efx->eeh_disabled_legacy_irq) { 1409 enable_irq(efx->legacy_irq); 1410 efx->eeh_disabled_legacy_irq = false; 1411 } 1412 1413 efx->type->irq_enable_master(efx); 1414 1415 efx_for_each_channel(channel, efx) { 1416 if (channel->type->keep_eventq) { 1417 rc = efx_init_eventq(channel); 1418 if (rc) 1419 goto fail; 1420 } 1421 } 1422 1423 rc = efx_soft_enable_interrupts(efx); 1424 if (rc) 1425 goto fail; 1426 1427 return 0; 1428 1429fail: 1430 end_channel = channel; 1431 efx_for_each_channel(channel, efx) { 1432 if (channel == end_channel) 1433 break; 1434 if (channel->type->keep_eventq) 1435 efx_fini_eventq(channel); 1436 } 1437 1438 efx->type->irq_disable_non_ev(efx); 1439 1440 return rc; 1441} 1442 1443static void efx_disable_interrupts(struct efx_nic *efx) 1444{ 1445 struct efx_channel *channel; 1446 1447 efx_soft_disable_interrupts(efx); 1448 1449 efx_for_each_channel(channel, efx) { 1450 if (channel->type->keep_eventq) 1451 efx_fini_eventq(channel); 1452 } 1453 1454 efx->type->irq_disable_non_ev(efx); 1455} 1456 1457static void efx_remove_interrupts(struct efx_nic *efx) 1458{ 1459 struct efx_channel *channel; 1460 1461 /* Remove MSI/MSI-X interrupts */ 1462 efx_for_each_channel(channel, efx) 1463 channel->irq = 0; 1464 pci_disable_msi(efx->pci_dev); 1465 pci_disable_msix(efx->pci_dev); 1466 1467 /* Remove legacy interrupt */ 1468 efx->legacy_irq = 0; 1469} 1470 1471static void efx_set_channels(struct efx_nic *efx) 1472{ 1473 struct efx_channel *channel; 1474 struct efx_tx_queue *tx_queue; 1475 1476 efx->tx_channel_offset = 1477 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0; 1478 1479 /* We need to mark which channels really have RX and TX 1480 * queues, and adjust the TX queue numbers if we have separate 1481 * RX-only and TX-only channels. 1482 */ 1483 efx_for_each_channel(channel, efx) { 1484 if (channel->channel < efx->n_rx_channels) 1485 channel->rx_queue.core_index = channel->channel; 1486 else 1487 channel->rx_queue.core_index = -1; 1488 1489 efx_for_each_channel_tx_queue(tx_queue, channel) 1490 tx_queue->queue -= (efx->tx_channel_offset * 1491 EFX_TXQ_TYPES); 1492 } 1493} 1494 1495static int efx_probe_nic(struct efx_nic *efx) 1496{ 1497 size_t i; 1498 int rc; 1499 1500 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); 1501 1502 /* Carry out hardware-type specific initialisation */ 1503 rc = efx->type->probe(efx); 1504 if (rc) 1505 return rc; 1506 1507 /* Determine the number of channels and queues by trying to hook 1508 * in MSI-X interrupts. */ 1509 rc = efx_probe_interrupts(efx); 1510 if (rc) 1511 goto fail1; 1512 1513 rc = efx->type->dimension_resources(efx); 1514 if (rc) 1515 goto fail2; 1516 1517 if (efx->n_channels > 1) 1518 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key)); 1519 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++) 1520 efx->rx_indir_table[i] = 1521 ethtool_rxfh_indir_default(i, efx->rss_spread); 1522 1523 efx_set_channels(efx); 1524 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); 1525 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); 1526 1527 /* Initialise the interrupt moderation settings */ 1528 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true, 1529 true); 1530 1531 return 0; 1532 1533fail2: 1534 efx_remove_interrupts(efx); 1535fail1: 1536 efx->type->remove(efx); 1537 return rc; 1538} 1539 1540static void efx_remove_nic(struct efx_nic *efx) 1541{ 1542 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); 1543 1544 efx_remove_interrupts(efx); 1545 efx->type->remove(efx); 1546} 1547 1548static int efx_probe_filters(struct efx_nic *efx) 1549{ 1550 int rc; 1551 1552 spin_lock_init(&efx->filter_lock); 1553 1554 rc = efx->type->filter_table_probe(efx); 1555 if (rc) 1556 return rc; 1557 1558#ifdef CONFIG_RFS_ACCEL 1559 if (efx->type->offload_features & NETIF_F_NTUPLE) { 1560 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters, 1561 sizeof(*efx->rps_flow_id), 1562 GFP_KERNEL); 1563 if (!efx->rps_flow_id) { 1564 efx->type->filter_table_remove(efx); 1565 return -ENOMEM; 1566 } 1567 } 1568#endif 1569 1570 return 0; 1571} 1572 1573static void efx_remove_filters(struct efx_nic *efx) 1574{ 1575#ifdef CONFIG_RFS_ACCEL 1576 kfree(efx->rps_flow_id); 1577#endif 1578 efx->type->filter_table_remove(efx); 1579} 1580 1581static void efx_restore_filters(struct efx_nic *efx) 1582{ 1583 efx->type->filter_table_restore(efx); 1584} 1585 1586/************************************************************************** 1587 * 1588 * NIC startup/shutdown 1589 * 1590 *************************************************************************/ 1591 1592static int efx_probe_all(struct efx_nic *efx) 1593{ 1594 int rc; 1595 1596 rc = efx_probe_nic(efx); 1597 if (rc) { 1598 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); 1599 goto fail1; 1600 } 1601 1602 rc = efx_probe_port(efx); 1603 if (rc) { 1604 netif_err(efx, probe, efx->net_dev, "failed to create port\n"); 1605 goto fail2; 1606 } 1607 1608 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT); 1609 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) { 1610 rc = -EINVAL; 1611 goto fail3; 1612 } 1613 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; 1614 1615 rc = efx_probe_filters(efx); 1616 if (rc) { 1617 netif_err(efx, probe, efx->net_dev, 1618 "failed to create filter tables\n"); 1619 goto fail3; 1620 } 1621 1622 rc = efx_probe_channels(efx); 1623 if (rc) 1624 goto fail4; 1625 1626 return 0; 1627 1628 fail4: 1629 efx_remove_filters(efx); 1630 fail3: 1631 efx_remove_port(efx); 1632 fail2: 1633 efx_remove_nic(efx); 1634 fail1: 1635 return rc; 1636} 1637 1638/* If the interface is supposed to be running but is not, start 1639 * the hardware and software data path, regular activity for the port 1640 * (MAC statistics, link polling, etc.) and schedule the port to be 1641 * reconfigured. Interrupts must already be enabled. This function 1642 * is safe to call multiple times, so long as the NIC is not disabled. 1643 * Requires the RTNL lock. 1644 */ 1645static void efx_start_all(struct efx_nic *efx) 1646{ 1647 EFX_ASSERT_RESET_SERIALISED(efx); 1648 BUG_ON(efx->state == STATE_DISABLED); 1649 1650 /* Check that it is appropriate to restart the interface. All 1651 * of these flags are safe to read under just the rtnl lock */ 1652 if (efx->port_enabled || !netif_running(efx->net_dev)) 1653 return; 1654 1655 efx_start_port(efx); 1656 efx_start_datapath(efx); 1657 1658 /* Start the hardware monitor if there is one */ 1659 if (efx->type->monitor != NULL) 1660 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1661 efx_monitor_interval); 1662 1663 /* If link state detection is normally event-driven, we have 1664 * to poll now because we could have missed a change 1665 */ 1666 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) { 1667 mutex_lock(&efx->mac_lock); 1668 if (efx->phy_op->poll(efx)) 1669 efx_link_status_changed(efx); 1670 mutex_unlock(&efx->mac_lock); 1671 } 1672 1673 efx->type->start_stats(efx); 1674} 1675 1676/* Flush all delayed work. Should only be called when no more delayed work 1677 * will be scheduled. This doesn't flush pending online resets (efx_reset), 1678 * since we're holding the rtnl_lock at this point. */ 1679static void efx_flush_all(struct efx_nic *efx) 1680{ 1681 /* Make sure the hardware monitor and event self-test are stopped */ 1682 cancel_delayed_work_sync(&efx->monitor_work); 1683 efx_selftest_async_cancel(efx); 1684 /* Stop scheduled port reconfigurations */ 1685 cancel_work_sync(&efx->mac_work); 1686} 1687 1688/* Quiesce the hardware and software data path, and regular activity 1689 * for the port without bringing the link down. Safe to call multiple 1690 * times with the NIC in almost any state, but interrupts should be 1691 * enabled. Requires the RTNL lock. 1692 */ 1693static void efx_stop_all(struct efx_nic *efx) 1694{ 1695 EFX_ASSERT_RESET_SERIALISED(efx); 1696 1697 /* port_enabled can be read safely under the rtnl lock */ 1698 if (!efx->port_enabled) 1699 return; 1700 1701 efx->type->stop_stats(efx); 1702 efx_stop_port(efx); 1703 1704 /* Flush efx_mac_work(), refill_workqueue, monitor_work */ 1705 efx_flush_all(efx); 1706 1707 /* Stop the kernel transmit interface. This is only valid if 1708 * the device is stopped or detached; otherwise the watchdog 1709 * may fire immediately. 1710 */ 1711 WARN_ON(netif_running(efx->net_dev) && 1712 netif_device_present(efx->net_dev)); 1713 netif_tx_disable(efx->net_dev); 1714 1715 efx_stop_datapath(efx); 1716} 1717 1718static void efx_remove_all(struct efx_nic *efx) 1719{ 1720 efx_remove_channels(efx); 1721 efx_remove_filters(efx); 1722 efx_remove_port(efx); 1723 efx_remove_nic(efx); 1724} 1725 1726/************************************************************************** 1727 * 1728 * Interrupt moderation 1729 * 1730 **************************************************************************/ 1731 1732static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns) 1733{ 1734 if (usecs == 0) 1735 return 0; 1736 if (usecs * 1000 < quantum_ns) 1737 return 1; /* never round down to 0 */ 1738 return usecs * 1000 / quantum_ns; 1739} 1740 1741/* Set interrupt moderation parameters */ 1742int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, 1743 unsigned int rx_usecs, bool rx_adaptive, 1744 bool rx_may_override_tx) 1745{ 1746 struct efx_channel *channel; 1747 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max * 1748 efx->timer_quantum_ns, 1749 1000); 1750 unsigned int tx_ticks; 1751 unsigned int rx_ticks; 1752 1753 EFX_ASSERT_RESET_SERIALISED(efx); 1754 1755 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max) 1756 return -EINVAL; 1757 1758 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns); 1759 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns); 1760 1761 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 && 1762 !rx_may_override_tx) { 1763 netif_err(efx, drv, efx->net_dev, "Channels are shared. " 1764 "RX and TX IRQ moderation must be equal\n"); 1765 return -EINVAL; 1766 } 1767 1768 efx->irq_rx_adaptive = rx_adaptive; 1769 efx->irq_rx_moderation = rx_ticks; 1770 efx_for_each_channel(channel, efx) { 1771 if (efx_channel_has_rx_queue(channel)) 1772 channel->irq_moderation = rx_ticks; 1773 else if (efx_channel_has_tx_queues(channel)) 1774 channel->irq_moderation = tx_ticks; 1775 } 1776 1777 return 0; 1778} 1779 1780void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, 1781 unsigned int *rx_usecs, bool *rx_adaptive) 1782{ 1783 /* We must round up when converting ticks to microseconds 1784 * because we round down when converting the other way. 1785 */ 1786 1787 *rx_adaptive = efx->irq_rx_adaptive; 1788 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation * 1789 efx->timer_quantum_ns, 1790 1000); 1791 1792 /* If channels are shared between RX and TX, so is IRQ 1793 * moderation. Otherwise, IRQ moderation is the same for all 1794 * TX channels and is not adaptive. 1795 */ 1796 if (efx->tx_channel_offset == 0) 1797 *tx_usecs = *rx_usecs; 1798 else 1799 *tx_usecs = DIV_ROUND_UP( 1800 efx->channel[efx->tx_channel_offset]->irq_moderation * 1801 efx->timer_quantum_ns, 1802 1000); 1803} 1804 1805/************************************************************************** 1806 * 1807 * Hardware monitor 1808 * 1809 **************************************************************************/ 1810 1811/* Run periodically off the general workqueue */ 1812static void efx_monitor(struct work_struct *data) 1813{ 1814 struct efx_nic *efx = container_of(data, struct efx_nic, 1815 monitor_work.work); 1816 1817 netif_vdbg(efx, timer, efx->net_dev, 1818 "hardware monitor executing on CPU %d\n", 1819 raw_smp_processor_id()); 1820 BUG_ON(efx->type->monitor == NULL); 1821 1822 /* If the mac_lock is already held then it is likely a port 1823 * reconfiguration is already in place, which will likely do 1824 * most of the work of monitor() anyway. */ 1825 if (mutex_trylock(&efx->mac_lock)) { 1826 if (efx->port_enabled) 1827 efx->type->monitor(efx); 1828 mutex_unlock(&efx->mac_lock); 1829 } 1830 1831 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1832 efx_monitor_interval); 1833} 1834 1835/************************************************************************** 1836 * 1837 * ioctls 1838 * 1839 *************************************************************************/ 1840 1841/* Net device ioctl 1842 * Context: process, rtnl_lock() held. 1843 */ 1844static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) 1845{ 1846 struct efx_nic *efx = netdev_priv(net_dev); 1847 struct mii_ioctl_data *data = if_mii(ifr); 1848 1849 if (cmd == SIOCSHWTSTAMP) 1850 return efx_ptp_set_ts_config(efx, ifr); 1851 if (cmd == SIOCGHWTSTAMP) 1852 return efx_ptp_get_ts_config(efx, ifr); 1853 1854 /* Convert phy_id from older PRTAD/DEVAD format */ 1855 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) && 1856 (data->phy_id & 0xfc00) == 0x0400) 1857 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; 1858 1859 return mdio_mii_ioctl(&efx->mdio, data, cmd); 1860} 1861 1862/************************************************************************** 1863 * 1864 * NAPI interface 1865 * 1866 **************************************************************************/ 1867 1868static void efx_init_napi_channel(struct efx_channel *channel) 1869{ 1870 struct efx_nic *efx = channel->efx; 1871 1872 channel->napi_dev = efx->net_dev; 1873 netif_napi_add(channel->napi_dev, &channel->napi_str, 1874 efx_poll, napi_weight); 1875} 1876 1877static void efx_init_napi(struct efx_nic *efx) 1878{ 1879 struct efx_channel *channel; 1880 1881 efx_for_each_channel(channel, efx) 1882 efx_init_napi_channel(channel); 1883} 1884 1885static void efx_fini_napi_channel(struct efx_channel *channel) 1886{ 1887 if (channel->napi_dev) 1888 netif_napi_del(&channel->napi_str); 1889 channel->napi_dev = NULL; 1890} 1891 1892static void efx_fini_napi(struct efx_nic *efx) 1893{ 1894 struct efx_channel *channel; 1895 1896 efx_for_each_channel(channel, efx) 1897 efx_fini_napi_channel(channel); 1898} 1899 1900/************************************************************************** 1901 * 1902 * Kernel netpoll interface 1903 * 1904 *************************************************************************/ 1905 1906#ifdef CONFIG_NET_POLL_CONTROLLER 1907 1908/* Although in the common case interrupts will be disabled, this is not 1909 * guaranteed. However, all our work happens inside the NAPI callback, 1910 * so no locking is required. 1911 */ 1912static void efx_netpoll(struct net_device *net_dev) 1913{ 1914 struct efx_nic *efx = netdev_priv(net_dev); 1915 struct efx_channel *channel; 1916 1917 efx_for_each_channel(channel, efx) 1918 efx_schedule_channel(channel); 1919} 1920 1921#endif 1922 1923/************************************************************************** 1924 * 1925 * Kernel net device interface 1926 * 1927 *************************************************************************/ 1928 1929/* Context: process, rtnl_lock() held. */ 1930static int efx_net_open(struct net_device *net_dev) 1931{ 1932 struct efx_nic *efx = netdev_priv(net_dev); 1933 int rc; 1934 1935 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", 1936 raw_smp_processor_id()); 1937 1938 rc = efx_check_disabled(efx); 1939 if (rc) 1940 return rc; 1941 if (efx->phy_mode & PHY_MODE_SPECIAL) 1942 return -EBUSY; 1943 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL)) 1944 return -EIO; 1945 1946 /* Notify the kernel of the link state polled during driver load, 1947 * before the monitor starts running */ 1948 efx_link_status_changed(efx); 1949 1950 efx_start_all(efx); 1951 efx_selftest_async_start(efx); 1952 return 0; 1953} 1954 1955/* Context: process, rtnl_lock() held. 1956 * Note that the kernel will ignore our return code; this method 1957 * should really be a void. 1958 */ 1959static int efx_net_stop(struct net_device *net_dev) 1960{ 1961 struct efx_nic *efx = netdev_priv(net_dev); 1962 1963 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", 1964 raw_smp_processor_id()); 1965 1966 /* Stop the device and flush all the channels */ 1967 efx_stop_all(efx); 1968 1969 return 0; 1970} 1971 1972/* Context: process, dev_base_lock or RTNL held, non-blocking. */ 1973static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, 1974 struct rtnl_link_stats64 *stats) 1975{ 1976 struct efx_nic *efx = netdev_priv(net_dev); 1977 1978 spin_lock_bh(&efx->stats_lock); 1979 efx->type->update_stats(efx, NULL, stats); 1980 spin_unlock_bh(&efx->stats_lock); 1981 1982 return stats; 1983} 1984 1985/* Context: netif_tx_lock held, BHs disabled. */ 1986static void efx_watchdog(struct net_device *net_dev) 1987{ 1988 struct efx_nic *efx = netdev_priv(net_dev); 1989 1990 netif_err(efx, tx_err, efx->net_dev, 1991 "TX stuck with port_enabled=%d: resetting channels\n", 1992 efx->port_enabled); 1993 1994 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); 1995} 1996 1997 1998/* Context: process, rtnl_lock() held. */ 1999static int efx_change_mtu(struct net_device *net_dev, int new_mtu) 2000{ 2001 struct efx_nic *efx = netdev_priv(net_dev); 2002 int rc; 2003 2004 rc = efx_check_disabled(efx); 2005 if (rc) 2006 return rc; 2007 if (new_mtu > EFX_MAX_MTU) 2008 return -EINVAL; 2009 2010 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); 2011 2012 efx_device_detach_sync(efx); 2013 efx_stop_all(efx); 2014 2015 mutex_lock(&efx->mac_lock); 2016 net_dev->mtu = new_mtu; 2017 efx->type->reconfigure_mac(efx); 2018 mutex_unlock(&efx->mac_lock); 2019 2020 efx_start_all(efx); 2021 netif_device_attach(efx->net_dev); 2022 return 0; 2023} 2024 2025static int efx_set_mac_address(struct net_device *net_dev, void *data) 2026{ 2027 struct efx_nic *efx = netdev_priv(net_dev); 2028 struct sockaddr *addr = data; 2029 char *new_addr = addr->sa_data; 2030 2031 if (!is_valid_ether_addr(new_addr)) { 2032 netif_err(efx, drv, efx->net_dev, 2033 "invalid ethernet MAC address requested: %pM\n", 2034 new_addr); 2035 return -EADDRNOTAVAIL; 2036 } 2037 2038 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len); 2039 efx_sriov_mac_address_changed(efx); 2040 2041 /* Reconfigure the MAC */ 2042 mutex_lock(&efx->mac_lock); 2043 efx->type->reconfigure_mac(efx); 2044 mutex_unlock(&efx->mac_lock); 2045 2046 return 0; 2047} 2048 2049/* Context: netif_addr_lock held, BHs disabled. */ 2050static void efx_set_rx_mode(struct net_device *net_dev) 2051{ 2052 struct efx_nic *efx = netdev_priv(net_dev); 2053 2054 if (efx->port_enabled) 2055 queue_work(efx->workqueue, &efx->mac_work); 2056 /* Otherwise efx_start_port() will do this */ 2057} 2058 2059static int efx_set_features(struct net_device *net_dev, netdev_features_t data) 2060{ 2061 struct efx_nic *efx = netdev_priv(net_dev); 2062 2063 /* If disabling RX n-tuple filtering, clear existing filters */ 2064 if (net_dev->features & ~data & NETIF_F_NTUPLE) 2065 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); 2066 2067 return 0; 2068} 2069 2070static const struct net_device_ops efx_farch_netdev_ops = { 2071 .ndo_open = efx_net_open, 2072 .ndo_stop = efx_net_stop, 2073 .ndo_get_stats64 = efx_net_stats, 2074 .ndo_tx_timeout = efx_watchdog, 2075 .ndo_start_xmit = efx_hard_start_xmit, 2076 .ndo_validate_addr = eth_validate_addr, 2077 .ndo_do_ioctl = efx_ioctl, 2078 .ndo_change_mtu = efx_change_mtu, 2079 .ndo_set_mac_address = efx_set_mac_address, 2080 .ndo_set_rx_mode = efx_set_rx_mode, 2081 .ndo_set_features = efx_set_features, 2082#ifdef CONFIG_SFC_SRIOV 2083 .ndo_set_vf_mac = efx_sriov_set_vf_mac, 2084 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan, 2085 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk, 2086 .ndo_get_vf_config = efx_sriov_get_vf_config, 2087#endif 2088#ifdef CONFIG_NET_POLL_CONTROLLER 2089 .ndo_poll_controller = efx_netpoll, 2090#endif 2091 .ndo_setup_tc = efx_setup_tc, 2092#ifdef CONFIG_RFS_ACCEL 2093 .ndo_rx_flow_steer = efx_filter_rfs, 2094#endif 2095}; 2096 2097static const struct net_device_ops efx_ef10_netdev_ops = { 2098 .ndo_open = efx_net_open, 2099 .ndo_stop = efx_net_stop, 2100 .ndo_get_stats64 = efx_net_stats, 2101 .ndo_tx_timeout = efx_watchdog, 2102 .ndo_start_xmit = efx_hard_start_xmit, 2103 .ndo_validate_addr = eth_validate_addr, 2104 .ndo_do_ioctl = efx_ioctl, 2105 .ndo_change_mtu = efx_change_mtu, 2106 .ndo_set_mac_address = efx_set_mac_address, 2107 .ndo_set_rx_mode = efx_set_rx_mode, 2108 .ndo_set_features = efx_set_features, 2109#ifdef CONFIG_NET_POLL_CONTROLLER 2110 .ndo_poll_controller = efx_netpoll, 2111#endif 2112#ifdef CONFIG_RFS_ACCEL 2113 .ndo_rx_flow_steer = efx_filter_rfs, 2114#endif 2115}; 2116 2117static void efx_update_name(struct efx_nic *efx) 2118{ 2119 strcpy(efx->name, efx->net_dev->name); 2120 efx_mtd_rename(efx); 2121 efx_set_channel_names(efx); 2122} 2123 2124static int efx_netdev_event(struct notifier_block *this, 2125 unsigned long event, void *ptr) 2126{ 2127 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr); 2128 2129 if ((net_dev->netdev_ops == &efx_farch_netdev_ops || 2130 net_dev->netdev_ops == &efx_ef10_netdev_ops) && 2131 event == NETDEV_CHANGENAME) 2132 efx_update_name(netdev_priv(net_dev)); 2133 2134 return NOTIFY_DONE; 2135} 2136 2137static struct notifier_block efx_netdev_notifier = { 2138 .notifier_call = efx_netdev_event, 2139}; 2140 2141static ssize_t 2142show_phy_type(struct device *dev, struct device_attribute *attr, char *buf) 2143{ 2144 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2145 return sprintf(buf, "%d\n", efx->phy_type); 2146} 2147static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL); 2148 2149static int efx_register_netdev(struct efx_nic *efx) 2150{ 2151 struct net_device *net_dev = efx->net_dev; 2152 struct efx_channel *channel; 2153 int rc; 2154 2155 net_dev->watchdog_timeo = 5 * HZ; 2156 net_dev->irq = efx->pci_dev->irq; 2157 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { 2158 net_dev->netdev_ops = &efx_ef10_netdev_ops; 2159 net_dev->priv_flags |= IFF_UNICAST_FLT; 2160 } else { 2161 net_dev->netdev_ops = &efx_farch_netdev_ops; 2162 } 2163 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops); 2164 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS; 2165 2166 rtnl_lock(); 2167 2168 /* Enable resets to be scheduled and check whether any were 2169 * already requested. If so, the NIC is probably hosed so we 2170 * abort. 2171 */ 2172 efx->state = STATE_READY; 2173 smp_mb(); /* ensure we change state before checking reset_pending */ 2174 if (efx->reset_pending) { 2175 netif_err(efx, probe, efx->net_dev, 2176 "aborting probe due to scheduled reset\n"); 2177 rc = -EIO; 2178 goto fail_locked; 2179 } 2180 2181 rc = dev_alloc_name(net_dev, net_dev->name); 2182 if (rc < 0) 2183 goto fail_locked; 2184 efx_update_name(efx); 2185 2186 /* Always start with carrier off; PHY events will detect the link */ 2187 netif_carrier_off(net_dev); 2188 2189 rc = register_netdevice(net_dev); 2190 if (rc) 2191 goto fail_locked; 2192 2193 efx_for_each_channel(channel, efx) { 2194 struct efx_tx_queue *tx_queue; 2195 efx_for_each_channel_tx_queue(tx_queue, channel) 2196 efx_init_tx_queue_core_txq(tx_queue); 2197 } 2198 2199 rtnl_unlock(); 2200 2201 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2202 if (rc) { 2203 netif_err(efx, drv, efx->net_dev, 2204 "failed to init net dev attributes\n"); 2205 goto fail_registered; 2206 } 2207 2208 return 0; 2209 2210fail_registered: 2211 rtnl_lock(); 2212 unregister_netdevice(net_dev); 2213fail_locked: 2214 efx->state = STATE_UNINIT; 2215 rtnl_unlock(); 2216 netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); 2217 return rc; 2218} 2219 2220static void efx_unregister_netdev(struct efx_nic *efx) 2221{ 2222 if (!efx->net_dev) 2223 return; 2224 2225 BUG_ON(netdev_priv(efx->net_dev) != efx); 2226 2227 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); 2228 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2229 2230 rtnl_lock(); 2231 unregister_netdevice(efx->net_dev); 2232 efx->state = STATE_UNINIT; 2233 rtnl_unlock(); 2234} 2235 2236/************************************************************************** 2237 * 2238 * Device reset and suspend 2239 * 2240 **************************************************************************/ 2241 2242/* Tears down the entire software state and most of the hardware state 2243 * before reset. */ 2244void efx_reset_down(struct efx_nic *efx, enum reset_type method) 2245{ 2246 EFX_ASSERT_RESET_SERIALISED(efx); 2247 2248 efx_stop_all(efx); 2249 efx_disable_interrupts(efx); 2250 2251 mutex_lock(&efx->mac_lock); 2252 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) 2253 efx->phy_op->fini(efx); 2254 efx->type->fini(efx); 2255} 2256 2257/* This function will always ensure that the locks acquired in 2258 * efx_reset_down() are released. A failure return code indicates 2259 * that we were unable to reinitialise the hardware, and the 2260 * driver should be disabled. If ok is false, then the rx and tx 2261 * engines are not restarted, pending a RESET_DISABLE. */ 2262int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) 2263{ 2264 int rc; 2265 2266 EFX_ASSERT_RESET_SERIALISED(efx); 2267 2268 rc = efx->type->init(efx); 2269 if (rc) { 2270 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 2271 goto fail; 2272 } 2273 2274 if (!ok) 2275 goto fail; 2276 2277 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) { 2278 rc = efx->phy_op->init(efx); 2279 if (rc) 2280 goto fail; 2281 if (efx->phy_op->reconfigure(efx)) 2282 netif_err(efx, drv, efx->net_dev, 2283 "could not restore PHY settings\n"); 2284 } 2285 2286 rc = efx_enable_interrupts(efx); 2287 if (rc) 2288 goto fail; 2289 efx_restore_filters(efx); 2290 efx_sriov_reset(efx); 2291 2292 mutex_unlock(&efx->mac_lock); 2293 2294 efx_start_all(efx); 2295 2296 return 0; 2297 2298fail: 2299 efx->port_initialized = false; 2300 2301 mutex_unlock(&efx->mac_lock); 2302 2303 return rc; 2304} 2305 2306/* Reset the NIC using the specified method. Note that the reset may 2307 * fail, in which case the card will be left in an unusable state. 2308 * 2309 * Caller must hold the rtnl_lock. 2310 */ 2311int efx_reset(struct efx_nic *efx, enum reset_type method) 2312{ 2313 int rc, rc2; 2314 bool disabled; 2315 2316 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", 2317 RESET_TYPE(method)); 2318 2319 efx_device_detach_sync(efx); 2320 efx_reset_down(efx, method); 2321 2322 rc = efx->type->reset(efx, method); 2323 if (rc) { 2324 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); 2325 goto out; 2326 } 2327 2328 /* Clear flags for the scopes we covered. We assume the NIC and 2329 * driver are now quiescent so that there is no race here. 2330 */ 2331 efx->reset_pending &= -(1 << (method + 1)); 2332 2333 /* Reinitialise bus-mastering, which may have been turned off before 2334 * the reset was scheduled. This is still appropriate, even in the 2335 * RESET_TYPE_DISABLE since this driver generally assumes the hardware 2336 * can respond to requests. */ 2337 pci_set_master(efx->pci_dev); 2338 2339out: 2340 /* Leave device stopped if necessary */ 2341 disabled = rc || 2342 method == RESET_TYPE_DISABLE || 2343 method == RESET_TYPE_RECOVER_OR_DISABLE; 2344 rc2 = efx_reset_up(efx, method, !disabled); 2345 if (rc2) { 2346 disabled = true; 2347 if (!rc) 2348 rc = rc2; 2349 } 2350 2351 if (disabled) { 2352 dev_close(efx->net_dev); 2353 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); 2354 efx->state = STATE_DISABLED; 2355 } else { 2356 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); 2357 netif_device_attach(efx->net_dev); 2358 } 2359 return rc; 2360} 2361 2362/* Try recovery mechanisms. 2363 * For now only EEH is supported. 2364 * Returns 0 if the recovery mechanisms are unsuccessful. 2365 * Returns a non-zero value otherwise. 2366 */ 2367int efx_try_recovery(struct efx_nic *efx) 2368{ 2369#ifdef CONFIG_EEH 2370 /* A PCI error can occur and not be seen by EEH because nothing 2371 * happens on the PCI bus. In this case the driver may fail and 2372 * schedule a 'recover or reset', leading to this recovery handler. 2373 * Manually call the eeh failure check function. 2374 */ 2375 struct eeh_dev *eehdev = 2376 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev)); 2377 2378 if (eeh_dev_check_failure(eehdev)) { 2379 /* The EEH mechanisms will handle the error and reset the 2380 * device if necessary. 2381 */ 2382 return 1; 2383 } 2384#endif 2385 return 0; 2386} 2387 2388/* The worker thread exists so that code that cannot sleep can 2389 * schedule a reset for later. 2390 */ 2391static void efx_reset_work(struct work_struct *data) 2392{ 2393 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); 2394 unsigned long pending; 2395 enum reset_type method; 2396 2397 pending = ACCESS_ONCE(efx->reset_pending); 2398 method = fls(pending) - 1; 2399 2400 if ((method == RESET_TYPE_RECOVER_OR_DISABLE || 2401 method == RESET_TYPE_RECOVER_OR_ALL) && 2402 efx_try_recovery(efx)) 2403 return; 2404 2405 if (!pending) 2406 return; 2407 2408 rtnl_lock(); 2409 2410 /* We checked the state in efx_schedule_reset() but it may 2411 * have changed by now. Now that we have the RTNL lock, 2412 * it cannot change again. 2413 */ 2414 if (efx->state == STATE_READY) 2415 (void)efx_reset(efx, method); 2416 2417 rtnl_unlock(); 2418} 2419 2420void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) 2421{ 2422 enum reset_type method; 2423 2424 if (efx->state == STATE_RECOVERY) { 2425 netif_dbg(efx, drv, efx->net_dev, 2426 "recovering: skip scheduling %s reset\n", 2427 RESET_TYPE(type)); 2428 return; 2429 } 2430 2431 switch (type) { 2432 case RESET_TYPE_INVISIBLE: 2433 case RESET_TYPE_ALL: 2434 case RESET_TYPE_RECOVER_OR_ALL: 2435 case RESET_TYPE_WORLD: 2436 case RESET_TYPE_DISABLE: 2437 case RESET_TYPE_RECOVER_OR_DISABLE: 2438 method = type; 2439 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 2440 RESET_TYPE(method)); 2441 break; 2442 default: 2443 method = efx->type->map_reset_reason(type); 2444 netif_dbg(efx, drv, efx->net_dev, 2445 "scheduling %s reset for %s\n", 2446 RESET_TYPE(method), RESET_TYPE(type)); 2447 break; 2448 } 2449 2450 set_bit(method, &efx->reset_pending); 2451 smp_mb(); /* ensure we change reset_pending before checking state */ 2452 2453 /* If we're not READY then just leave the flags set as the cue 2454 * to abort probing or reschedule the reset later. 2455 */ 2456 if (ACCESS_ONCE(efx->state) != STATE_READY) 2457 return; 2458 2459 /* efx_process_channel() will no longer read events once a 2460 * reset is scheduled. So switch back to poll'd MCDI completions. */ 2461 efx_mcdi_mode_poll(efx); 2462 2463 queue_work(reset_workqueue, &efx->reset_work); 2464} 2465 2466/************************************************************************** 2467 * 2468 * List of NICs we support 2469 * 2470 **************************************************************************/ 2471 2472/* PCI device ID table */ 2473static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = { 2474 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2475 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0), 2476 .driver_data = (unsigned long) &falcon_a1_nic_type}, 2477 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2478 PCI_DEVICE_ID_SOLARFLARE_SFC4000B), 2479 .driver_data = (unsigned long) &falcon_b0_nic_type}, 2480 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */ 2481 .driver_data = (unsigned long) &siena_a0_nic_type}, 2482 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */ 2483 .driver_data = (unsigned long) &siena_a0_nic_type}, 2484 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */ 2485 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2486 {0} /* end of list */ 2487}; 2488 2489/************************************************************************** 2490 * 2491 * Dummy PHY/MAC operations 2492 * 2493 * Can be used for some unimplemented operations 2494 * Needed so all function pointers are valid and do not have to be tested 2495 * before use 2496 * 2497 **************************************************************************/ 2498int efx_port_dummy_op_int(struct efx_nic *efx) 2499{ 2500 return 0; 2501} 2502void efx_port_dummy_op_void(struct efx_nic *efx) {} 2503 2504static bool efx_port_dummy_op_poll(struct efx_nic *efx) 2505{ 2506 return false; 2507} 2508 2509static const struct efx_phy_operations efx_dummy_phy_operations = { 2510 .init = efx_port_dummy_op_int, 2511 .reconfigure = efx_port_dummy_op_int, 2512 .poll = efx_port_dummy_op_poll, 2513 .fini = efx_port_dummy_op_void, 2514}; 2515 2516/************************************************************************** 2517 * 2518 * Data housekeeping 2519 * 2520 **************************************************************************/ 2521 2522/* This zeroes out and then fills in the invariants in a struct 2523 * efx_nic (including all sub-structures). 2524 */ 2525static int efx_init_struct(struct efx_nic *efx, 2526 struct pci_dev *pci_dev, struct net_device *net_dev) 2527{ 2528 int i; 2529 2530 /* Initialise common structures */ 2531 spin_lock_init(&efx->biu_lock); 2532#ifdef CONFIG_SFC_MTD 2533 INIT_LIST_HEAD(&efx->mtd_list); 2534#endif 2535 INIT_WORK(&efx->reset_work, efx_reset_work); 2536 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); 2537 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work); 2538 efx->pci_dev = pci_dev; 2539 efx->msg_enable = debug; 2540 efx->state = STATE_UNINIT; 2541 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); 2542 2543 efx->net_dev = net_dev; 2544 efx->rx_prefix_size = efx->type->rx_prefix_size; 2545 efx->rx_packet_hash_offset = 2546 efx->type->rx_hash_offset - efx->type->rx_prefix_size; 2547 spin_lock_init(&efx->stats_lock); 2548 mutex_init(&efx->mac_lock); 2549 efx->phy_op = &efx_dummy_phy_operations; 2550 efx->mdio.dev = net_dev; 2551 INIT_WORK(&efx->mac_work, efx_mac_work); 2552 init_waitqueue_head(&efx->flush_wq); 2553 2554 for (i = 0; i < EFX_MAX_CHANNELS; i++) { 2555 efx->channel[i] = efx_alloc_channel(efx, i, NULL); 2556 if (!efx->channel[i]) 2557 goto fail; 2558 efx->msi_context[i].efx = efx; 2559 efx->msi_context[i].index = i; 2560 } 2561 2562 /* Higher numbered interrupt modes are less capable! */ 2563 efx->interrupt_mode = max(efx->type->max_interrupt_mode, 2564 interrupt_mode); 2565 2566 /* Would be good to use the net_dev name, but we're too early */ 2567 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", 2568 pci_name(pci_dev)); 2569 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); 2570 if (!efx->workqueue) 2571 goto fail; 2572 2573 return 0; 2574 2575fail: 2576 efx_fini_struct(efx); 2577 return -ENOMEM; 2578} 2579 2580static void efx_fini_struct(struct efx_nic *efx) 2581{ 2582 int i; 2583 2584 for (i = 0; i < EFX_MAX_CHANNELS; i++) 2585 kfree(efx->channel[i]); 2586 2587 if (efx->workqueue) { 2588 destroy_workqueue(efx->workqueue); 2589 efx->workqueue = NULL; 2590 } 2591} 2592 2593/************************************************************************** 2594 * 2595 * PCI interface 2596 * 2597 **************************************************************************/ 2598 2599/* Main body of final NIC shutdown code 2600 * This is called only at module unload (or hotplug removal). 2601 */ 2602static void efx_pci_remove_main(struct efx_nic *efx) 2603{ 2604 /* Flush reset_work. It can no longer be scheduled since we 2605 * are not READY. 2606 */ 2607 BUG_ON(efx->state == STATE_READY); 2608 cancel_work_sync(&efx->reset_work); 2609 2610 efx_disable_interrupts(efx); 2611 efx_nic_fini_interrupt(efx); 2612 efx_fini_port(efx); 2613 efx->type->fini(efx); 2614 efx_fini_napi(efx); 2615 efx_remove_all(efx); 2616} 2617 2618/* Final NIC shutdown 2619 * This is called only at module unload (or hotplug removal). 2620 */ 2621static void efx_pci_remove(struct pci_dev *pci_dev) 2622{ 2623 struct efx_nic *efx; 2624 2625 efx = pci_get_drvdata(pci_dev); 2626 if (!efx) 2627 return; 2628 2629 /* Mark the NIC as fini, then stop the interface */ 2630 rtnl_lock(); 2631 dev_close(efx->net_dev); 2632 efx_disable_interrupts(efx); 2633 rtnl_unlock(); 2634 2635 efx_sriov_fini(efx); 2636 efx_unregister_netdev(efx); 2637 2638 efx_mtd_remove(efx); 2639 2640 efx_pci_remove_main(efx); 2641 2642 efx_fini_io(efx); 2643 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); 2644 2645 efx_fini_struct(efx); 2646 free_netdev(efx->net_dev); 2647 2648 pci_disable_pcie_error_reporting(pci_dev); 2649}; 2650 2651/* NIC VPD information 2652 * Called during probe to display the part number of the 2653 * installed NIC. VPD is potentially very large but this should 2654 * always appear within the first 512 bytes. 2655 */ 2656#define SFC_VPD_LEN 512 2657static void efx_print_product_vpd(struct efx_nic *efx) 2658{ 2659 struct pci_dev *dev = efx->pci_dev; 2660 char vpd_data[SFC_VPD_LEN]; 2661 ssize_t vpd_size; 2662 int i, j; 2663 2664 /* Get the vpd data from the device */ 2665 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data); 2666 if (vpd_size <= 0) { 2667 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n"); 2668 return; 2669 } 2670 2671 /* Get the Read only section */ 2672 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA); 2673 if (i < 0) { 2674 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n"); 2675 return; 2676 } 2677 2678 j = pci_vpd_lrdt_size(&vpd_data[i]); 2679 i += PCI_VPD_LRDT_TAG_SIZE; 2680 if (i + j > vpd_size) 2681 j = vpd_size - i; 2682 2683 /* Get the Part number */ 2684 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN"); 2685 if (i < 0) { 2686 netif_err(efx, drv, efx->net_dev, "Part number not found\n"); 2687 return; 2688 } 2689 2690 j = pci_vpd_info_field_size(&vpd_data[i]); 2691 i += PCI_VPD_INFO_FLD_HDR_SIZE; 2692 if (i + j > vpd_size) { 2693 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n"); 2694 return; 2695 } 2696 2697 netif_info(efx, drv, efx->net_dev, 2698 "Part Number : %.*s\n", j, &vpd_data[i]); 2699} 2700 2701 2702/* Main body of NIC initialisation 2703 * This is called at module load (or hotplug insertion, theoretically). 2704 */ 2705static int efx_pci_probe_main(struct efx_nic *efx) 2706{ 2707 int rc; 2708 2709 /* Do start-of-day initialisation */ 2710 rc = efx_probe_all(efx); 2711 if (rc) 2712 goto fail1; 2713 2714 efx_init_napi(efx); 2715 2716 rc = efx->type->init(efx); 2717 if (rc) { 2718 netif_err(efx, probe, efx->net_dev, 2719 "failed to initialise NIC\n"); 2720 goto fail3; 2721 } 2722 2723 rc = efx_init_port(efx); 2724 if (rc) { 2725 netif_err(efx, probe, efx->net_dev, 2726 "failed to initialise port\n"); 2727 goto fail4; 2728 } 2729 2730 rc = efx_nic_init_interrupt(efx); 2731 if (rc) 2732 goto fail5; 2733 rc = efx_enable_interrupts(efx); 2734 if (rc) 2735 goto fail6; 2736 2737 return 0; 2738 2739 fail6: 2740 efx_nic_fini_interrupt(efx); 2741 fail5: 2742 efx_fini_port(efx); 2743 fail4: 2744 efx->type->fini(efx); 2745 fail3: 2746 efx_fini_napi(efx); 2747 efx_remove_all(efx); 2748 fail1: 2749 return rc; 2750} 2751 2752/* NIC initialisation 2753 * 2754 * This is called at module load (or hotplug insertion, 2755 * theoretically). It sets up PCI mappings, resets the NIC, 2756 * sets up and registers the network devices with the kernel and hooks 2757 * the interrupt service routine. It does not prepare the device for 2758 * transmission; this is left to the first time one of the network 2759 * interfaces is brought up (i.e. efx_net_open). 2760 */ 2761static int efx_pci_probe(struct pci_dev *pci_dev, 2762 const struct pci_device_id *entry) 2763{ 2764 struct net_device *net_dev; 2765 struct efx_nic *efx; 2766 int rc; 2767 2768 /* Allocate and initialise a struct net_device and struct efx_nic */ 2769 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES, 2770 EFX_MAX_RX_QUEUES); 2771 if (!net_dev) 2772 return -ENOMEM; 2773 efx = netdev_priv(net_dev); 2774 efx->type = (const struct efx_nic_type *) entry->driver_data; 2775 net_dev->features |= (efx->type->offload_features | NETIF_F_SG | 2776 NETIF_F_HIGHDMA | NETIF_F_TSO | 2777 NETIF_F_RXCSUM); 2778 if (efx->type->offload_features & NETIF_F_V6_CSUM) 2779 net_dev->features |= NETIF_F_TSO6; 2780 /* Mask for features that also apply to VLAN devices */ 2781 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | 2782 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO | 2783 NETIF_F_RXCSUM); 2784 /* All offloads can be toggled */ 2785 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA; 2786 pci_set_drvdata(pci_dev, efx); 2787 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 2788 rc = efx_init_struct(efx, pci_dev, net_dev); 2789 if (rc) 2790 goto fail1; 2791 2792 netif_info(efx, probe, efx->net_dev, 2793 "Solarflare NIC detected\n"); 2794 2795 efx_print_product_vpd(efx); 2796 2797 /* Set up basic I/O (BAR mappings etc) */ 2798 rc = efx_init_io(efx); 2799 if (rc) 2800 goto fail2; 2801 2802 rc = efx_pci_probe_main(efx); 2803 if (rc) 2804 goto fail3; 2805 2806 rc = efx_register_netdev(efx); 2807 if (rc) 2808 goto fail4; 2809 2810 rc = efx_sriov_init(efx); 2811 if (rc) 2812 netif_err(efx, probe, efx->net_dev, 2813 "SR-IOV can't be enabled rc %d\n", rc); 2814 2815 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); 2816 2817 /* Try to create MTDs, but allow this to fail */ 2818 rtnl_lock(); 2819 rc = efx_mtd_probe(efx); 2820 rtnl_unlock(); 2821 if (rc) 2822 netif_warn(efx, probe, efx->net_dev, 2823 "failed to create MTDs (%d)\n", rc); 2824 2825 rc = pci_enable_pcie_error_reporting(pci_dev); 2826 if (rc && rc != -EINVAL) 2827 netif_warn(efx, probe, efx->net_dev, 2828 "pci_enable_pcie_error_reporting failed (%d)\n", rc); 2829 2830 return 0; 2831 2832 fail4: 2833 efx_pci_remove_main(efx); 2834 fail3: 2835 efx_fini_io(efx); 2836 fail2: 2837 efx_fini_struct(efx); 2838 fail1: 2839 WARN_ON(rc > 0); 2840 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); 2841 free_netdev(net_dev); 2842 return rc; 2843} 2844 2845static int efx_pm_freeze(struct device *dev) 2846{ 2847 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2848 2849 rtnl_lock(); 2850 2851 if (efx->state != STATE_DISABLED) { 2852 efx->state = STATE_UNINIT; 2853 2854 efx_device_detach_sync(efx); 2855 2856 efx_stop_all(efx); 2857 efx_disable_interrupts(efx); 2858 } 2859 2860 rtnl_unlock(); 2861 2862 return 0; 2863} 2864 2865static int efx_pm_thaw(struct device *dev) 2866{ 2867 int rc; 2868 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2869 2870 rtnl_lock(); 2871 2872 if (efx->state != STATE_DISABLED) { 2873 rc = efx_enable_interrupts(efx); 2874 if (rc) 2875 goto fail; 2876 2877 mutex_lock(&efx->mac_lock); 2878 efx->phy_op->reconfigure(efx); 2879 mutex_unlock(&efx->mac_lock); 2880 2881 efx_start_all(efx); 2882 2883 netif_device_attach(efx->net_dev); 2884 2885 efx->state = STATE_READY; 2886 2887 efx->type->resume_wol(efx); 2888 } 2889 2890 rtnl_unlock(); 2891 2892 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ 2893 queue_work(reset_workqueue, &efx->reset_work); 2894 2895 return 0; 2896 2897fail: 2898 rtnl_unlock(); 2899 2900 return rc; 2901} 2902 2903static int efx_pm_poweroff(struct device *dev) 2904{ 2905 struct pci_dev *pci_dev = to_pci_dev(dev); 2906 struct efx_nic *efx = pci_get_drvdata(pci_dev); 2907 2908 efx->type->fini(efx); 2909 2910 efx->reset_pending = 0; 2911 2912 pci_save_state(pci_dev); 2913 return pci_set_power_state(pci_dev, PCI_D3hot); 2914} 2915 2916/* Used for both resume and restore */ 2917static int efx_pm_resume(struct device *dev) 2918{ 2919 struct pci_dev *pci_dev = to_pci_dev(dev); 2920 struct efx_nic *efx = pci_get_drvdata(pci_dev); 2921 int rc; 2922 2923 rc = pci_set_power_state(pci_dev, PCI_D0); 2924 if (rc) 2925 return rc; 2926 pci_restore_state(pci_dev); 2927 rc = pci_enable_device(pci_dev); 2928 if (rc) 2929 return rc; 2930 pci_set_master(efx->pci_dev); 2931 rc = efx->type->reset(efx, RESET_TYPE_ALL); 2932 if (rc) 2933 return rc; 2934 rc = efx->type->init(efx); 2935 if (rc) 2936 return rc; 2937 rc = efx_pm_thaw(dev); 2938 return rc; 2939} 2940 2941static int efx_pm_suspend(struct device *dev) 2942{ 2943 int rc; 2944 2945 efx_pm_freeze(dev); 2946 rc = efx_pm_poweroff(dev); 2947 if (rc) 2948 efx_pm_resume(dev); 2949 return rc; 2950} 2951 2952static const struct dev_pm_ops efx_pm_ops = { 2953 .suspend = efx_pm_suspend, 2954 .resume = efx_pm_resume, 2955 .freeze = efx_pm_freeze, 2956 .thaw = efx_pm_thaw, 2957 .poweroff = efx_pm_poweroff, 2958 .restore = efx_pm_resume, 2959}; 2960 2961/* A PCI error affecting this device was detected. 2962 * At this point MMIO and DMA may be disabled. 2963 * Stop the software path and request a slot reset. 2964 */ 2965static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, 2966 enum pci_channel_state state) 2967{ 2968 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 2969 struct efx_nic *efx = pci_get_drvdata(pdev); 2970 2971 if (state == pci_channel_io_perm_failure) 2972 return PCI_ERS_RESULT_DISCONNECT; 2973 2974 rtnl_lock(); 2975 2976 if (efx->state != STATE_DISABLED) { 2977 efx->state = STATE_RECOVERY; 2978 efx->reset_pending = 0; 2979 2980 efx_device_detach_sync(efx); 2981 2982 efx_stop_all(efx); 2983 efx_disable_interrupts(efx); 2984 2985 status = PCI_ERS_RESULT_NEED_RESET; 2986 } else { 2987 /* If the interface is disabled we don't want to do anything 2988 * with it. 2989 */ 2990 status = PCI_ERS_RESULT_RECOVERED; 2991 } 2992 2993 rtnl_unlock(); 2994 2995 pci_disable_device(pdev); 2996 2997 return status; 2998} 2999 3000/* Fake a successfull reset, which will be performed later in efx_io_resume. */ 3001static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) 3002{ 3003 struct efx_nic *efx = pci_get_drvdata(pdev); 3004 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3005 int rc; 3006 3007 if (pci_enable_device(pdev)) { 3008 netif_err(efx, hw, efx->net_dev, 3009 "Cannot re-enable PCI device after reset.\n"); 3010 status = PCI_ERS_RESULT_DISCONNECT; 3011 } 3012 3013 rc = pci_cleanup_aer_uncorrect_error_status(pdev); 3014 if (rc) { 3015 netif_err(efx, hw, efx->net_dev, 3016 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc); 3017 /* Non-fatal error. Continue. */ 3018 } 3019 3020 return status; 3021} 3022 3023/* Perform the actual reset and resume I/O operations. */ 3024static void efx_io_resume(struct pci_dev *pdev) 3025{ 3026 struct efx_nic *efx = pci_get_drvdata(pdev); 3027 int rc; 3028 3029 rtnl_lock(); 3030 3031 if (efx->state == STATE_DISABLED) 3032 goto out; 3033 3034 rc = efx_reset(efx, RESET_TYPE_ALL); 3035 if (rc) { 3036 netif_err(efx, hw, efx->net_dev, 3037 "efx_reset failed after PCI error (%d)\n", rc); 3038 } else { 3039 efx->state = STATE_READY; 3040 netif_dbg(efx, hw, efx->net_dev, 3041 "Done resetting and resuming IO after PCI error.\n"); 3042 } 3043 3044out: 3045 rtnl_unlock(); 3046} 3047 3048/* For simplicity and reliability, we always require a slot reset and try to 3049 * reset the hardware when a pci error affecting the device is detected. 3050 * We leave both the link_reset and mmio_enabled callback unimplemented: 3051 * with our request for slot reset the mmio_enabled callback will never be 3052 * called, and the link_reset callback is not used by AER or EEH mechanisms. 3053 */ 3054static struct pci_error_handlers efx_err_handlers = { 3055 .error_detected = efx_io_error_detected, 3056 .slot_reset = efx_io_slot_reset, 3057 .resume = efx_io_resume, 3058}; 3059 3060static struct pci_driver efx_pci_driver = { 3061 .name = KBUILD_MODNAME, 3062 .id_table = efx_pci_table, 3063 .probe = efx_pci_probe, 3064 .remove = efx_pci_remove, 3065 .driver.pm = &efx_pm_ops, 3066 .err_handler = &efx_err_handlers, 3067}; 3068 3069/************************************************************************** 3070 * 3071 * Kernel module interface 3072 * 3073 *************************************************************************/ 3074 3075module_param(interrupt_mode, uint, 0444); 3076MODULE_PARM_DESC(interrupt_mode, 3077 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)"); 3078 3079static int __init efx_init_module(void) 3080{ 3081 int rc; 3082 3083 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n"); 3084 3085 rc = register_netdevice_notifier(&efx_netdev_notifier); 3086 if (rc) 3087 goto err_notifier; 3088 3089 rc = efx_init_sriov(); 3090 if (rc) 3091 goto err_sriov; 3092 3093 reset_workqueue = create_singlethread_workqueue("sfc_reset"); 3094 if (!reset_workqueue) { 3095 rc = -ENOMEM; 3096 goto err_reset; 3097 } 3098 3099 rc = pci_register_driver(&efx_pci_driver); 3100 if (rc < 0) 3101 goto err_pci; 3102 3103 return 0; 3104 3105 err_pci: 3106 destroy_workqueue(reset_workqueue); 3107 err_reset: 3108 efx_fini_sriov(); 3109 err_sriov: 3110 unregister_netdevice_notifier(&efx_netdev_notifier); 3111 err_notifier: 3112 return rc; 3113} 3114 3115static void __exit efx_exit_module(void) 3116{ 3117 printk(KERN_INFO "Solarflare NET driver unloading\n"); 3118 3119 pci_unregister_driver(&efx_pci_driver); 3120 destroy_workqueue(reset_workqueue); 3121 efx_fini_sriov(); 3122 unregister_netdevice_notifier(&efx_netdev_notifier); 3123 3124} 3125 3126module_init(efx_init_module); 3127module_exit(efx_exit_module); 3128 3129MODULE_AUTHOR("Solarflare Communications and " 3130 "Michael Brown <mbrown@fensystems.co.uk>"); 3131MODULE_DESCRIPTION("Solarflare Communications network driver"); 3132MODULE_LICENSE("GPL"); 3133MODULE_DEVICE_TABLE(pci, efx_pci_table); 3134