1/* 2 * Copyright (c) 2012-2014 Qualcomm Atheros, Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#ifndef __WIL6210_H__ 18#define __WIL6210_H__ 19 20#include <linux/netdevice.h> 21#include <linux/wireless.h> 22#include <net/cfg80211.h> 23#include <linux/timex.h> 24#include "wil_platform.h" 25 26extern bool no_fw_recovery; 27 28#define WIL_NAME "wil6210" 29#define WIL_FW_NAME "wil6210.fw" 30 31#define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */ 32 33struct wil_board { 34 int board; 35#define WIL_BOARD_MARLON (1) 36#define WIL_BOARD_SPARROW (2) 37 const char * const name; 38}; 39 40/** 41 * extract bits [@b0:@b1] (inclusive) from the value @x 42 * it should be @b0 <= @b1, or result is incorrect 43 */ 44static inline u32 WIL_GET_BITS(u32 x, int b0, int b1) 45{ 46 return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1); 47} 48 49#define WIL6210_MEM_SIZE (2*1024*1024UL) 50 51#define WIL6210_RX_RING_SIZE (128) 52#define WIL6210_TX_RING_SIZE (512) 53#define WIL6210_MAX_TX_RINGS (24) /* HW limit */ 54#define WIL6210_MAX_CID (8) /* HW limit */ 55#define WIL6210_NAPI_BUDGET (16) /* arbitrary */ 56/* Max supported by wil6210 value for interrupt threshold is 5sec. */ 57#define WIL6210_ITR_TRSH_MAX (5000000) 58#define WIL6210_ITR_TRSH_DEFAULT (300) /* usec */ 59#define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */ 60#define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000) 61#define WIL6210_SCAN_TO msecs_to_jiffies(10000) 62 63/* Hardware definitions begin */ 64 65/* 66 * Mapping 67 * RGF File | Host addr | FW addr 68 * | | 69 * user_rgf | 0x000000 | 0x880000 70 * dma_rgf | 0x001000 | 0x881000 71 * pcie_rgf | 0x002000 | 0x882000 72 * | | 73 */ 74 75/* Where various structures placed in host address space */ 76#define WIL6210_FW_HOST_OFF (0x880000UL) 77 78#define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF) 79 80/* 81 * Interrupt control registers block 82 * 83 * each interrupt controlled by the same bit in all registers 84 */ 85struct RGF_ICR { 86 u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */ 87 u32 ICR; /* Cause, W1C/COR depending on ICC */ 88 u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */ 89 u32 ICS; /* Cause Set, WO */ 90 u32 IMV; /* Mask, RW+S/C */ 91 u32 IMS; /* Mask Set, write 1 to set */ 92 u32 IMC; /* Mask Clear, write 1 to clear */ 93} __packed; 94 95/* registers - FW addresses */ 96#define RGF_USER_USAGE_1 (0x880004) 97#define RGF_USER_USAGE_6 (0x880018) 98#define RGF_USER_HW_MACHINE_STATE (0x8801dc) 99 #define HW_MACHINE_BOOT_DONE (0x3fffffd) 100#define RGF_USER_USER_CPU_0 (0x8801e0) 101 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */ 102#define RGF_USER_MAC_CPU_0 (0x8801fc) 103 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */ 104#define RGF_USER_USER_SCRATCH_PAD (0x8802bc) 105#define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */ 106#define RGF_USER_CLKS_CTL_0 (0x880abc) 107 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */ 108 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */ 109#define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04) 110#define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08) 111#define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c) 112#define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10) 113#define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14) 114 #define BIT_HPAL_PERST_FROM_PAD BIT(6) 115 #define BIT_CAR_PERST_RST BIT(7) 116#define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */ 117 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18) 118#define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18) 119#define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c) 120 121#define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */ 122 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0) 123 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */ 124#define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */ 125 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0) 126#define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */ 127 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0) 128 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1) 129 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */ 130 131/* Interrupt moderation control */ 132#define RGF_DMA_ITR_CNT_TRSH (0x881c5c) 133#define RGF_DMA_ITR_CNT_DATA (0x881c60) 134#define RGF_DMA_ITR_CNT_CRL (0x881c64) 135 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0) 136 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1) 137 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2) 138 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3) 139 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4) 140 141#define RGF_DMA_PSEUDO_CAUSE (0x881c68) 142#define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c) 143#define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70) 144 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0) 145 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1) 146 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2) 147 148#define RGF_HP_CTRL (0x88265c) 149#define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4) 150 151/* MAC timer, usec, for packet lifetime */ 152#define RGF_MAC_MTRL_COUNTER_0 (0x886aa8) 153 154#define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */ 155 156/* popular locations */ 157#define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD) 158#define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \ 159 offsetof(struct RGF_ICR, ICS)) 160#define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2 161 162/* ISR register bits */ 163#define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0) 164#define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1) 165#define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3) 166 167/* Hardware definitions end */ 168struct fw_map { 169 u32 from; /* linker address - from, inclusive */ 170 u32 to; /* linker address - to, exclusive */ 171 u32 host; /* PCI/Host address - BAR0 + 0x880000 */ 172 const char *name; /* for debugfs */ 173}; 174 175/* array size should be in sync with actual definition in the wmi.c */ 176extern const struct fw_map fw_mapping[7]; 177 178/** 179 * mk_cidxtid - construct @cidxtid field 180 * @cid: CID value 181 * @tid: TID value 182 * 183 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 184 */ 185static inline u8 mk_cidxtid(u8 cid, u8 tid) 186{ 187 return ((tid & 0xf) << 4) | (cid & 0xf); 188} 189 190/** 191 * parse_cidxtid - parse @cidxtid field 192 * @cid: store CID value here 193 * @tid: store TID value here 194 * 195 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID 196 */ 197static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid) 198{ 199 *cid = cidxtid & 0xf; 200 *tid = (cidxtid >> 4) & 0xf; 201} 202 203struct wil6210_mbox_ring { 204 u32 base; 205 u16 entry_size; /* max. size of mbox entry, incl. all headers */ 206 u16 size; 207 u32 tail; 208 u32 head; 209} __packed; 210 211struct wil6210_mbox_ring_desc { 212 __le32 sync; 213 __le32 addr; 214} __packed; 215 216/* at HOST_OFF_WIL6210_MBOX_CTL */ 217struct wil6210_mbox_ctl { 218 struct wil6210_mbox_ring tx; 219 struct wil6210_mbox_ring rx; 220} __packed; 221 222struct wil6210_mbox_hdr { 223 __le16 seq; 224 __le16 len; /* payload, bytes after this header */ 225 __le16 type; 226 u8 flags; 227 u8 reserved; 228} __packed; 229 230#define WIL_MBOX_HDR_TYPE_WMI (0) 231 232/* max. value for wil6210_mbox_hdr.len */ 233#define MAX_MBOXITEM_SIZE (240) 234 235/** 236 * struct wil6210_mbox_hdr_wmi - WMI header 237 * 238 * @mid: MAC ID 239 * 00 - default, created by FW 240 * 01..0f - WiFi ports, driver to create 241 * 10..fe - debug 242 * ff - broadcast 243 * @id: command/event ID 244 * @timestamp: FW fills for events, free-running msec timer 245 */ 246struct wil6210_mbox_hdr_wmi { 247 u8 mid; 248 u8 reserved; 249 __le16 id; 250 __le32 timestamp; 251} __packed; 252 253struct pending_wmi_event { 254 struct list_head list; 255 struct { 256 struct wil6210_mbox_hdr hdr; 257 struct wil6210_mbox_hdr_wmi wmi; 258 u8 data[0]; 259 } __packed event; 260}; 261 262enum { /* for wil_ctx.mapped_as */ 263 wil_mapped_as_none = 0, 264 wil_mapped_as_single = 1, 265 wil_mapped_as_page = 2, 266}; 267 268/** 269 * struct wil_ctx - software context for Vring descriptor 270 */ 271struct wil_ctx { 272 struct sk_buff *skb; 273 u8 nr_frags; 274 u8 mapped_as; 275}; 276 277union vring_desc; 278 279struct vring { 280 dma_addr_t pa; 281 volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */ 282 u16 size; /* number of vring_desc elements */ 283 u32 swtail; 284 u32 swhead; 285 u32 hwtail; /* write here to inform hw */ 286 struct wil_ctx *ctx; /* ctx[size] - software context */ 287}; 288 289/** 290 * Additional data for Tx Vring 291 */ 292struct vring_tx_data { 293 int enabled; 294 cycles_t idle, last_idle, begin; 295}; 296 297enum { /* for wil6210_priv.status */ 298 wil_status_fwready = 0, 299 wil_status_fwconnecting, 300 wil_status_fwconnected, 301 wil_status_dontscan, 302 wil_status_reset_done, 303 wil_status_irqen, /* FIXME: interrupts enabled - for debug */ 304 wil_status_napi_en, /* NAPI enabled protected by wil->mutex */ 305}; 306 307struct pci_dev; 308 309/** 310 * struct tid_ampdu_rx - TID aggregation information (Rx). 311 * 312 * @reorder_buf: buffer to reorder incoming aggregated MPDUs 313 * @reorder_time: jiffies when skb was added 314 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value) 315 * @reorder_timer: releases expired frames from the reorder buffer. 316 * @last_rx: jiffies of last rx activity 317 * @head_seq_num: head sequence number in reordering buffer. 318 * @stored_mpdu_num: number of MPDUs in reordering buffer 319 * @ssn: Starting Sequence Number expected to be aggregated. 320 * @buf_size: buffer size for incoming A-MPDUs 321 * @timeout: reset timer value (in TUs). 322 * @dialog_token: dialog token for aggregation session 323 * @rcu_head: RCU head used for freeing this struct 324 * 325 * This structure's lifetime is managed by RCU, assignments to 326 * the array holding it must hold the aggregation mutex. 327 * 328 */ 329struct wil_tid_ampdu_rx { 330 struct sk_buff **reorder_buf; 331 unsigned long *reorder_time; 332 struct timer_list session_timer; 333 struct timer_list reorder_timer; 334 unsigned long last_rx; 335 u16 head_seq_num; 336 u16 stored_mpdu_num; 337 u16 ssn; 338 u16 buf_size; 339 u16 timeout; 340 u16 ssn_last_drop; 341 u8 dialog_token; 342 bool first_time; /* is it 1-st time this buffer used? */ 343}; 344 345enum wil_sta_status { 346 wil_sta_unused = 0, 347 wil_sta_conn_pending = 1, 348 wil_sta_connected = 2, 349}; 350 351#define WIL_STA_TID_NUM (16) 352 353struct wil_net_stats { 354 unsigned long rx_packets; 355 unsigned long tx_packets; 356 unsigned long rx_bytes; 357 unsigned long tx_bytes; 358 unsigned long tx_errors; 359 unsigned long rx_dropped; 360 u16 last_mcs_rx; 361}; 362 363/** 364 * struct wil_sta_info - data for peer 365 * 366 * Peer identified by its CID (connection ID) 367 * NIC performs beam forming for each peer; 368 * if no beam forming done, frame exchange is not 369 * possible. 370 */ 371struct wil_sta_info { 372 u8 addr[ETH_ALEN]; 373 enum wil_sta_status status; 374 struct wil_net_stats stats; 375 bool data_port_open; /* can send any data, not only EAPOL */ 376 /* Rx BACK */ 377 struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM]; 378 spinlock_t tid_rx_lock; /* guarding tid_rx array */ 379 unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 380 unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)]; 381}; 382 383enum { 384 fw_recovery_idle = 0, 385 fw_recovery_pending = 1, 386 fw_recovery_running = 2, 387}; 388 389struct wil6210_priv { 390 struct pci_dev *pdev; 391 int n_msi; 392 struct wireless_dev *wdev; 393 void __iomem *csr; 394 ulong status; 395 u32 fw_version; 396 u32 hw_version; 397 struct wil_board *board; 398 u8 n_mids; /* number of additional MIDs as reported by FW */ 399 u32 recovery_count; /* num of FW recovery attempts in a short time */ 400 u32 recovery_state; /* FW recovery state machine */ 401 unsigned long last_fw_recovery; /* jiffies of last fw recovery */ 402 wait_queue_head_t wq; /* for all wait_event() use */ 403 /* profile */ 404 u32 monitor_flags; 405 u32 secure_pcp; /* create secure PCP? */ 406 int sinfo_gen; 407 u32 itr_trsh; 408 /* cached ISR registers */ 409 u32 isr_misc; 410 /* mailbox related */ 411 struct mutex wmi_mutex; 412 struct wil6210_mbox_ctl mbox_ctl; 413 struct completion wmi_ready; 414 struct completion wmi_call; 415 u16 wmi_seq; 416 u16 reply_id; /**< wait for this WMI event */ 417 void *reply_buf; 418 u16 reply_size; 419 struct workqueue_struct *wmi_wq; /* for deferred calls */ 420 struct work_struct wmi_event_worker; 421 struct workqueue_struct *wmi_wq_conn; /* for connect worker */ 422 struct work_struct connect_worker; 423 struct work_struct disconnect_worker; 424 struct work_struct fw_error_worker; /* for FW error recovery */ 425 struct timer_list connect_timer; 426 struct timer_list scan_timer; /* detect scan timeout */ 427 int pending_connect_cid; 428 struct list_head pending_wmi_ev; 429 /* 430 * protect pending_wmi_ev 431 * - fill in IRQ from wil6210_irq_misc, 432 * - consumed in thread by wmi_event_worker 433 */ 434 spinlock_t wmi_ev_lock; 435 struct napi_struct napi_rx; 436 struct napi_struct napi_tx; 437 /* DMA related */ 438 struct vring vring_rx; 439 struct vring vring_tx[WIL6210_MAX_TX_RINGS]; 440 struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS]; 441 u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */ 442 struct wil_sta_info sta[WIL6210_MAX_CID]; 443 /* scan */ 444 struct cfg80211_scan_request *scan_request; 445 446 struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */ 447 /* statistics */ 448 atomic_t isr_count_rx, isr_count_tx; 449 /* debugfs */ 450 struct dentry *debug; 451 struct debugfs_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)]; 452 453 void *platform_handle; 454 struct wil_platform_ops platform_ops; 455}; 456 457#define wil_to_wiphy(i) (i->wdev->wiphy) 458#define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i))) 459#define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w)) 460#define wil_to_wdev(i) (i->wdev) 461#define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w)) 462#define wil_to_ndev(i) (wil_to_wdev(i)->netdev) 463#define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr)) 464#define wil_to_pcie_dev(i) (&i->pdev->dev) 465 466void wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...); 467void wil_err(struct wil6210_priv *wil, const char *fmt, ...); 468void wil_info(struct wil6210_priv *wil, const char *fmt, ...); 469#define wil_dbg(wil, fmt, arg...) do { \ 470 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \ 471 wil_dbg_trace(wil, fmt, ##arg); \ 472} while (0) 473 474#define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg) 475#define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg) 476#define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg) 477#define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg) 478 479#if defined(CONFIG_DYNAMIC_DEBUG) 480#define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \ 481 groupsize, buf, len, ascii) \ 482 print_hex_dump_debug("DBG[TXRX]" prefix_str,\ 483 prefix_type, rowsize, \ 484 groupsize, buf, len, ascii) 485 486#define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \ 487 groupsize, buf, len, ascii) \ 488 print_hex_dump_debug("DBG[ WMI]" prefix_str,\ 489 prefix_type, rowsize, \ 490 groupsize, buf, len, ascii) 491#else /* defined(CONFIG_DYNAMIC_DEBUG) */ 492static inline 493void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize, 494 int groupsize, const void *buf, size_t len, bool ascii) 495{ 496} 497 498static inline 499void wil_hex_dump_wmi(const char *prefix_str, int prefix_type, int rowsize, 500 int groupsize, const void *buf, size_t len, bool ascii) 501{ 502} 503#endif /* defined(CONFIG_DYNAMIC_DEBUG) */ 504 505void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src, 506 size_t count); 507void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src, 508 size_t count); 509 510void *wil_if_alloc(struct device *dev, void __iomem *csr); 511void wil_if_free(struct wil6210_priv *wil); 512int wil_if_add(struct wil6210_priv *wil); 513void wil_if_remove(struct wil6210_priv *wil); 514int wil_priv_init(struct wil6210_priv *wil); 515void wil_priv_deinit(struct wil6210_priv *wil); 516int wil_reset(struct wil6210_priv *wil); 517void wil_set_itr_trsh(struct wil6210_priv *wil); 518void wil_fw_error_recovery(struct wil6210_priv *wil); 519void wil_set_recovery_state(struct wil6210_priv *wil, int state); 520void wil_link_on(struct wil6210_priv *wil); 521void wil_link_off(struct wil6210_priv *wil); 522int wil_up(struct wil6210_priv *wil); 523int __wil_up(struct wil6210_priv *wil); 524int wil_down(struct wil6210_priv *wil); 525int __wil_down(struct wil6210_priv *wil); 526void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r); 527int wil_find_cid(struct wil6210_priv *wil, const u8 *mac); 528void wil_set_ethtoolops(struct net_device *ndev); 529 530void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr); 531void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr); 532int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr, 533 struct wil6210_mbox_hdr *hdr); 534int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len); 535void wmi_recv_cmd(struct wil6210_priv *wil); 536int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len, 537 u16 reply_id, void *reply, u8 reply_size, int to_msec); 538void wmi_event_worker(struct work_struct *work); 539void wmi_event_flush(struct wil6210_priv *wil); 540int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid); 541int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid); 542int wmi_set_channel(struct wil6210_priv *wil, int channel); 543int wmi_get_channel(struct wil6210_priv *wil, int *channel); 544int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index, 545 const void *mac_addr); 546int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index, 547 const void *mac_addr, int key_len, const void *key); 548int wmi_echo(struct wil6210_priv *wil); 549int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie); 550int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring); 551int wmi_p2p_cfg(struct wil6210_priv *wil, int channel); 552int wmi_rxon(struct wil6210_priv *wil, bool on); 553int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r); 554int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, u16 reason); 555 556void wil6210_clear_irq(struct wil6210_priv *wil); 557int wil6210_init_irq(struct wil6210_priv *wil, int irq); 558void wil6210_fini_irq(struct wil6210_priv *wil, int irq); 559void wil_mask_irq(struct wil6210_priv *wil); 560void wil_unmask_irq(struct wil6210_priv *wil); 561void wil_disable_irq(struct wil6210_priv *wil); 562void wil_enable_irq(struct wil6210_priv *wil); 563int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, 564 struct cfg80211_mgmt_tx_params *params, 565 u64 *cookie); 566 567int wil6210_debugfs_init(struct wil6210_priv *wil); 568void wil6210_debugfs_remove(struct wil6210_priv *wil); 569int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid, 570 struct station_info *sinfo); 571 572struct wireless_dev *wil_cfg80211_init(struct device *dev); 573void wil_wdev_free(struct wil6210_priv *wil); 574 575int wmi_set_mac_address(struct wil6210_priv *wil, void *addr); 576int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan); 577int wmi_pcp_stop(struct wil6210_priv *wil); 578void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid); 579 580int wil_rx_init(struct wil6210_priv *wil); 581void wil_rx_fini(struct wil6210_priv *wil); 582 583/* TX API */ 584int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size, 585 int cid, int tid); 586void wil_vring_fini_tx(struct wil6210_priv *wil, int id); 587 588netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev); 589int wil_tx_complete(struct wil6210_priv *wil, int ringid); 590void wil6210_unmask_irq_tx(struct wil6210_priv *wil); 591 592/* RX API */ 593void wil_rx_handle(struct wil6210_priv *wil, int *quota); 594void wil6210_unmask_irq_rx(struct wil6210_priv *wil); 595 596int wil_iftype_nl2wmi(enum nl80211_iftype type); 597 598int wil_ioctl(struct wil6210_priv *wil, void __user *data, int cmd); 599int wil_request_firmware(struct wil6210_priv *wil, const char *name); 600 601#endif /* __WIL6210_H__ */ 602