1/******************************************************************************
2 *
3 * Copyright(c) 2009-2012  Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#ifndef __RTL_EFUSE_H_
27#define __RTL_EFUSE_H_
28
29#define EFUSE_IC_ID_OFFSET		506
30
31#define EFUSE_MAX_WORD_UNIT		4
32
33#define EFUSE_INIT_MAP			0
34#define EFUSE_MODIFY_MAP		1
35
36#define PG_STATE_HEADER			0x01
37#define PG_STATE_WORD_0			0x02
38#define PG_STATE_WORD_1			0x04
39#define PG_STATE_WORD_2			0x08
40#define PG_STATE_WORD_3			0x10
41#define PG_STATE_DATA			0x20
42
43#define PG_SWBYTE_H			0x01
44#define PG_SWBYTE_L			0x02
45
46#define _POWERON_DELAY_
47#define _PRE_EXECUTE_READ_CMD_
48
49#define EFUSE_REPEAT_THRESHOLD_		3
50#define EFUSE_ERROE_HANDLE		1
51
52struct efuse_map {
53	u8 offset;
54	u8 word_start;
55	u8 byte_start;
56	u8 byte_cnts;
57};
58
59struct pgpkt_struct {
60	u8 offset;
61	u8 word_en;
62	u8 data[8];
63};
64
65enum efuse_data_item {
66	EFUSE_CHIP_ID = 0,
67	EFUSE_LDO_SETTING,
68	EFUSE_CLK_SETTING,
69	EFUSE_SDIO_SETTING,
70	EFUSE_CCCR,
71	EFUSE_SDIO_MODE,
72	EFUSE_OCR,
73	EFUSE_F0CIS,
74	EFUSE_F1CIS,
75	EFUSE_MAC_ADDR,
76	EFUSE_EEPROM_VER,
77	EFUSE_CHAN_PLAN,
78	EFUSE_TXPW_TAB
79};
80
81enum {
82	VOLTAGE_V25 = 0x03,
83	LDOE25_SHIFT = 28,
84};
85
86struct efuse_priv {
87	u8 id[2];
88	u8 ldo_setting[2];
89	u8 clk_setting[2];
90	u8 cccr;
91	u8 sdio_mode;
92	u8 ocr[3];
93	u8 cis0[17];
94	u8 cis1[48];
95	u8 mac_addr[6];
96	u8 eeprom_verno;
97	u8 channel_plan;
98	u8 tx_power_b[14];
99	u8 tx_power_g[14];
100};
101
102void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
103void efuse_initialize(struct ieee80211_hw *hw);
104u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
105int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data);
106void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
107void read_efuse(struct ieee80211_hw *hw, u16 _offset,
108		u16 _size_byte, u8 *pbuf);
109void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
110		       u16 offset, u32 *value);
111void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
112			u16 offset, u32 value);
113bool efuse_shadow_update(struct ieee80211_hw *hw);
114bool efuse_shadow_update_chk(struct ieee80211_hw *hw);
115void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw);
116void efuse_force_write_vendor_Id(struct ieee80211_hw *hw);
117void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
118
119#endif
120