1 2#include <linux/device.h> 3#include <linux/io.h> 4#include <linux/ioport.h> 5#include <linux/module.h> 6#include <linux/of_address.h> 7#include <linux/pci_regs.h> 8#include <linux/sizes.h> 9#include <linux/slab.h> 10#include <linux/string.h> 11 12/* Max address size we deal with */ 13#define OF_MAX_ADDR_CELLS 4 14#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) 15#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) 16 17static struct of_bus *of_match_bus(struct device_node *np); 18static int __of_address_to_resource(struct device_node *dev, 19 const __be32 *addrp, u64 size, unsigned int flags, 20 const char *name, struct resource *r); 21 22/* Debug utility */ 23#ifdef DEBUG 24static void of_dump_addr(const char *s, const __be32 *addr, int na) 25{ 26 printk(KERN_DEBUG "%s", s); 27 while (na--) 28 printk(" %08x", be32_to_cpu(*(addr++))); 29 printk("\n"); 30} 31#else 32static void of_dump_addr(const char *s, const __be32 *addr, int na) { } 33#endif 34 35/* Callbacks for bus specific translators */ 36struct of_bus { 37 const char *name; 38 const char *addresses; 39 int (*match)(struct device_node *parent); 40 void (*count_cells)(struct device_node *child, 41 int *addrc, int *sizec); 42 u64 (*map)(__be32 *addr, const __be32 *range, 43 int na, int ns, int pna); 44 int (*translate)(__be32 *addr, u64 offset, int na); 45 unsigned int (*get_flags)(const __be32 *addr); 46}; 47 48/* 49 * Default translator (generic bus) 50 */ 51 52static void of_bus_default_count_cells(struct device_node *dev, 53 int *addrc, int *sizec) 54{ 55 if (addrc) 56 *addrc = of_n_addr_cells(dev); 57 if (sizec) 58 *sizec = of_n_size_cells(dev); 59} 60 61static u64 of_bus_default_map(__be32 *addr, const __be32 *range, 62 int na, int ns, int pna) 63{ 64 u64 cp, s, da; 65 66 cp = of_read_number(range, na); 67 s = of_read_number(range + na + pna, ns); 68 da = of_read_number(addr, na); 69 70 pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", 71 (unsigned long long)cp, (unsigned long long)s, 72 (unsigned long long)da); 73 74 if (da < cp || da >= (cp + s)) 75 return OF_BAD_ADDR; 76 return da - cp; 77} 78 79static int of_bus_default_translate(__be32 *addr, u64 offset, int na) 80{ 81 u64 a = of_read_number(addr, na); 82 memset(addr, 0, na * 4); 83 a += offset; 84 if (na > 1) 85 addr[na - 2] = cpu_to_be32(a >> 32); 86 addr[na - 1] = cpu_to_be32(a & 0xffffffffu); 87 88 return 0; 89} 90 91static unsigned int of_bus_default_get_flags(const __be32 *addr) 92{ 93 return IORESOURCE_MEM; 94} 95 96#ifdef CONFIG_OF_ADDRESS_PCI 97/* 98 * PCI bus specific translator 99 */ 100 101static int of_bus_pci_match(struct device_node *np) 102{ 103 /* 104 * "pciex" is PCI Express 105 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs 106 * "ht" is hypertransport 107 */ 108 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") || 109 !strcmp(np->type, "vci") || !strcmp(np->type, "ht"); 110} 111 112static void of_bus_pci_count_cells(struct device_node *np, 113 int *addrc, int *sizec) 114{ 115 if (addrc) 116 *addrc = 3; 117 if (sizec) 118 *sizec = 2; 119} 120 121static unsigned int of_bus_pci_get_flags(const __be32 *addr) 122{ 123 unsigned int flags = 0; 124 u32 w = be32_to_cpup(addr); 125 126 switch((w >> 24) & 0x03) { 127 case 0x01: 128 flags |= IORESOURCE_IO; 129 break; 130 case 0x02: /* 32 bits */ 131 case 0x03: /* 64 bits */ 132 flags |= IORESOURCE_MEM; 133 break; 134 } 135 if (w & 0x40000000) 136 flags |= IORESOURCE_PREFETCH; 137 return flags; 138} 139 140static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, 141 int pna) 142{ 143 u64 cp, s, da; 144 unsigned int af, rf; 145 146 af = of_bus_pci_get_flags(addr); 147 rf = of_bus_pci_get_flags(range); 148 149 /* Check address type match */ 150 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) 151 return OF_BAD_ADDR; 152 153 /* Read address values, skipping high cell */ 154 cp = of_read_number(range + 1, na - 1); 155 s = of_read_number(range + na + pna, ns); 156 da = of_read_number(addr + 1, na - 1); 157 158 pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n", 159 (unsigned long long)cp, (unsigned long long)s, 160 (unsigned long long)da); 161 162 if (da < cp || da >= (cp + s)) 163 return OF_BAD_ADDR; 164 return da - cp; 165} 166 167static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) 168{ 169 return of_bus_default_translate(addr + 1, offset, na - 1); 170} 171#endif /* CONFIG_OF_ADDRESS_PCI */ 172 173#ifdef CONFIG_PCI 174const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, 175 unsigned int *flags) 176{ 177 const __be32 *prop; 178 unsigned int psize; 179 struct device_node *parent; 180 struct of_bus *bus; 181 int onesize, i, na, ns; 182 183 /* Get parent & match bus type */ 184 parent = of_get_parent(dev); 185 if (parent == NULL) 186 return NULL; 187 bus = of_match_bus(parent); 188 if (strcmp(bus->name, "pci")) { 189 of_node_put(parent); 190 return NULL; 191 } 192 bus->count_cells(dev, &na, &ns); 193 of_node_put(parent); 194 if (!OF_CHECK_ADDR_COUNT(na)) 195 return NULL; 196 197 /* Get "reg" or "assigned-addresses" property */ 198 prop = of_get_property(dev, bus->addresses, &psize); 199 if (prop == NULL) 200 return NULL; 201 psize /= 4; 202 203 onesize = na + ns; 204 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { 205 u32 val = be32_to_cpu(prop[0]); 206 if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { 207 if (size) 208 *size = of_read_number(prop + na, ns); 209 if (flags) 210 *flags = bus->get_flags(prop); 211 return prop; 212 } 213 } 214 return NULL; 215} 216EXPORT_SYMBOL(of_get_pci_address); 217 218int of_pci_address_to_resource(struct device_node *dev, int bar, 219 struct resource *r) 220{ 221 const __be32 *addrp; 222 u64 size; 223 unsigned int flags; 224 225 addrp = of_get_pci_address(dev, bar, &size, &flags); 226 if (addrp == NULL) 227 return -EINVAL; 228 return __of_address_to_resource(dev, addrp, size, flags, NULL, r); 229} 230EXPORT_SYMBOL_GPL(of_pci_address_to_resource); 231 232int of_pci_range_parser_init(struct of_pci_range_parser *parser, 233 struct device_node *node) 234{ 235 const int na = 3, ns = 2; 236 int rlen; 237 238 parser->node = node; 239 parser->pna = of_n_addr_cells(node); 240 parser->np = parser->pna + na + ns; 241 242 parser->range = of_get_property(node, "ranges", &rlen); 243 if (parser->range == NULL) 244 return -ENOENT; 245 246 parser->end = parser->range + rlen / sizeof(__be32); 247 248 return 0; 249} 250EXPORT_SYMBOL_GPL(of_pci_range_parser_init); 251 252struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, 253 struct of_pci_range *range) 254{ 255 const int na = 3, ns = 2; 256 257 if (!range) 258 return NULL; 259 260 if (!parser->range || parser->range + parser->np > parser->end) 261 return NULL; 262 263 range->pci_space = parser->range[0]; 264 range->flags = of_bus_pci_get_flags(parser->range); 265 range->pci_addr = of_read_number(parser->range + 1, ns); 266 range->cpu_addr = of_translate_address(parser->node, 267 parser->range + na); 268 range->size = of_read_number(parser->range + parser->pna + na, ns); 269 270 parser->range += parser->np; 271 272 /* Now consume following elements while they are contiguous */ 273 while (parser->range + parser->np <= parser->end) { 274 u32 flags, pci_space; 275 u64 pci_addr, cpu_addr, size; 276 277 pci_space = be32_to_cpup(parser->range); 278 flags = of_bus_pci_get_flags(parser->range); 279 pci_addr = of_read_number(parser->range + 1, ns); 280 cpu_addr = of_translate_address(parser->node, 281 parser->range + na); 282 size = of_read_number(parser->range + parser->pna + na, ns); 283 284 if (flags != range->flags) 285 break; 286 if (pci_addr != range->pci_addr + range->size || 287 cpu_addr != range->cpu_addr + range->size) 288 break; 289 290 range->size += size; 291 parser->range += parser->np; 292 } 293 294 return range; 295} 296EXPORT_SYMBOL_GPL(of_pci_range_parser_one); 297 298/* 299 * of_pci_range_to_resource - Create a resource from an of_pci_range 300 * @range: the PCI range that describes the resource 301 * @np: device node where the range belongs to 302 * @res: pointer to a valid resource that will be updated to 303 * reflect the values contained in the range. 304 * 305 * Returns EINVAL if the range cannot be converted to resource. 306 * 307 * Note that if the range is an IO range, the resource will be converted 308 * using pci_address_to_pio() which can fail if it is called too early or 309 * if the range cannot be matched to any host bridge IO space (our case here). 310 * To guard against that we try to register the IO range first. 311 * If that fails we know that pci_address_to_pio() will do too. 312 */ 313int of_pci_range_to_resource(struct of_pci_range *range, 314 struct device_node *np, struct resource *res) 315{ 316 int err; 317 res->flags = range->flags; 318 res->parent = res->child = res->sibling = NULL; 319 res->name = np->full_name; 320 321 if (res->flags & IORESOURCE_IO) { 322 unsigned long port; 323 err = pci_register_io_range(range->cpu_addr, range->size); 324 if (err) 325 goto invalid_range; 326 port = pci_address_to_pio(range->cpu_addr); 327 if (port == (unsigned long)-1) { 328 err = -EINVAL; 329 goto invalid_range; 330 } 331 res->start = port; 332 } else { 333 res->start = range->cpu_addr; 334 } 335 res->end = res->start + range->size - 1; 336 return 0; 337 338invalid_range: 339 res->start = (resource_size_t)OF_BAD_ADDR; 340 res->end = (resource_size_t)OF_BAD_ADDR; 341 return err; 342} 343#endif /* CONFIG_PCI */ 344 345/* 346 * ISA bus specific translator 347 */ 348 349static int of_bus_isa_match(struct device_node *np) 350{ 351 return !strcmp(np->name, "isa"); 352} 353 354static void of_bus_isa_count_cells(struct device_node *child, 355 int *addrc, int *sizec) 356{ 357 if (addrc) 358 *addrc = 2; 359 if (sizec) 360 *sizec = 1; 361} 362 363static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, 364 int pna) 365{ 366 u64 cp, s, da; 367 368 /* Check address type match */ 369 if ((addr[0] ^ range[0]) & cpu_to_be32(1)) 370 return OF_BAD_ADDR; 371 372 /* Read address values, skipping high cell */ 373 cp = of_read_number(range + 1, na - 1); 374 s = of_read_number(range + na + pna, ns); 375 da = of_read_number(addr + 1, na - 1); 376 377 pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", 378 (unsigned long long)cp, (unsigned long long)s, 379 (unsigned long long)da); 380 381 if (da < cp || da >= (cp + s)) 382 return OF_BAD_ADDR; 383 return da - cp; 384} 385 386static int of_bus_isa_translate(__be32 *addr, u64 offset, int na) 387{ 388 return of_bus_default_translate(addr + 1, offset, na - 1); 389} 390 391static unsigned int of_bus_isa_get_flags(const __be32 *addr) 392{ 393 unsigned int flags = 0; 394 u32 w = be32_to_cpup(addr); 395 396 if (w & 1) 397 flags |= IORESOURCE_IO; 398 else 399 flags |= IORESOURCE_MEM; 400 return flags; 401} 402 403/* 404 * Array of bus specific translators 405 */ 406 407static struct of_bus of_busses[] = { 408#ifdef CONFIG_OF_ADDRESS_PCI 409 /* PCI */ 410 { 411 .name = "pci", 412 .addresses = "assigned-addresses", 413 .match = of_bus_pci_match, 414 .count_cells = of_bus_pci_count_cells, 415 .map = of_bus_pci_map, 416 .translate = of_bus_pci_translate, 417 .get_flags = of_bus_pci_get_flags, 418 }, 419#endif /* CONFIG_OF_ADDRESS_PCI */ 420 /* ISA */ 421 { 422 .name = "isa", 423 .addresses = "reg", 424 .match = of_bus_isa_match, 425 .count_cells = of_bus_isa_count_cells, 426 .map = of_bus_isa_map, 427 .translate = of_bus_isa_translate, 428 .get_flags = of_bus_isa_get_flags, 429 }, 430 /* Default */ 431 { 432 .name = "default", 433 .addresses = "reg", 434 .match = NULL, 435 .count_cells = of_bus_default_count_cells, 436 .map = of_bus_default_map, 437 .translate = of_bus_default_translate, 438 .get_flags = of_bus_default_get_flags, 439 }, 440}; 441 442static struct of_bus *of_match_bus(struct device_node *np) 443{ 444 int i; 445 446 for (i = 0; i < ARRAY_SIZE(of_busses); i++) 447 if (!of_busses[i].match || of_busses[i].match(np)) 448 return &of_busses[i]; 449 BUG(); 450 return NULL; 451} 452 453static int of_empty_ranges_quirk(void) 454{ 455 if (IS_ENABLED(CONFIG_PPC)) { 456 /* To save cycles, we cache the result */ 457 static int quirk_state = -1; 458 459 if (quirk_state < 0) 460 quirk_state = 461 of_machine_is_compatible("Power Macintosh") || 462 of_machine_is_compatible("MacRISC"); 463 return quirk_state; 464 } 465 return false; 466} 467 468static int of_translate_one(struct device_node *parent, struct of_bus *bus, 469 struct of_bus *pbus, __be32 *addr, 470 int na, int ns, int pna, const char *rprop) 471{ 472 const __be32 *ranges; 473 unsigned int rlen; 474 int rone; 475 u64 offset = OF_BAD_ADDR; 476 477 /* Normally, an absence of a "ranges" property means we are 478 * crossing a non-translatable boundary, and thus the addresses 479 * below the current not cannot be converted to CPU physical ones. 480 * Unfortunately, while this is very clear in the spec, it's not 481 * what Apple understood, and they do have things like /uni-n or 482 * /ht nodes with no "ranges" property and a lot of perfectly 483 * useable mapped devices below them. Thus we treat the absence of 484 * "ranges" as equivalent to an empty "ranges" property which means 485 * a 1:1 translation at that level. It's up to the caller not to try 486 * to translate addresses that aren't supposed to be translated in 487 * the first place. --BenH. 488 * 489 * As far as we know, this damage only exists on Apple machines, so 490 * This code is only enabled on powerpc. --gcl 491 */ 492 ranges = of_get_property(parent, rprop, &rlen); 493 if (ranges == NULL && !of_empty_ranges_quirk()) { 494 pr_err("OF: no ranges; cannot translate\n"); 495 return 1; 496 } 497 if (ranges == NULL || rlen == 0) { 498 offset = of_read_number(addr, na); 499 memset(addr, 0, pna * 4); 500 pr_debug("OF: empty ranges; 1:1 translation\n"); 501 goto finish; 502 } 503 504 pr_debug("OF: walking ranges...\n"); 505 506 /* Now walk through the ranges */ 507 rlen /= 4; 508 rone = na + pna + ns; 509 for (; rlen >= rone; rlen -= rone, ranges += rone) { 510 offset = bus->map(addr, ranges, na, ns, pna); 511 if (offset != OF_BAD_ADDR) 512 break; 513 } 514 if (offset == OF_BAD_ADDR) { 515 pr_debug("OF: not found !\n"); 516 return 1; 517 } 518 memcpy(addr, ranges + na, 4 * pna); 519 520 finish: 521 of_dump_addr("OF: parent translation for:", addr, pna); 522 pr_debug("OF: with offset: %llx\n", (unsigned long long)offset); 523 524 /* Translate it into parent bus space */ 525 return pbus->translate(addr, offset, pna); 526} 527 528/* 529 * Translate an address from the device-tree into a CPU physical address, 530 * this walks up the tree and applies the various bus mappings on the 531 * way. 532 * 533 * Note: We consider that crossing any level with #size-cells == 0 to mean 534 * that translation is impossible (that is we are not dealing with a value 535 * that can be mapped to a cpu physical address). This is not really specified 536 * that way, but this is traditionally the way IBM at least do things 537 */ 538static u64 __of_translate_address(struct device_node *dev, 539 const __be32 *in_addr, const char *rprop) 540{ 541 struct device_node *parent = NULL; 542 struct of_bus *bus, *pbus; 543 __be32 addr[OF_MAX_ADDR_CELLS]; 544 int na, ns, pna, pns; 545 u64 result = OF_BAD_ADDR; 546 547 pr_debug("OF: ** translation for device %s **\n", of_node_full_name(dev)); 548 549 /* Increase refcount at current level */ 550 of_node_get(dev); 551 552 /* Get parent & match bus type */ 553 parent = of_get_parent(dev); 554 if (parent == NULL) 555 goto bail; 556 bus = of_match_bus(parent); 557 558 /* Count address cells & copy address locally */ 559 bus->count_cells(dev, &na, &ns); 560 if (!OF_CHECK_COUNTS(na, ns)) { 561 pr_debug("OF: Bad cell count for %s\n", of_node_full_name(dev)); 562 goto bail; 563 } 564 memcpy(addr, in_addr, na * 4); 565 566 pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n", 567 bus->name, na, ns, of_node_full_name(parent)); 568 of_dump_addr("OF: translating address:", addr, na); 569 570 /* Translate */ 571 for (;;) { 572 /* Switch to parent bus */ 573 of_node_put(dev); 574 dev = parent; 575 parent = of_get_parent(dev); 576 577 /* If root, we have finished */ 578 if (parent == NULL) { 579 pr_debug("OF: reached root node\n"); 580 result = of_read_number(addr, na); 581 break; 582 } 583 584 /* Get new parent bus and counts */ 585 pbus = of_match_bus(parent); 586 pbus->count_cells(dev, &pna, &pns); 587 if (!OF_CHECK_COUNTS(pna, pns)) { 588 printk(KERN_ERR "prom_parse: Bad cell count for %s\n", 589 of_node_full_name(dev)); 590 break; 591 } 592 593 pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", 594 pbus->name, pna, pns, of_node_full_name(parent)); 595 596 /* Apply bus translation */ 597 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) 598 break; 599 600 /* Complete the move up one level */ 601 na = pna; 602 ns = pns; 603 bus = pbus; 604 605 of_dump_addr("OF: one level translation:", addr, na); 606 } 607 bail: 608 of_node_put(parent); 609 of_node_put(dev); 610 611 return result; 612} 613 614u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) 615{ 616 return __of_translate_address(dev, in_addr, "ranges"); 617} 618EXPORT_SYMBOL(of_translate_address); 619 620u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) 621{ 622 return __of_translate_address(dev, in_addr, "dma-ranges"); 623} 624EXPORT_SYMBOL(of_translate_dma_address); 625 626const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, 627 unsigned int *flags) 628{ 629 const __be32 *prop; 630 unsigned int psize; 631 struct device_node *parent; 632 struct of_bus *bus; 633 int onesize, i, na, ns; 634 635 /* Get parent & match bus type */ 636 parent = of_get_parent(dev); 637 if (parent == NULL) 638 return NULL; 639 bus = of_match_bus(parent); 640 bus->count_cells(dev, &na, &ns); 641 of_node_put(parent); 642 if (!OF_CHECK_ADDR_COUNT(na)) 643 return NULL; 644 645 /* Get "reg" or "assigned-addresses" property */ 646 prop = of_get_property(dev, bus->addresses, &psize); 647 if (prop == NULL) 648 return NULL; 649 psize /= 4; 650 651 onesize = na + ns; 652 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) 653 if (i == index) { 654 if (size) 655 *size = of_read_number(prop + na, ns); 656 if (flags) 657 *flags = bus->get_flags(prop); 658 return prop; 659 } 660 return NULL; 661} 662EXPORT_SYMBOL(of_get_address); 663 664#ifdef PCI_IOBASE 665struct io_range { 666 struct list_head list; 667 phys_addr_t start; 668 resource_size_t size; 669}; 670 671static LIST_HEAD(io_range_list); 672static DEFINE_SPINLOCK(io_range_lock); 673#endif 674 675/* 676 * Record the PCI IO range (expressed as CPU physical address + size). 677 * Return a negative value if an error has occured, zero otherwise 678 */ 679int __weak pci_register_io_range(phys_addr_t addr, resource_size_t size) 680{ 681 int err = 0; 682 683#ifdef PCI_IOBASE 684 struct io_range *range; 685 resource_size_t allocated_size = 0; 686 687 /* check if the range hasn't been previously recorded */ 688 spin_lock(&io_range_lock); 689 list_for_each_entry(range, &io_range_list, list) { 690 if (addr >= range->start && addr + size <= range->start + size) { 691 /* range already registered, bail out */ 692 goto end_register; 693 } 694 allocated_size += range->size; 695 } 696 697 /* range not registed yet, check for available space */ 698 if (allocated_size + size - 1 > IO_SPACE_LIMIT) { 699 /* if it's too big check if 64K space can be reserved */ 700 if (allocated_size + SZ_64K - 1 > IO_SPACE_LIMIT) { 701 err = -E2BIG; 702 goto end_register; 703 } 704 705 size = SZ_64K; 706 pr_warn("Requested IO range too big, new size set to 64K\n"); 707 } 708 709 /* add the range to the list */ 710 range = kzalloc(sizeof(*range), GFP_KERNEL); 711 if (!range) { 712 err = -ENOMEM; 713 goto end_register; 714 } 715 716 range->start = addr; 717 range->size = size; 718 719 list_add_tail(&range->list, &io_range_list); 720 721end_register: 722 spin_unlock(&io_range_lock); 723#endif 724 725 return err; 726} 727 728phys_addr_t pci_pio_to_address(unsigned long pio) 729{ 730 phys_addr_t address = (phys_addr_t)OF_BAD_ADDR; 731 732#ifdef PCI_IOBASE 733 struct io_range *range; 734 resource_size_t allocated_size = 0; 735 736 if (pio > IO_SPACE_LIMIT) 737 return address; 738 739 spin_lock(&io_range_lock); 740 list_for_each_entry(range, &io_range_list, list) { 741 if (pio >= allocated_size && pio < allocated_size + range->size) { 742 address = range->start + pio - allocated_size; 743 break; 744 } 745 allocated_size += range->size; 746 } 747 spin_unlock(&io_range_lock); 748#endif 749 750 return address; 751} 752 753unsigned long __weak pci_address_to_pio(phys_addr_t address) 754{ 755#ifdef PCI_IOBASE 756 struct io_range *res; 757 resource_size_t offset = 0; 758 unsigned long addr = -1; 759 760 spin_lock(&io_range_lock); 761 list_for_each_entry(res, &io_range_list, list) { 762 if (address >= res->start && address < res->start + res->size) { 763 addr = res->start - address + offset; 764 break; 765 } 766 offset += res->size; 767 } 768 spin_unlock(&io_range_lock); 769 770 return addr; 771#else 772 if (address > IO_SPACE_LIMIT) 773 return (unsigned long)-1; 774 775 return (unsigned long) address; 776#endif 777} 778 779static int __of_address_to_resource(struct device_node *dev, 780 const __be32 *addrp, u64 size, unsigned int flags, 781 const char *name, struct resource *r) 782{ 783 u64 taddr; 784 785 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) 786 return -EINVAL; 787 taddr = of_translate_address(dev, addrp); 788 if (taddr == OF_BAD_ADDR) 789 return -EINVAL; 790 memset(r, 0, sizeof(struct resource)); 791 if (flags & IORESOURCE_IO) { 792 unsigned long port; 793 port = pci_address_to_pio(taddr); 794 if (port == (unsigned long)-1) 795 return -EINVAL; 796 r->start = port; 797 r->end = port + size - 1; 798 } else { 799 r->start = taddr; 800 r->end = taddr + size - 1; 801 } 802 r->flags = flags; 803 r->name = name ? name : dev->full_name; 804 805 return 0; 806} 807 808/** 809 * of_address_to_resource - Translate device tree address and return as resource 810 * 811 * Note that if your address is a PIO address, the conversion will fail if 812 * the physical address can't be internally converted to an IO token with 813 * pci_address_to_pio(), that is because it's either called to early or it 814 * can't be matched to any host bridge IO space 815 */ 816int of_address_to_resource(struct device_node *dev, int index, 817 struct resource *r) 818{ 819 const __be32 *addrp; 820 u64 size; 821 unsigned int flags; 822 const char *name = NULL; 823 824 addrp = of_get_address(dev, index, &size, &flags); 825 if (addrp == NULL) 826 return -EINVAL; 827 828 /* Get optional "reg-names" property to add a name to a resource */ 829 of_property_read_string_index(dev, "reg-names", index, &name); 830 831 return __of_address_to_resource(dev, addrp, size, flags, name, r); 832} 833EXPORT_SYMBOL_GPL(of_address_to_resource); 834 835struct device_node *of_find_matching_node_by_address(struct device_node *from, 836 const struct of_device_id *matches, 837 u64 base_address) 838{ 839 struct device_node *dn = of_find_matching_node(from, matches); 840 struct resource res; 841 842 while (dn) { 843 if (of_address_to_resource(dn, 0, &res)) 844 continue; 845 if (res.start == base_address) 846 return dn; 847 dn = of_find_matching_node(dn, matches); 848 } 849 850 return NULL; 851} 852 853 854/** 855 * of_iomap - Maps the memory mapped IO for a given device_node 856 * @device: the device whose io range will be mapped 857 * @index: index of the io range 858 * 859 * Returns a pointer to the mapped memory 860 */ 861void __iomem *of_iomap(struct device_node *np, int index) 862{ 863 struct resource res; 864 865 if (of_address_to_resource(np, index, &res)) 866 return NULL; 867 868 return ioremap(res.start, resource_size(&res)); 869} 870EXPORT_SYMBOL(of_iomap); 871 872/* 873 * of_io_request_and_map - Requests a resource and maps the memory mapped IO 874 * for a given device_node 875 * @device: the device whose io range will be mapped 876 * @index: index of the io range 877 * @name: name of the resource 878 * 879 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded 880 * error code on failure. Usage example: 881 * 882 * base = of_io_request_and_map(node, 0, "foo"); 883 * if (IS_ERR(base)) 884 * return PTR_ERR(base); 885 */ 886void __iomem *of_io_request_and_map(struct device_node *np, int index, 887 char *name) 888{ 889 struct resource res; 890 void __iomem *mem; 891 892 if (of_address_to_resource(np, index, &res)) 893 return IOMEM_ERR_PTR(-EINVAL); 894 895 if (!request_mem_region(res.start, resource_size(&res), name)) 896 return IOMEM_ERR_PTR(-EBUSY); 897 898 mem = ioremap(res.start, resource_size(&res)); 899 if (!mem) { 900 release_mem_region(res.start, resource_size(&res)); 901 return IOMEM_ERR_PTR(-ENOMEM); 902 } 903 904 return mem; 905} 906EXPORT_SYMBOL(of_io_request_and_map); 907 908/** 909 * of_dma_get_range - Get DMA range info 910 * @np: device node to get DMA range info 911 * @dma_addr: pointer to store initial DMA address of DMA range 912 * @paddr: pointer to store initial CPU address of DMA range 913 * @size: pointer to store size of DMA range 914 * 915 * Look in bottom up direction for the first "dma-ranges" property 916 * and parse it. 917 * dma-ranges format: 918 * DMA addr (dma_addr) : naddr cells 919 * CPU addr (phys_addr_t) : pna cells 920 * size : nsize cells 921 * 922 * It returns -ENODEV if "dma-ranges" property was not found 923 * for this device in DT. 924 */ 925int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size) 926{ 927 struct device_node *node = of_node_get(np); 928 const __be32 *ranges = NULL; 929 int len, naddr, nsize, pna; 930 int ret = 0; 931 u64 dmaaddr; 932 933 if (!node) 934 return -EINVAL; 935 936 while (1) { 937 naddr = of_n_addr_cells(node); 938 nsize = of_n_size_cells(node); 939 node = of_get_next_parent(node); 940 if (!node) 941 break; 942 943 ranges = of_get_property(node, "dma-ranges", &len); 944 945 /* Ignore empty ranges, they imply no translation required */ 946 if (ranges && len > 0) 947 break; 948 949 /* 950 * At least empty ranges has to be defined for parent node if 951 * DMA is supported 952 */ 953 if (!ranges) 954 break; 955 } 956 957 if (!ranges) { 958 pr_debug("%s: no dma-ranges found for node(%s)\n", 959 __func__, np->full_name); 960 ret = -ENODEV; 961 goto out; 962 } 963 964 len /= sizeof(u32); 965 966 pna = of_n_addr_cells(node); 967 968 /* dma-ranges format: 969 * DMA addr : naddr cells 970 * CPU addr : pna cells 971 * size : nsize cells 972 */ 973 dmaaddr = of_read_number(ranges, naddr); 974 *paddr = of_translate_dma_address(np, ranges); 975 if (*paddr == OF_BAD_ADDR) { 976 pr_err("%s: translation of DMA address(%pad) to CPU address failed node(%s)\n", 977 __func__, dma_addr, np->full_name); 978 ret = -EINVAL; 979 goto out; 980 } 981 *dma_addr = dmaaddr; 982 983 *size = of_read_number(ranges + naddr + pna, nsize); 984 985 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", 986 *dma_addr, *paddr, *size); 987 988out: 989 of_node_put(node); 990 991 return ret; 992} 993EXPORT_SYMBOL_GPL(of_dma_get_range); 994 995/** 996 * of_dma_is_coherent - Check if device is coherent 997 * @np: device node 998 * 999 * It returns true if "dma-coherent" property was found 1000 * for this device in DT. 1001 */ 1002bool of_dma_is_coherent(struct device_node *np) 1003{ 1004 struct device_node *node = of_node_get(np); 1005 1006 while (node) { 1007 if (of_property_read_bool(node, "dma-coherent")) { 1008 of_node_put(node); 1009 return true; 1010 } 1011 node = of_get_next_parent(node); 1012 } 1013 of_node_put(node); 1014 return false; 1015} 1016EXPORT_SYMBOL_GPL(of_dma_is_coherent); 1017