1/* 2 * Copyright (c) 2014, Sony Mobile Communications AB. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14#include <linux/module.h> 15#include <linux/of.h> 16#include <linux/platform_device.h> 17#include <linux/pinctrl/pinctrl.h> 18 19#include "pinctrl-msm.h" 20 21static const struct pinctrl_pin_desc apq8064_pins[] = { 22 PINCTRL_PIN(0, "GPIO_0"), 23 PINCTRL_PIN(1, "GPIO_1"), 24 PINCTRL_PIN(2, "GPIO_2"), 25 PINCTRL_PIN(3, "GPIO_3"), 26 PINCTRL_PIN(4, "GPIO_4"), 27 PINCTRL_PIN(5, "GPIO_5"), 28 PINCTRL_PIN(6, "GPIO_6"), 29 PINCTRL_PIN(7, "GPIO_7"), 30 PINCTRL_PIN(8, "GPIO_8"), 31 PINCTRL_PIN(9, "GPIO_9"), 32 PINCTRL_PIN(10, "GPIO_10"), 33 PINCTRL_PIN(11, "GPIO_11"), 34 PINCTRL_PIN(12, "GPIO_12"), 35 PINCTRL_PIN(13, "GPIO_13"), 36 PINCTRL_PIN(14, "GPIO_14"), 37 PINCTRL_PIN(15, "GPIO_15"), 38 PINCTRL_PIN(16, "GPIO_16"), 39 PINCTRL_PIN(17, "GPIO_17"), 40 PINCTRL_PIN(18, "GPIO_18"), 41 PINCTRL_PIN(19, "GPIO_19"), 42 PINCTRL_PIN(20, "GPIO_20"), 43 PINCTRL_PIN(21, "GPIO_21"), 44 PINCTRL_PIN(22, "GPIO_22"), 45 PINCTRL_PIN(23, "GPIO_23"), 46 PINCTRL_PIN(24, "GPIO_24"), 47 PINCTRL_PIN(25, "GPIO_25"), 48 PINCTRL_PIN(26, "GPIO_26"), 49 PINCTRL_PIN(27, "GPIO_27"), 50 PINCTRL_PIN(28, "GPIO_28"), 51 PINCTRL_PIN(29, "GPIO_29"), 52 PINCTRL_PIN(30, "GPIO_30"), 53 PINCTRL_PIN(31, "GPIO_31"), 54 PINCTRL_PIN(32, "GPIO_32"), 55 PINCTRL_PIN(33, "GPIO_33"), 56 PINCTRL_PIN(34, "GPIO_34"), 57 PINCTRL_PIN(35, "GPIO_35"), 58 PINCTRL_PIN(36, "GPIO_36"), 59 PINCTRL_PIN(37, "GPIO_37"), 60 PINCTRL_PIN(38, "GPIO_38"), 61 PINCTRL_PIN(39, "GPIO_39"), 62 PINCTRL_PIN(40, "GPIO_40"), 63 PINCTRL_PIN(41, "GPIO_41"), 64 PINCTRL_PIN(42, "GPIO_42"), 65 PINCTRL_PIN(43, "GPIO_43"), 66 PINCTRL_PIN(44, "GPIO_44"), 67 PINCTRL_PIN(45, "GPIO_45"), 68 PINCTRL_PIN(46, "GPIO_46"), 69 PINCTRL_PIN(47, "GPIO_47"), 70 PINCTRL_PIN(48, "GPIO_48"), 71 PINCTRL_PIN(49, "GPIO_49"), 72 PINCTRL_PIN(50, "GPIO_50"), 73 PINCTRL_PIN(51, "GPIO_51"), 74 PINCTRL_PIN(52, "GPIO_52"), 75 PINCTRL_PIN(53, "GPIO_53"), 76 PINCTRL_PIN(54, "GPIO_54"), 77 PINCTRL_PIN(55, "GPIO_55"), 78 PINCTRL_PIN(56, "GPIO_56"), 79 PINCTRL_PIN(57, "GPIO_57"), 80 PINCTRL_PIN(58, "GPIO_58"), 81 PINCTRL_PIN(59, "GPIO_59"), 82 PINCTRL_PIN(60, "GPIO_60"), 83 PINCTRL_PIN(61, "GPIO_61"), 84 PINCTRL_PIN(62, "GPIO_62"), 85 PINCTRL_PIN(63, "GPIO_63"), 86 PINCTRL_PIN(64, "GPIO_64"), 87 PINCTRL_PIN(65, "GPIO_65"), 88 PINCTRL_PIN(66, "GPIO_66"), 89 PINCTRL_PIN(67, "GPIO_67"), 90 PINCTRL_PIN(68, "GPIO_68"), 91 PINCTRL_PIN(69, "GPIO_69"), 92 PINCTRL_PIN(70, "GPIO_70"), 93 PINCTRL_PIN(71, "GPIO_71"), 94 PINCTRL_PIN(72, "GPIO_72"), 95 PINCTRL_PIN(73, "GPIO_73"), 96 PINCTRL_PIN(74, "GPIO_74"), 97 PINCTRL_PIN(75, "GPIO_75"), 98 PINCTRL_PIN(76, "GPIO_76"), 99 PINCTRL_PIN(77, "GPIO_77"), 100 PINCTRL_PIN(78, "GPIO_78"), 101 PINCTRL_PIN(79, "GPIO_79"), 102 PINCTRL_PIN(80, "GPIO_80"), 103 PINCTRL_PIN(81, "GPIO_81"), 104 PINCTRL_PIN(82, "GPIO_82"), 105 PINCTRL_PIN(83, "GPIO_83"), 106 PINCTRL_PIN(84, "GPIO_84"), 107 PINCTRL_PIN(85, "GPIO_85"), 108 PINCTRL_PIN(86, "GPIO_86"), 109 PINCTRL_PIN(87, "GPIO_87"), 110 PINCTRL_PIN(88, "GPIO_88"), 111 PINCTRL_PIN(89, "GPIO_89"), 112 113 PINCTRL_PIN(90, "SDC1_CLK"), 114 PINCTRL_PIN(91, "SDC1_CMD"), 115 PINCTRL_PIN(92, "SDC1_DATA"), 116 PINCTRL_PIN(93, "SDC3_CLK"), 117 PINCTRL_PIN(94, "SDC3_CMD"), 118 PINCTRL_PIN(95, "SDC3_DATA"), 119}; 120 121#define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin } 122DECLARE_APQ_GPIO_PINS(0); 123DECLARE_APQ_GPIO_PINS(1); 124DECLARE_APQ_GPIO_PINS(2); 125DECLARE_APQ_GPIO_PINS(3); 126DECLARE_APQ_GPIO_PINS(4); 127DECLARE_APQ_GPIO_PINS(5); 128DECLARE_APQ_GPIO_PINS(6); 129DECLARE_APQ_GPIO_PINS(7); 130DECLARE_APQ_GPIO_PINS(8); 131DECLARE_APQ_GPIO_PINS(9); 132DECLARE_APQ_GPIO_PINS(10); 133DECLARE_APQ_GPIO_PINS(11); 134DECLARE_APQ_GPIO_PINS(12); 135DECLARE_APQ_GPIO_PINS(13); 136DECLARE_APQ_GPIO_PINS(14); 137DECLARE_APQ_GPIO_PINS(15); 138DECLARE_APQ_GPIO_PINS(16); 139DECLARE_APQ_GPIO_PINS(17); 140DECLARE_APQ_GPIO_PINS(18); 141DECLARE_APQ_GPIO_PINS(19); 142DECLARE_APQ_GPIO_PINS(20); 143DECLARE_APQ_GPIO_PINS(21); 144DECLARE_APQ_GPIO_PINS(22); 145DECLARE_APQ_GPIO_PINS(23); 146DECLARE_APQ_GPIO_PINS(24); 147DECLARE_APQ_GPIO_PINS(25); 148DECLARE_APQ_GPIO_PINS(26); 149DECLARE_APQ_GPIO_PINS(27); 150DECLARE_APQ_GPIO_PINS(28); 151DECLARE_APQ_GPIO_PINS(29); 152DECLARE_APQ_GPIO_PINS(30); 153DECLARE_APQ_GPIO_PINS(31); 154DECLARE_APQ_GPIO_PINS(32); 155DECLARE_APQ_GPIO_PINS(33); 156DECLARE_APQ_GPIO_PINS(34); 157DECLARE_APQ_GPIO_PINS(35); 158DECLARE_APQ_GPIO_PINS(36); 159DECLARE_APQ_GPIO_PINS(37); 160DECLARE_APQ_GPIO_PINS(38); 161DECLARE_APQ_GPIO_PINS(39); 162DECLARE_APQ_GPIO_PINS(40); 163DECLARE_APQ_GPIO_PINS(41); 164DECLARE_APQ_GPIO_PINS(42); 165DECLARE_APQ_GPIO_PINS(43); 166DECLARE_APQ_GPIO_PINS(44); 167DECLARE_APQ_GPIO_PINS(45); 168DECLARE_APQ_GPIO_PINS(46); 169DECLARE_APQ_GPIO_PINS(47); 170DECLARE_APQ_GPIO_PINS(48); 171DECLARE_APQ_GPIO_PINS(49); 172DECLARE_APQ_GPIO_PINS(50); 173DECLARE_APQ_GPIO_PINS(51); 174DECLARE_APQ_GPIO_PINS(52); 175DECLARE_APQ_GPIO_PINS(53); 176DECLARE_APQ_GPIO_PINS(54); 177DECLARE_APQ_GPIO_PINS(55); 178DECLARE_APQ_GPIO_PINS(56); 179DECLARE_APQ_GPIO_PINS(57); 180DECLARE_APQ_GPIO_PINS(58); 181DECLARE_APQ_GPIO_PINS(59); 182DECLARE_APQ_GPIO_PINS(60); 183DECLARE_APQ_GPIO_PINS(61); 184DECLARE_APQ_GPIO_PINS(62); 185DECLARE_APQ_GPIO_PINS(63); 186DECLARE_APQ_GPIO_PINS(64); 187DECLARE_APQ_GPIO_PINS(65); 188DECLARE_APQ_GPIO_PINS(66); 189DECLARE_APQ_GPIO_PINS(67); 190DECLARE_APQ_GPIO_PINS(68); 191DECLARE_APQ_GPIO_PINS(69); 192DECLARE_APQ_GPIO_PINS(70); 193DECLARE_APQ_GPIO_PINS(71); 194DECLARE_APQ_GPIO_PINS(72); 195DECLARE_APQ_GPIO_PINS(73); 196DECLARE_APQ_GPIO_PINS(74); 197DECLARE_APQ_GPIO_PINS(75); 198DECLARE_APQ_GPIO_PINS(76); 199DECLARE_APQ_GPIO_PINS(77); 200DECLARE_APQ_GPIO_PINS(78); 201DECLARE_APQ_GPIO_PINS(79); 202DECLARE_APQ_GPIO_PINS(80); 203DECLARE_APQ_GPIO_PINS(81); 204DECLARE_APQ_GPIO_PINS(82); 205DECLARE_APQ_GPIO_PINS(83); 206DECLARE_APQ_GPIO_PINS(84); 207DECLARE_APQ_GPIO_PINS(85); 208DECLARE_APQ_GPIO_PINS(86); 209DECLARE_APQ_GPIO_PINS(87); 210DECLARE_APQ_GPIO_PINS(88); 211DECLARE_APQ_GPIO_PINS(89); 212 213static const unsigned int sdc1_clk_pins[] = { 90 }; 214static const unsigned int sdc1_cmd_pins[] = { 91 }; 215static const unsigned int sdc1_data_pins[] = { 92 }; 216static const unsigned int sdc3_clk_pins[] = { 93 }; 217static const unsigned int sdc3_cmd_pins[] = { 94 }; 218static const unsigned int sdc3_data_pins[] = { 95 }; 219 220#define FUNCTION(fname) \ 221 [APQ_MUX_##fname] = { \ 222 .name = #fname, \ 223 .groups = fname##_groups, \ 224 .ngroups = ARRAY_SIZE(fname##_groups), \ 225 } 226 227#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \ 228 { \ 229 .name = "gpio" #id, \ 230 .pins = gpio##id##_pins, \ 231 .npins = ARRAY_SIZE(gpio##id##_pins), \ 232 .funcs = (int[]){ \ 233 APQ_MUX_gpio, \ 234 APQ_MUX_##f1, \ 235 APQ_MUX_##f2, \ 236 APQ_MUX_##f3, \ 237 APQ_MUX_##f4, \ 238 APQ_MUX_##f5, \ 239 APQ_MUX_##f6, \ 240 APQ_MUX_##f7, \ 241 APQ_MUX_##f8, \ 242 APQ_MUX_##f9, \ 243 APQ_MUX_##f10, \ 244 }, \ 245 .nfuncs = 11, \ 246 .ctl_reg = 0x1000 + 0x10 * id, \ 247 .io_reg = 0x1004 + 0x10 * id, \ 248 .intr_cfg_reg = 0x1008 + 0x10 * id, \ 249 .intr_status_reg = 0x100c + 0x10 * id, \ 250 .intr_target_reg = 0x400 + 0x4 * id, \ 251 .mux_bit = 2, \ 252 .pull_bit = 0, \ 253 .drv_bit = 6, \ 254 .oe_bit = 9, \ 255 .in_bit = 0, \ 256 .out_bit = 1, \ 257 .intr_enable_bit = 0, \ 258 .intr_status_bit = 0, \ 259 .intr_ack_high = 1, \ 260 .intr_target_bit = 0, \ 261 .intr_target_kpss_val = 4, \ 262 .intr_raw_status_bit = 3, \ 263 .intr_polarity_bit = 1, \ 264 .intr_detection_bit = 2, \ 265 .intr_detection_width = 1, \ 266 } 267 268#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 269 { \ 270 .name = #pg_name, \ 271 .pins = pg_name##_pins, \ 272 .npins = ARRAY_SIZE(pg_name##_pins), \ 273 .ctl_reg = ctl, \ 274 .io_reg = 0, \ 275 .intr_cfg_reg = 0, \ 276 .intr_status_reg = 0, \ 277 .intr_target_reg = 0, \ 278 .mux_bit = -1, \ 279 .pull_bit = pull, \ 280 .drv_bit = drv, \ 281 .oe_bit = -1, \ 282 .in_bit = -1, \ 283 .out_bit = -1, \ 284 .intr_enable_bit = -1, \ 285 .intr_status_bit = -1, \ 286 .intr_target_bit = -1, \ 287 .intr_target_kpss_val = -1, \ 288 .intr_raw_status_bit = -1, \ 289 .intr_polarity_bit = -1, \ 290 .intr_detection_bit = -1, \ 291 .intr_detection_width = -1, \ 292 } 293 294enum apq8064_functions { 295 APQ_MUX_cam_mclk, 296 APQ_MUX_codec_mic_i2s, 297 APQ_MUX_codec_spkr_i2s, 298 APQ_MUX_gpio, 299 APQ_MUX_gsbi1, 300 APQ_MUX_gsbi2, 301 APQ_MUX_gsbi3, 302 APQ_MUX_gsbi4, 303 APQ_MUX_gsbi4_cam_i2c, 304 APQ_MUX_gsbi5, 305 APQ_MUX_gsbi5_spi_cs1, 306 APQ_MUX_gsbi5_spi_cs2, 307 APQ_MUX_gsbi5_spi_cs3, 308 APQ_MUX_gsbi6, 309 APQ_MUX_gsbi6_spi_cs1, 310 APQ_MUX_gsbi6_spi_cs2, 311 APQ_MUX_gsbi6_spi_cs3, 312 APQ_MUX_gsbi7, 313 APQ_MUX_gsbi7_spi_cs1, 314 APQ_MUX_gsbi7_spi_cs2, 315 APQ_MUX_gsbi7_spi_cs3, 316 APQ_MUX_gsbi_cam_i2c, 317 APQ_MUX_hdmi, 318 APQ_MUX_mi2s, 319 APQ_MUX_riva_bt, 320 APQ_MUX_riva_fm, 321 APQ_MUX_riva_wlan, 322 APQ_MUX_sdc2, 323 APQ_MUX_sdc4, 324 APQ_MUX_slimbus, 325 APQ_MUX_spkr_i2s, 326 APQ_MUX_tsif1, 327 APQ_MUX_tsif2, 328 APQ_MUX_usb2_hsic, 329 APQ_MUX_ps_hold, 330 APQ_MUX_NA, 331}; 332 333static const char * const cam_mclk_groups[] = { 334 "gpio4" "gpio5" 335}; 336static const char * const codec_mic_i2s_groups[] = { 337 "gpio34", "gpio35", "gpio36", "gpio37", "gpio38" 338}; 339static const char * const codec_spkr_i2s_groups[] = { 340 "gpio39", "gpio40", "gpio41", "gpio42" 341}; 342static const char * const gpio_groups[] = { 343 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 344 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 345 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 346 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 347 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 348 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 349 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 350 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 351 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 352 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 353 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 354 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 355 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89" 356}; 357static const char * const ps_hold_groups[] = { 358 "gpio78" 359}; 360static const char * const gsbi1_groups[] = { 361 "gpio18", "gpio19", "gpio20", "gpio21" 362}; 363static const char * const gsbi2_groups[] = { 364 "gpio22", "gpio23", "gpio24", "gpio25" 365}; 366static const char * const gsbi3_groups[] = { 367 "gpio6", "gpio7", "gpio8", "gpio9" 368}; 369static const char * const gsbi4_groups[] = { 370 "gpio10", "gpio11", "gpio12", "gpio13" 371}; 372static const char * const gsbi4_cam_i2c_groups[] = { 373 "gpio10", "gpio11", "gpio12", "gpio13" 374}; 375static const char * const gsbi5_groups[] = { 376 "gpio51", "gpio52", "gpio53", "gpio54" 377}; 378static const char * const gsbi5_spi_cs1_groups[] = { 379 "gpio47" 380}; 381static const char * const gsbi5_spi_cs2_groups[] = { 382 "gpio31" 383}; 384static const char * const gsbi5_spi_cs3_groups[] = { 385 "gpio32" 386}; 387static const char * const gsbi6_groups[] = { 388 "gpio14", "gpio15", "gpio16", "gpio17" 389}; 390static const char * const gsbi6_spi_cs1_groups[] = { 391 "gpio47" 392}; 393static const char * const gsbi6_spi_cs2_groups[] = { 394 "gpio31" 395}; 396static const char * const gsbi6_spi_cs3_groups[] = { 397 "gpio32" 398}; 399static const char * const gsbi7_groups[] = { 400 "gpio82", "gpio83", "gpio84", "gpio85" 401}; 402static const char * const gsbi7_spi_cs1_groups[] = { 403 "gpio47" 404}; 405static const char * const gsbi7_spi_cs2_groups[] = { 406 "gpio31" 407}; 408static const char * const gsbi7_spi_cs3_groups[] = { 409 "gpio32" 410}; 411static const char * const gsbi_cam_i2c_groups[] = { 412 "gpio10", "gpio11", "gpio12", "gpio13" 413}; 414static const char * const hdmi_groups[] = { 415 "gpio69", "gpio70", "gpio71", "gpio72" 416}; 417static const char * const mi2s_groups[] = { 418 "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33" 419}; 420static const char * const riva_bt_groups[] = { 421 "gpio16", "gpio17" 422}; 423static const char * const riva_fm_groups[] = { 424 "gpio14", "gpio15" 425}; 426static const char * const riva_wlan_groups[] = { 427 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68" 428}; 429static const char * const sdc2_groups[] = { 430 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62" 431}; 432static const char * const sdc4_groups[] = { 433 "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68" 434}; 435static const char * const slimbus_groups[] = { 436 "gpio40", "gpio41" 437}; 438static const char * const spkr_i2s_groups[] = { 439 "gpio47", "gpio48", "gpio49", "gpio50" 440}; 441static const char * const tsif1_groups[] = { 442 "gpio55", "gpio56", "gpio57" 443}; 444static const char * const tsif2_groups[] = { 445 "gpio58", "gpio59", "gpio60" 446}; 447static const char * const usb2_hsic_groups[] = { 448 "gpio88", "gpio89" 449}; 450 451static const struct msm_function apq8064_functions[] = { 452 FUNCTION(cam_mclk), 453 FUNCTION(codec_mic_i2s), 454 FUNCTION(codec_spkr_i2s), 455 FUNCTION(gpio), 456 FUNCTION(gsbi1), 457 FUNCTION(gsbi2), 458 FUNCTION(gsbi3), 459 FUNCTION(gsbi4), 460 FUNCTION(gsbi4_cam_i2c), 461 FUNCTION(gsbi5), 462 FUNCTION(gsbi5_spi_cs1), 463 FUNCTION(gsbi5_spi_cs2), 464 FUNCTION(gsbi5_spi_cs3), 465 FUNCTION(gsbi6), 466 FUNCTION(gsbi6_spi_cs1), 467 FUNCTION(gsbi6_spi_cs2), 468 FUNCTION(gsbi6_spi_cs3), 469 FUNCTION(gsbi7), 470 FUNCTION(gsbi7_spi_cs1), 471 FUNCTION(gsbi7_spi_cs2), 472 FUNCTION(gsbi7_spi_cs3), 473 FUNCTION(gsbi_cam_i2c), 474 FUNCTION(hdmi), 475 FUNCTION(mi2s), 476 FUNCTION(riva_bt), 477 FUNCTION(riva_fm), 478 FUNCTION(riva_wlan), 479 FUNCTION(sdc2), 480 FUNCTION(sdc4), 481 FUNCTION(slimbus), 482 FUNCTION(spkr_i2s), 483 FUNCTION(tsif1), 484 FUNCTION(tsif2), 485 FUNCTION(usb2_hsic), 486 FUNCTION(ps_hold), 487}; 488 489static const struct msm_pingroup apq8064_groups[] = { 490 PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 491 PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 492 PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 493 PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 494 PINGROUP(4, NA, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA), 495 PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA), 496 PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA), 497 PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA), 498 PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA), 499 PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA), 500 PINGROUP(10, gsbi4, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c, NA), 501 PINGROUP(11, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c), 502 PINGROUP(12, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA), 503 PINGROUP(13, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA), 504 PINGROUP(14, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA), 505 PINGROUP(15, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA), 506 PINGROUP(16, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA), 507 PINGROUP(17, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA), 508 PINGROUP(18, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA), 509 PINGROUP(19, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA), 510 PINGROUP(20, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA), 511 PINGROUP(21, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA), 512 PINGROUP(22, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA), 513 PINGROUP(23, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA), 514 PINGROUP(24, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA), 515 PINGROUP(25, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA), 516 PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 517 PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 518 PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 519 PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 520 PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 521 PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA), 522 PINGROUP(32, mi2s, NA, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA), 523 PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 524 PINGROUP(34, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 525 PINGROUP(35, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 526 PINGROUP(36, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 527 PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 528 PINGROUP(38, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 529 PINGROUP(39, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 530 PINGROUP(40, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA), 531 PINGROUP(41, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA), 532 PINGROUP(42, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 533 PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 534 PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 535 PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 536 PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 537 PINGROUP(47, spkr_i2s, gsbi5_spi_cs1, gsbi6_spi_cs1, gsbi7_spi_cs1, NA, NA, NA, NA, NA, NA), 538 PINGROUP(48, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 539 PINGROUP(49, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 540 PINGROUP(50, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA), 541 PINGROUP(51, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA), 542 PINGROUP(52, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA), 543 PINGROUP(53, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA), 544 PINGROUP(54, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA), 545 PINGROUP(55, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA), 546 PINGROUP(56, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA), 547 PINGROUP(57, tsif1, sdc2, NA, NA, NA, NA, NA, NA, NA, NA), 548 PINGROUP(58, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA), 549 PINGROUP(59, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA), 550 PINGROUP(60, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA), 551 PINGROUP(61, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA), 552 PINGROUP(62, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA), 553 PINGROUP(63, NA, sdc4, NA, NA, NA, NA, NA, NA, NA, NA), 554 PINGROUP(64, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA), 555 PINGROUP(65, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA), 556 PINGROUP(66, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA), 557 PINGROUP(67, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA), 558 PINGROUP(68, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA), 559 PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA), 560 PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA), 561 PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA), 562 PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA), 563 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 564 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 565 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 566 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 567 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 568 PINGROUP(78, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA), 569 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 570 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 571 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 572 PINGROUP(82, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA), 573 PINGROUP(83, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA, NA), 574 PINGROUP(84, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA), 575 PINGROUP(85, NA, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA), 576 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 577 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 578 PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA), 579 PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA), 580 581 SDC_PINGROUP(sdc1_clk, 0x20a0, 13, 6), 582 SDC_PINGROUP(sdc1_cmd, 0x20a0, 11, 3), 583 SDC_PINGROUP(sdc1_data, 0x20a0, 9, 0), 584 585 SDC_PINGROUP(sdc3_clk, 0x20a4, 14, 6), 586 SDC_PINGROUP(sdc3_cmd, 0x20a4, 11, 3), 587 SDC_PINGROUP(sdc3_data, 0x20a4, 9, 0), 588}; 589 590#define NUM_GPIO_PINGROUPS 90 591 592static const struct msm_pinctrl_soc_data apq8064_pinctrl = { 593 .pins = apq8064_pins, 594 .npins = ARRAY_SIZE(apq8064_pins), 595 .functions = apq8064_functions, 596 .nfunctions = ARRAY_SIZE(apq8064_functions), 597 .groups = apq8064_groups, 598 .ngroups = ARRAY_SIZE(apq8064_groups), 599 .ngpios = NUM_GPIO_PINGROUPS, 600}; 601 602static int apq8064_pinctrl_probe(struct platform_device *pdev) 603{ 604 return msm_pinctrl_probe(pdev, &apq8064_pinctrl); 605} 606 607static const struct of_device_id apq8064_pinctrl_of_match[] = { 608 { .compatible = "qcom,apq8064-pinctrl", }, 609 { }, 610}; 611 612static struct platform_driver apq8064_pinctrl_driver = { 613 .driver = { 614 .name = "apq8064-pinctrl", 615 .owner = THIS_MODULE, 616 .of_match_table = apq8064_pinctrl_of_match, 617 }, 618 .probe = apq8064_pinctrl_probe, 619 .remove = msm_pinctrl_remove, 620}; 621 622static int __init apq8064_pinctrl_init(void) 623{ 624 return platform_driver_register(&apq8064_pinctrl_driver); 625} 626arch_initcall(apq8064_pinctrl_init); 627 628static void __exit apq8064_pinctrl_exit(void) 629{ 630 platform_driver_unregister(&apq8064_pinctrl_driver); 631} 632module_exit(apq8064_pinctrl_exit); 633 634MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>"); 635MODULE_DESCRIPTION("Qualcomm APQ8064 pinctrl driver"); 636MODULE_LICENSE("GPL v2"); 637MODULE_DEVICE_TABLE(of, apq8064_pinctrl_of_match); 638