gpio.c revision 2119f7c9afaf4c5fe88e9ffec1f34c5bc6b02f78
1/* 2 * SuperH Pin Function Controller GPIO driver. 3 * 4 * Copyright (C) 2008 Magnus Damm 5 * Copyright (C) 2009 - 2012 Paul Mundt 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11 12#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt 13 14#include <linux/device.h> 15#include <linux/gpio.h> 16#include <linux/init.h> 17#include <linux/module.h> 18#include <linux/pinctrl/consumer.h> 19#include <linux/slab.h> 20#include <linux/spinlock.h> 21 22#include "core.h" 23 24struct sh_pfc_chip { 25 struct sh_pfc *pfc; 26 struct gpio_chip gpio_chip; 27}; 28 29static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc) 30{ 31 return container_of(gc, struct sh_pfc_chip, gpio_chip); 32} 33 34static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) 35{ 36 return gpio_to_pfc_chip(gc)->pfc; 37} 38 39static int sh_gpio_request(struct gpio_chip *gc, unsigned offset) 40{ 41 struct sh_pfc *pfc = gpio_to_pfc(gc); 42 unsigned long flags; 43 int ret = -EINVAL; 44 45 if (offset < pfc->info->nr_pins) 46 return pinctrl_request_gpio(offset); 47 48 pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n"); 49 50 spin_lock_irqsave(&pfc->lock, flags); 51 52 if (!sh_pfc_gpio_is_function(pfc, offset)) 53 goto done; 54 55 if (sh_pfc_config_gpio(pfc, offset, PINMUX_TYPE_FUNCTION, 56 GPIO_CFG_DRYRUN)) 57 goto done; 58 59 if (sh_pfc_config_gpio(pfc, offset, PINMUX_TYPE_FUNCTION, 60 GPIO_CFG_REQ)) 61 goto done; 62 63 ret = 0; 64 65done: 66 spin_unlock_irqrestore(&pfc->lock, flags); 67 return ret; 68} 69 70static void sh_gpio_free(struct gpio_chip *gc, unsigned offset) 71{ 72 struct sh_pfc *pfc = gpio_to_pfc(gc); 73 unsigned long flags; 74 int pinmux_type; 75 76 if (offset < pfc->info->nr_pins) 77 return pinctrl_free_gpio(offset); 78 79 spin_lock_irqsave(&pfc->lock, flags); 80 81 pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE; 82 83 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); 84 85 spin_unlock_irqrestore(&pfc->lock, flags); 86} 87 88static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value) 89{ 90 struct pinmux_data_reg *dr = NULL; 91 int bit = 0; 92 93 if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) 94 BUG(); 95 else 96 sh_pfc_write_bit(dr, bit, value); 97} 98 99static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio) 100{ 101 struct pinmux_data_reg *dr = NULL; 102 int bit = 0; 103 104 if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) 105 return -EINVAL; 106 107 return sh_pfc_read_bit(dr, bit); 108} 109 110static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 111{ 112 struct sh_pfc *pfc = gpio_to_pfc(gc); 113 114 if (offset >= pfc->info->nr_pins) { 115 /* Function GPIOs can only be requested, never configured. */ 116 return -EINVAL; 117 } 118 119 return pinctrl_gpio_direction_input(offset); 120} 121 122static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset, 123 int value) 124{ 125 struct sh_pfc *pfc = gpio_to_pfc(gc); 126 127 if (offset >= pfc->info->nr_pins) { 128 /* Function GPIOs can only be requested, never configured. */ 129 return -EINVAL; 130 } 131 132 sh_gpio_set_value(gpio_to_pfc(gc), offset, value); 133 134 return pinctrl_gpio_direction_output(offset); 135} 136 137static int sh_gpio_get(struct gpio_chip *gc, unsigned offset) 138{ 139 return sh_gpio_get_value(gpio_to_pfc(gc), offset); 140} 141 142static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value) 143{ 144 sh_gpio_set_value(gpio_to_pfc(gc), offset, value); 145} 146 147static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 148{ 149 struct sh_pfc *pfc = gpio_to_pfc(gc); 150 pinmux_enum_t enum_id; 151 pinmux_enum_t *enum_ids; 152 int i, k, pos; 153 154 pos = 0; 155 enum_id = 0; 156 while (1) { 157 pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id); 158 if (pos <= 0 || !enum_id) 159 break; 160 161 for (i = 0; i < pfc->info->gpio_irq_size; i++) { 162 enum_ids = pfc->info->gpio_irq[i].enum_ids; 163 for (k = 0; enum_ids[k]; k++) { 164 if (enum_ids[k] == enum_id) 165 return pfc->info->gpio_irq[i].irq; 166 } 167 } 168 } 169 170 return -ENOSYS; 171} 172 173static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip) 174{ 175 struct sh_pfc *pfc = chip->pfc; 176 struct gpio_chip *gc = &chip->gpio_chip; 177 178 gc->request = sh_gpio_request; 179 gc->free = sh_gpio_free; 180 gc->direction_input = sh_gpio_direction_input; 181 gc->get = sh_gpio_get; 182 gc->direction_output = sh_gpio_direction_output; 183 gc->set = sh_gpio_set; 184 gc->to_irq = sh_gpio_to_irq; 185 186 gc->label = pfc->info->name; 187 gc->owner = THIS_MODULE; 188 gc->base = 0; 189 gc->ngpio = pfc->info->nr_gpios; 190} 191 192int sh_pfc_register_gpiochip(struct sh_pfc *pfc) 193{ 194 struct sh_pfc_chip *chip; 195 int ret; 196 197 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); 198 if (unlikely(!chip)) 199 return -ENOMEM; 200 201 chip->pfc = pfc; 202 203 sh_pfc_gpio_setup(chip); 204 205 ret = gpiochip_add(&chip->gpio_chip); 206 if (unlikely(ret < 0)) 207 return ret; 208 209 pfc->gpio = chip; 210 211 pr_info("%s handling gpio 0 -> %u\n", 212 pfc->info->name, pfc->info->nr_gpios - 1); 213 214 return 0; 215} 216 217int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc) 218{ 219 struct sh_pfc_chip *chip = pfc->gpio; 220 int ret; 221 222 ret = gpiochip_remove(&chip->gpio_chip); 223 if (unlikely(ret < 0)) 224 return ret; 225 226 pfc->gpio = NULL; 227 return 0; 228} 229