gpio.c revision 63d573835f835aab4c44d0e0342cf5976fb14b35 
1/*
2 * SuperH Pin Function Controller GPIO driver.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License.  See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
13
14#include <linux/device.h>
15#include <linux/gpio.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/slab.h>
20#include <linux/spinlock.h>
21
22#include "core.h"
23
24struct sh_pfc_chip {
25	struct sh_pfc		*pfc;
26	struct gpio_chip	gpio_chip;
27};
28
29static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
30{
31	return container_of(gc, struct sh_pfc_chip, gpio_chip);
32}
33
34static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
35{
36	return gpio_to_pfc_chip(gc)->pfc;
37}
38
39/* -----------------------------------------------------------------------------
40 * Pin GPIOs
41 */
42
43static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
44{
45	struct sh_pfc *pfc = gpio_to_pfc(gc);
46	struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
47
48	if (pin == NULL || pin->enum_id == 0)
49		return -EINVAL;
50
51	return pinctrl_request_gpio(offset);
52}
53
54static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
55{
56	return pinctrl_free_gpio(offset);
57}
58
59static void gpio_pin_set_value(struct sh_pfc *pfc, unsigned offset, int value)
60{
61	struct pinmux_data_reg *dr;
62	int bit;
63
64	sh_pfc_get_data_reg(pfc, offset, &dr, &bit);
65	sh_pfc_write_bit(dr, bit, value);
66}
67
68static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
69{
70	return pinctrl_gpio_direction_input(offset);
71}
72
73static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
74				    int value)
75{
76	gpio_pin_set_value(gpio_to_pfc(gc), offset, value);
77
78	return pinctrl_gpio_direction_output(offset);
79}
80
81static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
82{
83	struct sh_pfc *pfc = gpio_to_pfc(gc);
84	struct pinmux_data_reg *dr;
85	int bit;
86
87	sh_pfc_get_data_reg(pfc, offset, &dr, &bit);
88	return sh_pfc_read_bit(dr, bit);
89}
90
91static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
92{
93	gpio_pin_set_value(gpio_to_pfc(gc), offset, value);
94}
95
96static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
97{
98	struct sh_pfc *pfc = gpio_to_pfc(gc);
99	int i, k;
100
101	for (i = 0; i < pfc->info->gpio_irq_size; i++) {
102		unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
103
104		for (k = 0; gpios[k]; k++) {
105			if (gpios[k] == offset)
106				return pfc->info->gpio_irq[i].irq;
107		}
108	}
109
110	return -ENOSYS;
111}
112
113static void gpio_pin_setup(struct sh_pfc_chip *chip)
114{
115	struct sh_pfc *pfc = chip->pfc;
116	struct gpio_chip *gc = &chip->gpio_chip;
117
118	gc->request = gpio_pin_request;
119	gc->free = gpio_pin_free;
120	gc->direction_input = gpio_pin_direction_input;
121	gc->get = gpio_pin_get;
122	gc->direction_output = gpio_pin_direction_output;
123	gc->set = gpio_pin_set;
124	gc->to_irq = gpio_pin_to_irq;
125
126	gc->label = pfc->info->name;
127	gc->dev = pfc->dev;
128	gc->owner = THIS_MODULE;
129	gc->base = 0;
130	gc->ngpio = pfc->nr_pins;
131}
132
133/* -----------------------------------------------------------------------------
134 * Function GPIOs
135 */
136
137static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
138{
139	struct sh_pfc *pfc = gpio_to_pfc(gc);
140	unsigned int mark = pfc->info->func_gpios[offset].enum_id;
141	unsigned long flags;
142	int ret = -EINVAL;
143
144	pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n");
145
146	if (mark == 0)
147		return ret;
148
149	spin_lock_irqsave(&pfc->lock, flags);
150
151	if (sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_DRYRUN))
152		goto done;
153
154	if (sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_REQ))
155		goto done;
156
157	ret = 0;
158
159done:
160	spin_unlock_irqrestore(&pfc->lock, flags);
161	return ret;
162}
163
164static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
165{
166	struct sh_pfc *pfc = gpio_to_pfc(gc);
167	unsigned int mark = pfc->info->func_gpios[offset].enum_id;
168	unsigned long flags;
169
170	spin_lock_irqsave(&pfc->lock, flags);
171
172	sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_FREE);
173
174	spin_unlock_irqrestore(&pfc->lock, flags);
175}
176
177static void gpio_function_setup(struct sh_pfc_chip *chip)
178{
179	struct sh_pfc *pfc = chip->pfc;
180	struct gpio_chip *gc = &chip->gpio_chip;
181
182	gc->request = gpio_function_request;
183	gc->free = gpio_function_free;
184
185	gc->label = pfc->info->name;
186	gc->owner = THIS_MODULE;
187	gc->base = pfc->nr_pins;
188	gc->ngpio = pfc->info->nr_func_gpios;
189}
190
191/* -----------------------------------------------------------------------------
192 * Register/unregister
193 */
194
195static struct sh_pfc_chip *
196sh_pfc_add_gpiochip(struct sh_pfc *pfc, void(*setup)(struct sh_pfc_chip *))
197{
198	struct sh_pfc_chip *chip;
199	int ret;
200
201	chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
202	if (unlikely(!chip))
203		return ERR_PTR(-ENOMEM);
204
205	chip->pfc = pfc;
206
207	setup(chip);
208
209	ret = gpiochip_add(&chip->gpio_chip);
210	if (unlikely(ret < 0))
211		return ERR_PTR(ret);
212
213	pr_info("%s handling gpio %u -> %u\n",
214		chip->gpio_chip.label, chip->gpio_chip.base,
215		chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
216
217	return chip;
218}
219
220int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
221{
222	const struct pinmux_range *ranges;
223	struct pinmux_range def_range;
224	struct sh_pfc_chip *chip;
225	unsigned int nr_ranges;
226	unsigned int i;
227	int ret;
228
229	/* Register the real GPIOs chip. */
230	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
231	if (IS_ERR(chip))
232		return PTR_ERR(chip);
233
234	pfc->gpio = chip;
235
236	/* Register the GPIO to pin mappings. */
237	if (pfc->info->ranges == NULL) {
238		def_range.begin = 0;
239		def_range.end = pfc->info->nr_pins - 1;
240		ranges = &def_range;
241		nr_ranges = 1;
242	} else {
243		ranges = pfc->info->ranges;
244		nr_ranges = pfc->info->nr_ranges;
245	}
246
247	for (i = 0; i < nr_ranges; ++i) {
248		const struct pinmux_range *range = &ranges[i];
249
250		ret = gpiochip_add_pin_range(&chip->gpio_chip,
251					     dev_name(pfc->dev),
252					     range->begin, range->begin,
253					     range->end - range->begin + 1);
254		if (ret < 0)
255			return ret;
256	}
257
258	/* Register the function GPIOs chip. */
259	chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
260	if (IS_ERR(chip))
261		return PTR_ERR(chip);
262
263	pfc->func = chip;
264
265	return 0;
266}
267
268int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
269{
270	int err;
271	int ret;
272
273	ret = gpiochip_remove(&pfc->gpio->gpio_chip);
274	err = gpiochip_remove(&pfc->func->gpio_chip);
275
276	return ret < 0 ? ret : err;
277}
278