gpio.c revision cd3c1beecfeb757b16904386ea474d3c272de4ee 
1/*
2 * SuperH Pin Function Controller GPIO driver.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License.  See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
13
14#include <linux/device.h>
15#include <linux/gpio.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/slab.h>
20#include <linux/spinlock.h>
21
22#include "core.h"
23
24struct sh_pfc_gpio_data_reg {
25	const struct pinmux_data_reg *info;
26	unsigned long shadow;
27};
28
29struct sh_pfc_gpio_pin {
30	u8 dbit;
31	u8 dreg;
32};
33
34struct sh_pfc_chip {
35	struct sh_pfc			*pfc;
36	struct gpio_chip		gpio_chip;
37
38	struct sh_pfc_window		*mem;
39	struct sh_pfc_gpio_data_reg	*regs;
40	struct sh_pfc_gpio_pin		*pins;
41};
42
43static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
44{
45	return container_of(gc, struct sh_pfc_chip, gpio_chip);
46}
47
48static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
49{
50	return gpio_to_pfc_chip(gc)->pfc;
51}
52
53static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio,
54			      struct sh_pfc_gpio_data_reg **reg,
55			      unsigned int *bit)
56{
57	int idx = sh_pfc_get_pin_index(chip->pfc, gpio);
58	struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
59
60	*reg = &chip->regs[gpio_pin->dreg];
61	*bit = gpio_pin->dbit;
62}
63
64static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
65					const struct pinmux_data_reg *dreg)
66{
67	void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
68
69	return sh_pfc_read_raw_reg(mem, dreg->reg_width);
70}
71
72static void gpio_write_data_reg(struct sh_pfc_chip *chip,
73				const struct pinmux_data_reg *dreg,
74				unsigned long value)
75{
76	void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
77
78	sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
79}
80
81static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
82{
83	struct sh_pfc *pfc = chip->pfc;
84	struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
85	const struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
86	const struct pinmux_data_reg *dreg;
87	unsigned int bit;
88	unsigned int i;
89
90	for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
91		for (bit = 0; bit < dreg->reg_width; bit++) {
92			if (dreg->enum_ids[bit] == pin->enum_id) {
93				gpio_pin->dreg = i;
94				gpio_pin->dbit = bit;
95				return;
96			}
97		}
98	}
99
100	BUG();
101}
102
103static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
104{
105	struct sh_pfc *pfc = chip->pfc;
106	unsigned long addr = pfc->info->data_regs[0].reg;
107	const struct pinmux_data_reg *dreg;
108	unsigned int i;
109
110	/* Find the window that contain the GPIO registers. */
111	for (i = 0; i < pfc->num_windows; ++i) {
112		struct sh_pfc_window *window = &pfc->window[i];
113
114		if (addr >= window->phys && addr < window->phys + window->size)
115			break;
116	}
117
118	if (i == pfc->num_windows)
119		return -EINVAL;
120
121	/* GPIO data registers must be in the first memory resource. */
122	chip->mem = &pfc->window[i];
123
124	/* Count the number of data registers, allocate memory and initialize
125	 * them.
126	 */
127	for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
128		;
129
130	chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
131				  GFP_KERNEL);
132	if (chip->regs == NULL)
133		return -ENOMEM;
134
135	for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
136		chip->regs[i].info = dreg;
137		chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
138	}
139
140	for (i = 0; i < pfc->info->nr_pins; i++) {
141		if (pfc->info->pins[i].enum_id == 0)
142			continue;
143
144		gpio_setup_data_reg(chip, i);
145	}
146
147	return 0;
148}
149
150/* -----------------------------------------------------------------------------
151 * Pin GPIOs
152 */
153
154static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
155{
156	struct sh_pfc *pfc = gpio_to_pfc(gc);
157	int idx = sh_pfc_get_pin_index(pfc, offset);
158
159	if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
160		return -EINVAL;
161
162	return pinctrl_request_gpio(offset);
163}
164
165static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
166{
167	return pinctrl_free_gpio(offset);
168}
169
170static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
171			       int value)
172{
173	struct sh_pfc_gpio_data_reg *reg;
174	unsigned long pos;
175	unsigned int bit;
176
177	gpio_get_data_reg(chip, offset, &reg, &bit);
178
179	pos = reg->info->reg_width - (bit + 1);
180
181	if (value)
182		set_bit(pos, &reg->shadow);
183	else
184		clear_bit(pos, &reg->shadow);
185
186	gpio_write_data_reg(chip, reg->info, reg->shadow);
187}
188
189static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
190{
191	return pinctrl_gpio_direction_input(offset);
192}
193
194static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
195				    int value)
196{
197	gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
198
199	return pinctrl_gpio_direction_output(offset);
200}
201
202static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
203{
204	struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
205	struct sh_pfc_gpio_data_reg *reg;
206	unsigned long pos;
207	unsigned int bit;
208
209	gpio_get_data_reg(chip, offset, &reg, &bit);
210
211	pos = reg->info->reg_width - (bit + 1);
212
213	return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
214}
215
216static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
217{
218	gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
219}
220
221static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
222{
223	struct sh_pfc *pfc = gpio_to_pfc(gc);
224	int i, k;
225
226	for (i = 0; i < pfc->info->gpio_irq_size; i++) {
227		unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
228
229		for (k = 0; gpios[k]; k++) {
230			if (gpios[k] == offset)
231				return pfc->info->gpio_irq[i].irq;
232		}
233	}
234
235	return -ENOSYS;
236}
237
238static int gpio_pin_setup(struct sh_pfc_chip *chip)
239{
240	struct sh_pfc *pfc = chip->pfc;
241	struct gpio_chip *gc = &chip->gpio_chip;
242	int ret;
243
244	chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins),
245				  GFP_KERNEL);
246	if (chip->pins == NULL)
247		return -ENOMEM;
248
249	ret = gpio_setup_data_regs(chip);
250	if (ret < 0)
251		return ret;
252
253	gc->request = gpio_pin_request;
254	gc->free = gpio_pin_free;
255	gc->direction_input = gpio_pin_direction_input;
256	gc->get = gpio_pin_get;
257	gc->direction_output = gpio_pin_direction_output;
258	gc->set = gpio_pin_set;
259	gc->to_irq = gpio_pin_to_irq;
260
261	gc->label = pfc->info->name;
262	gc->dev = pfc->dev;
263	gc->owner = THIS_MODULE;
264	gc->base = 0;
265	gc->ngpio = pfc->nr_pins;
266
267	return 0;
268}
269
270/* -----------------------------------------------------------------------------
271 * Function GPIOs
272 */
273
274static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
275{
276	struct sh_pfc *pfc = gpio_to_pfc(gc);
277	unsigned int mark = pfc->info->func_gpios[offset].enum_id;
278	unsigned long flags;
279	int ret = -EINVAL;
280
281	pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n");
282
283	if (mark == 0)
284		return ret;
285
286	spin_lock_irqsave(&pfc->lock, flags);
287
288	if (sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION))
289		goto done;
290
291	ret = 0;
292
293done:
294	spin_unlock_irqrestore(&pfc->lock, flags);
295	return ret;
296}
297
298static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
299{
300}
301
302static int gpio_function_setup(struct sh_pfc_chip *chip)
303{
304	struct sh_pfc *pfc = chip->pfc;
305	struct gpio_chip *gc = &chip->gpio_chip;
306
307	gc->request = gpio_function_request;
308	gc->free = gpio_function_free;
309
310	gc->label = pfc->info->name;
311	gc->owner = THIS_MODULE;
312	gc->base = pfc->nr_pins;
313	gc->ngpio = pfc->info->nr_func_gpios;
314
315	return 0;
316}
317
318/* -----------------------------------------------------------------------------
319 * Register/unregister
320 */
321
322static struct sh_pfc_chip *
323sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *))
324{
325	struct sh_pfc_chip *chip;
326	int ret;
327
328	chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
329	if (unlikely(!chip))
330		return ERR_PTR(-ENOMEM);
331
332	chip->pfc = pfc;
333
334	ret = setup(chip);
335	if (ret < 0)
336		return ERR_PTR(ret);
337
338	ret = gpiochip_add(&chip->gpio_chip);
339	if (unlikely(ret < 0))
340		return ERR_PTR(ret);
341
342	pr_info("%s handling gpio %u -> %u\n",
343		chip->gpio_chip.label, chip->gpio_chip.base,
344		chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
345
346	return chip;
347}
348
349int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
350{
351	const struct pinmux_range *ranges;
352	struct pinmux_range def_range;
353	struct sh_pfc_chip *chip;
354	unsigned int nr_ranges;
355	unsigned int i;
356	int ret;
357
358	/* Register the real GPIOs chip. */
359	chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
360	if (IS_ERR(chip))
361		return PTR_ERR(chip);
362
363	pfc->gpio = chip;
364
365	/* Register the GPIO to pin mappings. */
366	if (pfc->info->ranges == NULL) {
367		def_range.begin = 0;
368		def_range.end = pfc->info->nr_pins - 1;
369		ranges = &def_range;
370		nr_ranges = 1;
371	} else {
372		ranges = pfc->info->ranges;
373		nr_ranges = pfc->info->nr_ranges;
374	}
375
376	for (i = 0; i < nr_ranges; ++i) {
377		const struct pinmux_range *range = &ranges[i];
378
379		ret = gpiochip_add_pin_range(&chip->gpio_chip,
380					     dev_name(pfc->dev),
381					     range->begin, range->begin,
382					     range->end - range->begin + 1);
383		if (ret < 0)
384			return ret;
385	}
386
387	/* Register the function GPIOs chip. */
388	chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
389	if (IS_ERR(chip))
390		return PTR_ERR(chip);
391
392	pfc->func = chip;
393
394	return 0;
395}
396
397int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
398{
399	int err;
400	int ret;
401
402	ret = gpiochip_remove(&pfc->gpio->gpio_chip);
403	err = gpiochip_remove(&pfc->func->gpio_chip);
404
405	return ret < 0 ? ret : err;
406}
407