1/* 2 * Driver for AT91/AT32 LCD Controller 3 * 4 * Copyright (C) 2007 Atmel Corporation 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file COPYING in the main directory of this archive for 8 * more details. 9 */ 10 11#include <linux/kernel.h> 12#include <linux/platform_device.h> 13#include <linux/dma-mapping.h> 14#include <linux/interrupt.h> 15#include <linux/clk.h> 16#include <linux/fb.h> 17#include <linux/init.h> 18#include <linux/delay.h> 19#include <linux/backlight.h> 20#include <linux/gfp.h> 21#include <linux/module.h> 22#include <linux/platform_data/atmel.h> 23#include <linux/of.h> 24#include <linux/of_device.h> 25#include <linux/of_gpio.h> 26#include <video/of_display_timing.h> 27#include <linux/regulator/consumer.h> 28#include <video/videomode.h> 29 30#include <asm/gpio.h> 31 32#include <video/atmel_lcdc.h> 33 34struct atmel_lcdfb_config { 35 bool have_alt_pixclock; 36 bool have_hozval; 37 bool have_intensity_bit; 38}; 39 40 /* LCD Controller info data structure, stored in device platform_data */ 41struct atmel_lcdfb_info { 42 spinlock_t lock; 43 struct fb_info *info; 44 void __iomem *mmio; 45 int irq_base; 46 struct work_struct task; 47 48 unsigned int smem_len; 49 struct platform_device *pdev; 50 struct clk *bus_clk; 51 struct clk *lcdc_clk; 52 53 struct backlight_device *backlight; 54 u8 bl_power; 55 u8 saved_lcdcon; 56 57 u32 pseudo_palette[16]; 58 bool have_intensity_bit; 59 60 struct atmel_lcdfb_pdata pdata; 61 62 struct atmel_lcdfb_config *config; 63 struct regulator *reg_lcd; 64}; 65 66struct atmel_lcdfb_power_ctrl_gpio { 67 int gpio; 68 int active_low; 69 70 struct list_head list; 71}; 72 73#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) 74#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) 75 76/* configurable parameters */ 77#define ATMEL_LCDC_CVAL_DEFAULT 0xc8 78#define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */ 79#define ATMEL_LCDC_FIFO_SIZE 512 /* words */ 80 81static struct atmel_lcdfb_config at91sam9261_config = { 82 .have_hozval = true, 83 .have_intensity_bit = true, 84}; 85 86static struct atmel_lcdfb_config at91sam9263_config = { 87 .have_intensity_bit = true, 88}; 89 90static struct atmel_lcdfb_config at91sam9g10_config = { 91 .have_hozval = true, 92}; 93 94static struct atmel_lcdfb_config at91sam9g45_config = { 95 .have_alt_pixclock = true, 96}; 97 98static struct atmel_lcdfb_config at91sam9g45es_config = { 99}; 100 101static struct atmel_lcdfb_config at91sam9rl_config = { 102 .have_intensity_bit = true, 103}; 104 105static struct atmel_lcdfb_config at32ap_config = { 106 .have_hozval = true, 107}; 108 109static const struct platform_device_id atmel_lcdfb_devtypes[] = { 110 { 111 .name = "at91sam9261-lcdfb", 112 .driver_data = (unsigned long)&at91sam9261_config, 113 }, { 114 .name = "at91sam9263-lcdfb", 115 .driver_data = (unsigned long)&at91sam9263_config, 116 }, { 117 .name = "at91sam9g10-lcdfb", 118 .driver_data = (unsigned long)&at91sam9g10_config, 119 }, { 120 .name = "at91sam9g45-lcdfb", 121 .driver_data = (unsigned long)&at91sam9g45_config, 122 }, { 123 .name = "at91sam9g45es-lcdfb", 124 .driver_data = (unsigned long)&at91sam9g45es_config, 125 }, { 126 .name = "at91sam9rl-lcdfb", 127 .driver_data = (unsigned long)&at91sam9rl_config, 128 }, { 129 .name = "at32ap-lcdfb", 130 .driver_data = (unsigned long)&at32ap_config, 131 }, { 132 /* terminator */ 133 } 134}; 135MODULE_DEVICE_TABLE(platform, atmel_lcdfb_devtypes); 136 137static struct atmel_lcdfb_config * 138atmel_lcdfb_get_config(struct platform_device *pdev) 139{ 140 unsigned long data; 141 142 data = platform_get_device_id(pdev)->driver_data; 143 144 return (struct atmel_lcdfb_config *)data; 145} 146 147#if defined(CONFIG_ARCH_AT91) 148#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ 149 | FBINFO_PARTIAL_PAN_OK \ 150 | FBINFO_HWACCEL_YPAN) 151 152static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, 153 struct fb_var_screeninfo *var, 154 struct fb_info *info) 155{ 156 157} 158#elif defined(CONFIG_AVR32) 159#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ 160 | FBINFO_PARTIAL_PAN_OK \ 161 | FBINFO_HWACCEL_XPAN \ 162 | FBINFO_HWACCEL_YPAN) 163 164static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, 165 struct fb_var_screeninfo *var, 166 struct fb_info *info) 167{ 168 u32 dma2dcfg; 169 u32 pixeloff; 170 171 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f; 172 173 dma2dcfg = (info->var.xres_virtual - info->var.xres) 174 * info->var.bits_per_pixel / 8; 175 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET; 176 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg); 177 178 /* Update configuration */ 179 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 180 lcdc_readl(sinfo, ATMEL_LCDC_DMACON) 181 | ATMEL_LCDC_DMAUPDT); 182} 183#endif 184 185static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8 186 | ATMEL_LCDC_POL_POSITIVE 187 | ATMEL_LCDC_ENA_PWMENABLE; 188 189#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC 190 191/* some bl->props field just changed */ 192static int atmel_bl_update_status(struct backlight_device *bl) 193{ 194 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 195 int power = sinfo->bl_power; 196 int brightness = bl->props.brightness; 197 198 /* REVISIT there may be a meaningful difference between 199 * fb_blank and power ... there seem to be some cases 200 * this doesn't handle correctly. 201 */ 202 if (bl->props.fb_blank != sinfo->bl_power) 203 power = bl->props.fb_blank; 204 else if (bl->props.power != sinfo->bl_power) 205 power = bl->props.power; 206 207 if (brightness < 0 && power == FB_BLANK_UNBLANK) 208 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); 209 else if (power != FB_BLANK_UNBLANK) 210 brightness = 0; 211 212 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness); 213 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE) 214 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 215 brightness ? contrast_ctr : 0); 216 else 217 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 218 219 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power; 220 221 return 0; 222} 223 224static int atmel_bl_get_brightness(struct backlight_device *bl) 225{ 226 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 227 228 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); 229} 230 231static const struct backlight_ops atmel_lcdc_bl_ops = { 232 .update_status = atmel_bl_update_status, 233 .get_brightness = atmel_bl_get_brightness, 234}; 235 236static void init_backlight(struct atmel_lcdfb_info *sinfo) 237{ 238 struct backlight_properties props; 239 struct backlight_device *bl; 240 241 sinfo->bl_power = FB_BLANK_UNBLANK; 242 243 if (sinfo->backlight) 244 return; 245 246 memset(&props, 0, sizeof(struct backlight_properties)); 247 props.type = BACKLIGHT_RAW; 248 props.max_brightness = 0xff; 249 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo, 250 &atmel_lcdc_bl_ops, &props); 251 if (IS_ERR(bl)) { 252 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n", 253 PTR_ERR(bl)); 254 return; 255 } 256 sinfo->backlight = bl; 257 258 bl->props.power = FB_BLANK_UNBLANK; 259 bl->props.fb_blank = FB_BLANK_UNBLANK; 260 bl->props.brightness = atmel_bl_get_brightness(bl); 261} 262 263static void exit_backlight(struct atmel_lcdfb_info *sinfo) 264{ 265 if (!sinfo->backlight) 266 return; 267 268 if (sinfo->backlight->ops) { 269 sinfo->backlight->props.power = FB_BLANK_POWERDOWN; 270 sinfo->backlight->ops->update_status(sinfo->backlight); 271 } 272 backlight_device_unregister(sinfo->backlight); 273} 274 275#else 276 277static void init_backlight(struct atmel_lcdfb_info *sinfo) 278{ 279 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n"); 280} 281 282static void exit_backlight(struct atmel_lcdfb_info *sinfo) 283{ 284} 285 286#endif 287 288static void init_contrast(struct atmel_lcdfb_info *sinfo) 289{ 290 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 291 292 /* contrast pwm can be 'inverted' */ 293 if (pdata->lcdcon_pol_negative) 294 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE); 295 296 /* have some default contrast/backlight settings */ 297 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 298 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); 299 300 if (pdata->lcdcon_is_backlight) 301 init_backlight(sinfo); 302} 303 304static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on) 305{ 306 int ret; 307 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 308 309 if (pdata->atmel_lcdfb_power_control) 310 pdata->atmel_lcdfb_power_control(pdata, on); 311 else if (sinfo->reg_lcd) { 312 if (on) { 313 ret = regulator_enable(sinfo->reg_lcd); 314 if (ret) 315 dev_err(&sinfo->pdev->dev, 316 "lcd regulator enable failed: %d\n", ret); 317 } else { 318 ret = regulator_disable(sinfo->reg_lcd); 319 if (ret) 320 dev_err(&sinfo->pdev->dev, 321 "lcd regulator disable failed: %d\n", ret); 322 } 323 } 324} 325 326static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { 327 .type = FB_TYPE_PACKED_PIXELS, 328 .visual = FB_VISUAL_TRUECOLOR, 329 .xpanstep = 0, 330 .ypanstep = 1, 331 .ywrapstep = 0, 332 .accel = FB_ACCEL_NONE, 333}; 334 335static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo, 336 unsigned long xres) 337{ 338 unsigned long lcdcon2; 339 unsigned long value; 340 341 if (!sinfo->config->have_hozval) 342 return xres; 343 344 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2); 345 value = xres; 346 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) { 347 /* STN display */ 348 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) { 349 value *= 3; 350 } 351 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4 352 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8 353 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL )) 354 value = DIV_ROUND_UP(value, 4); 355 else 356 value = DIV_ROUND_UP(value, 8); 357 } 358 359 return value; 360} 361 362static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo) 363{ 364 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 365 366 /* Turn off the LCD controller and the DMA controller */ 367 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 368 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET); 369 370 /* Wait for the LCDC core to become idle */ 371 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) 372 msleep(10); 373 374 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); 375} 376 377static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo) 378{ 379 atmel_lcdfb_stop_nowait(sinfo); 380 381 /* Wait for DMA engine to become idle... */ 382 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 383 msleep(10); 384} 385 386static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo) 387{ 388 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 389 390 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon); 391 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 392 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET) 393 | ATMEL_LCDC_PWR); 394} 395 396static void atmel_lcdfb_update_dma(struct fb_info *info, 397 struct fb_var_screeninfo *var) 398{ 399 struct atmel_lcdfb_info *sinfo = info->par; 400 struct fb_fix_screeninfo *fix = &info->fix; 401 unsigned long dma_addr; 402 403 dma_addr = (fix->smem_start + var->yoffset * fix->line_length 404 + var->xoffset * info->var.bits_per_pixel / 8); 405 406 dma_addr &= ~3UL; 407 408 /* Set framebuffer DMA base address and pixel offset */ 409 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr); 410 411 atmel_lcdfb_update_dma2d(sinfo, var, info); 412} 413 414static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo) 415{ 416 struct fb_info *info = sinfo->info; 417 418 dma_free_writecombine(info->device, info->fix.smem_len, 419 info->screen_base, info->fix.smem_start); 420} 421 422/** 423 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory 424 * @sinfo: the frame buffer to allocate memory for 425 * 426 * This function is called only from the atmel_lcdfb_probe() 427 * so no locking by fb_info->mm_lock around smem_len setting is needed. 428 */ 429static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo) 430{ 431 struct fb_info *info = sinfo->info; 432 struct fb_var_screeninfo *var = &info->var; 433 unsigned int smem_len; 434 435 smem_len = (var->xres_virtual * var->yres_virtual 436 * ((var->bits_per_pixel + 7) / 8)); 437 info->fix.smem_len = max(smem_len, sinfo->smem_len); 438 439 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len, 440 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL); 441 442 if (!info->screen_base) { 443 return -ENOMEM; 444 } 445 446 memset(info->screen_base, 0, info->fix.smem_len); 447 448 return 0; 449} 450 451static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var, 452 struct fb_info *info) 453{ 454 struct fb_videomode varfbmode; 455 const struct fb_videomode *fbmode = NULL; 456 457 fb_var_to_videomode(&varfbmode, var); 458 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist); 459 if (fbmode) 460 fb_videomode_to_var(var, fbmode); 461 return fbmode; 462} 463 464 465/** 466 * atmel_lcdfb_check_var - Validates a var passed in. 467 * @var: frame buffer variable screen structure 468 * @info: frame buffer structure that represents a single frame buffer 469 * 470 * Checks to see if the hardware supports the state requested by 471 * var passed in. This function does not alter the hardware 472 * state!!! This means the data stored in struct fb_info and 473 * struct atmel_lcdfb_info do not change. This includes the var 474 * inside of struct fb_info. Do NOT change these. This function 475 * can be called on its own if we intent to only test a mode and 476 * not actually set it. The stuff in modedb.c is a example of 477 * this. If the var passed in is slightly off by what the 478 * hardware can support then we alter the var PASSED in to what 479 * we can do. If the hardware doesn't support mode change a 480 * -EINVAL will be returned by the upper layers. You don't need 481 * to implement this function then. If you hardware doesn't 482 * support changing the resolution then this function is not 483 * needed. In this case the driver would just provide a var that 484 * represents the static state the screen is in. 485 * 486 * Returns negative errno on error, or zero on success. 487 */ 488static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, 489 struct fb_info *info) 490{ 491 struct device *dev = info->device; 492 struct atmel_lcdfb_info *sinfo = info->par; 493 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 494 unsigned long clk_value_khz; 495 496 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 497 498 dev_dbg(dev, "%s:\n", __func__); 499 500 if (!(var->pixclock && var->bits_per_pixel)) { 501 /* choose a suitable mode if possible */ 502 if (!atmel_lcdfb_choose_mode(var, info)) { 503 dev_err(dev, "needed value not specified\n"); 504 return -EINVAL; 505 } 506 } 507 508 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres); 509 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock)); 510 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel); 511 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz); 512 513 if (PICOS2KHZ(var->pixclock) > clk_value_khz) { 514 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock)); 515 return -EINVAL; 516 } 517 518 /* Do not allow to have real resoulution larger than virtual */ 519 if (var->xres > var->xres_virtual) 520 var->xres_virtual = var->xres; 521 522 if (var->yres > var->yres_virtual) 523 var->yres_virtual = var->yres; 524 525 /* Force same alignment for each line */ 526 var->xres = (var->xres + 3) & ~3UL; 527 var->xres_virtual = (var->xres_virtual + 3) & ~3UL; 528 529 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0; 530 var->transp.msb_right = 0; 531 var->transp.offset = var->transp.length = 0; 532 var->xoffset = var->yoffset = 0; 533 534 if (info->fix.smem_len) { 535 unsigned int smem_len = (var->xres_virtual * var->yres_virtual 536 * ((var->bits_per_pixel + 7) / 8)); 537 if (smem_len > info->fix.smem_len) { 538 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n", 539 info->fix.smem_len, smem_len); 540 return -EINVAL; 541 } 542 } 543 544 /* Saturate vertical and horizontal timings at maximum values */ 545 var->vsync_len = min_t(u32, var->vsync_len, 546 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); 547 var->upper_margin = min_t(u32, var->upper_margin, 548 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET); 549 var->lower_margin = min_t(u32, var->lower_margin, 550 ATMEL_LCDC_VFP); 551 var->right_margin = min_t(u32, var->right_margin, 552 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); 553 var->hsync_len = min_t(u32, var->hsync_len, 554 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); 555 var->left_margin = min_t(u32, var->left_margin, 556 ATMEL_LCDC_HBP + 1); 557 558 /* Some parameters can't be zero */ 559 var->vsync_len = max_t(u32, var->vsync_len, 1); 560 var->right_margin = max_t(u32, var->right_margin, 1); 561 var->hsync_len = max_t(u32, var->hsync_len, 1); 562 var->left_margin = max_t(u32, var->left_margin, 1); 563 564 switch (var->bits_per_pixel) { 565 case 1: 566 case 2: 567 case 4: 568 case 8: 569 var->red.offset = var->green.offset = var->blue.offset = 0; 570 var->red.length = var->green.length = var->blue.length 571 = var->bits_per_pixel; 572 break; 573 case 16: 574 /* Older SOCs use IBGR:555 rather than BGR:565. */ 575 if (sinfo->config->have_intensity_bit) 576 var->green.length = 5; 577 else 578 var->green.length = 6; 579 580 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 581 /* RGB:5X5 mode */ 582 var->red.offset = var->green.length + 5; 583 var->blue.offset = 0; 584 } else { 585 /* BGR:5X5 mode */ 586 var->red.offset = 0; 587 var->blue.offset = var->green.length + 5; 588 } 589 var->green.offset = 5; 590 var->red.length = var->blue.length = 5; 591 break; 592 case 32: 593 var->transp.offset = 24; 594 var->transp.length = 8; 595 /* fall through */ 596 case 24: 597 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 598 /* RGB:888 mode */ 599 var->red.offset = 16; 600 var->blue.offset = 0; 601 } else { 602 /* BGR:888 mode */ 603 var->red.offset = 0; 604 var->blue.offset = 16; 605 } 606 var->green.offset = 8; 607 var->red.length = var->green.length = var->blue.length = 8; 608 break; 609 default: 610 dev_err(dev, "color depth %d not supported\n", 611 var->bits_per_pixel); 612 return -EINVAL; 613 } 614 615 return 0; 616} 617 618/* 619 * LCD reset sequence 620 */ 621static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo) 622{ 623 might_sleep(); 624 625 atmel_lcdfb_stop(sinfo); 626 atmel_lcdfb_start(sinfo); 627} 628 629/** 630 * atmel_lcdfb_set_par - Alters the hardware state. 631 * @info: frame buffer structure that represents a single frame buffer 632 * 633 * Using the fb_var_screeninfo in fb_info we set the resolution 634 * of the this particular framebuffer. This function alters the 635 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't 636 * not alter var in fb_info since we are using that data. This 637 * means we depend on the data in var inside fb_info to be 638 * supported by the hardware. atmel_lcdfb_check_var is always called 639 * before atmel_lcdfb_set_par to ensure this. Again if you can't 640 * change the resolution you don't need this function. 641 * 642 */ 643static int atmel_lcdfb_set_par(struct fb_info *info) 644{ 645 struct atmel_lcdfb_info *sinfo = info->par; 646 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 647 unsigned long hozval_linesz; 648 unsigned long value; 649 unsigned long clk_value_khz; 650 unsigned long bits_per_line; 651 unsigned long pix_factor = 2; 652 653 might_sleep(); 654 655 dev_dbg(info->device, "%s:\n", __func__); 656 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", 657 info->var.xres, info->var.yres, 658 info->var.xres_virtual, info->var.yres_virtual); 659 660 atmel_lcdfb_stop_nowait(sinfo); 661 662 if (info->var.bits_per_pixel == 1) 663 info->fix.visual = FB_VISUAL_MONO01; 664 else if (info->var.bits_per_pixel <= 8) 665 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 666 else 667 info->fix.visual = FB_VISUAL_TRUECOLOR; 668 669 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel; 670 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8); 671 672 /* Re-initialize the DMA engine... */ 673 dev_dbg(info->device, " * update DMA engine\n"); 674 atmel_lcdfb_update_dma(info, &info->var); 675 676 /* ...set frame size and burst length = 8 words (?) */ 677 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32; 678 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET); 679 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value); 680 681 /* Now, the LCDC core... */ 682 683 /* Set pixel clock */ 684 if (sinfo->config->have_alt_pixclock) 685 pix_factor = 1; 686 687 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 688 689 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); 690 691 if (value < pix_factor) { 692 dev_notice(info->device, "Bypassing pixel clock divider\n"); 693 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); 694 } else { 695 value = (value / pix_factor) - 1; 696 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", 697 value); 698 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, 699 value << ATMEL_LCDC_CLKVAL_OFFSET); 700 info->var.pixclock = 701 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1))); 702 dev_dbg(info->device, " updated pixclk: %lu KHz\n", 703 PICOS2KHZ(info->var.pixclock)); 704 } 705 706 707 /* Initialize control register 2 */ 708 value = pdata->default_lcdcon2; 709 710 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) 711 value |= ATMEL_LCDC_INVLINE_INVERTED; 712 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT)) 713 value |= ATMEL_LCDC_INVFRAME_INVERTED; 714 715 switch (info->var.bits_per_pixel) { 716 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break; 717 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break; 718 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break; 719 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break; 720 case 15: /* fall through */ 721 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break; 722 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break; 723 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break; 724 default: BUG(); break; 725 } 726 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value); 727 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value); 728 729 /* Vertical timing */ 730 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET; 731 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET; 732 value |= info->var.lower_margin; 733 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value); 734 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value); 735 736 /* Horizontal timing */ 737 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET; 738 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET; 739 value |= (info->var.left_margin - 1); 740 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); 741 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); 742 743 /* Horizontal value (aka line size) */ 744 hozval_linesz = compute_hozval(sinfo, info->var.xres); 745 746 /* Display size */ 747 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET; 748 value |= info->var.yres - 1; 749 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value); 750 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); 751 752 /* FIFO Threshold: Use formula from data sheet */ 753 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3); 754 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value); 755 756 /* Toggle LCD_MODE every frame */ 757 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0); 758 759 /* Disable all interrupts */ 760 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); 761 /* Enable FIFO & DMA errors */ 762 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 763 764 /* ...wait for DMA engine to become idle... */ 765 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 766 msleep(10); 767 768 atmel_lcdfb_start(sinfo); 769 770 dev_dbg(info->device, " * DONE\n"); 771 772 return 0; 773} 774 775static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf) 776{ 777 chan &= 0xffff; 778 chan >>= 16 - bf->length; 779 return chan << bf->offset; 780} 781 782/** 783 * atmel_lcdfb_setcolreg - Optional function. Sets a color register. 784 * @regno: Which register in the CLUT we are programming 785 * @red: The red value which can be up to 16 bits wide 786 * @green: The green value which can be up to 16 bits wide 787 * @blue: The blue value which can be up to 16 bits wide. 788 * @transp: If supported the alpha value which can be up to 16 bits wide. 789 * @info: frame buffer info structure 790 * 791 * Set a single color register. The values supplied have a 16 bit 792 * magnitude which needs to be scaled in this function for the hardware. 793 * Things to take into consideration are how many color registers, if 794 * any, are supported with the current color visual. With truecolor mode 795 * no color palettes are supported. Here a pseudo palette is created 796 * which we store the value in pseudo_palette in struct fb_info. For 797 * pseudocolor mode we have a limited color palette. To deal with this 798 * we can program what color is displayed for a particular pixel value. 799 * DirectColor is similar in that we can program each color field. If 800 * we have a static colormap we don't need to implement this function. 801 * 802 * Returns negative errno on error, or zero on success. In an 803 * ideal world, this would have been the case, but as it turns 804 * out, the other drivers return 1 on failure, so that's what 805 * we're going to do. 806 */ 807static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, 808 unsigned int green, unsigned int blue, 809 unsigned int transp, struct fb_info *info) 810{ 811 struct atmel_lcdfb_info *sinfo = info->par; 812 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 813 unsigned int val; 814 u32 *pal; 815 int ret = 1; 816 817 if (info->var.grayscale) 818 red = green = blue = (19595 * red + 38470 * green 819 + 7471 * blue) >> 16; 820 821 switch (info->fix.visual) { 822 case FB_VISUAL_TRUECOLOR: 823 if (regno < 16) { 824 pal = info->pseudo_palette; 825 826 val = chan_to_field(red, &info->var.red); 827 val |= chan_to_field(green, &info->var.green); 828 val |= chan_to_field(blue, &info->var.blue); 829 830 pal[regno] = val; 831 ret = 0; 832 } 833 break; 834 835 case FB_VISUAL_PSEUDOCOLOR: 836 if (regno < 256) { 837 if (sinfo->config->have_intensity_bit) { 838 /* old style I+BGR:555 */ 839 val = ((red >> 11) & 0x001f); 840 val |= ((green >> 6) & 0x03e0); 841 val |= ((blue >> 1) & 0x7c00); 842 843 /* 844 * TODO: intensity bit. Maybe something like 845 * ~(red[10] ^ green[10] ^ blue[10]) & 1 846 */ 847 } else { 848 /* new style BGR:565 / RGB:565 */ 849 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 850 val = ((blue >> 11) & 0x001f); 851 val |= ((red >> 0) & 0xf800); 852 } else { 853 val = ((red >> 11) & 0x001f); 854 val |= ((blue >> 0) & 0xf800); 855 } 856 857 val |= ((green >> 5) & 0x07e0); 858 } 859 860 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 861 ret = 0; 862 } 863 break; 864 865 case FB_VISUAL_MONO01: 866 if (regno < 2) { 867 val = (regno == 0) ? 0x00 : 0x1F; 868 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 869 ret = 0; 870 } 871 break; 872 873 } 874 875 return ret; 876} 877 878static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var, 879 struct fb_info *info) 880{ 881 dev_dbg(info->device, "%s\n", __func__); 882 883 atmel_lcdfb_update_dma(info, var); 884 885 return 0; 886} 887 888static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info) 889{ 890 struct atmel_lcdfb_info *sinfo = info->par; 891 892 switch (blank_mode) { 893 case FB_BLANK_UNBLANK: 894 case FB_BLANK_NORMAL: 895 atmel_lcdfb_start(sinfo); 896 break; 897 case FB_BLANK_VSYNC_SUSPEND: 898 case FB_BLANK_HSYNC_SUSPEND: 899 break; 900 case FB_BLANK_POWERDOWN: 901 atmel_lcdfb_stop(sinfo); 902 break; 903 default: 904 return -EINVAL; 905 } 906 907 /* let fbcon do a soft blank for us */ 908 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0); 909} 910 911static struct fb_ops atmel_lcdfb_ops = { 912 .owner = THIS_MODULE, 913 .fb_check_var = atmel_lcdfb_check_var, 914 .fb_set_par = atmel_lcdfb_set_par, 915 .fb_setcolreg = atmel_lcdfb_setcolreg, 916 .fb_blank = atmel_lcdfb_blank, 917 .fb_pan_display = atmel_lcdfb_pan_display, 918 .fb_fillrect = cfb_fillrect, 919 .fb_copyarea = cfb_copyarea, 920 .fb_imageblit = cfb_imageblit, 921}; 922 923static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id) 924{ 925 struct fb_info *info = dev_id; 926 struct atmel_lcdfb_info *sinfo = info->par; 927 u32 status; 928 929 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR); 930 if (status & ATMEL_LCDC_UFLWI) { 931 dev_warn(info->device, "FIFO underflow %#x\n", status); 932 /* reset DMA and FIFO to avoid screen shifting */ 933 schedule_work(&sinfo->task); 934 } 935 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status); 936 return IRQ_HANDLED; 937} 938 939/* 940 * LCD controller task (to reset the LCD) 941 */ 942static void atmel_lcdfb_task(struct work_struct *work) 943{ 944 struct atmel_lcdfb_info *sinfo = 945 container_of(work, struct atmel_lcdfb_info, task); 946 947 atmel_lcdfb_reset(sinfo); 948} 949 950static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) 951{ 952 struct fb_info *info = sinfo->info; 953 int ret = 0; 954 955 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; 956 957 dev_info(info->device, 958 "%luKiB frame buffer at %08lx (mapped at %p)\n", 959 (unsigned long)info->fix.smem_len / 1024, 960 (unsigned long)info->fix.smem_start, 961 info->screen_base); 962 963 /* Allocate colormap */ 964 ret = fb_alloc_cmap(&info->cmap, 256, 0); 965 if (ret < 0) 966 dev_err(info->device, "Alloc color map failed\n"); 967 968 return ret; 969} 970 971static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) 972{ 973 clk_prepare_enable(sinfo->bus_clk); 974 clk_prepare_enable(sinfo->lcdc_clk); 975} 976 977static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) 978{ 979 clk_disable_unprepare(sinfo->bus_clk); 980 clk_disable_unprepare(sinfo->lcdc_clk); 981} 982 983#ifdef CONFIG_OF 984static const struct of_device_id atmel_lcdfb_dt_ids[] = { 985 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, }, 986 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, }, 987 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, }, 988 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, }, 989 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, }, 990 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, }, 991 { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, }, 992 { /* sentinel */ } 993}; 994 995MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids); 996 997static const char *atmel_lcdfb_wiring_modes[] = { 998 [ATMEL_LCDC_WIRING_BGR] = "BRG", 999 [ATMEL_LCDC_WIRING_RGB] = "RGB", 1000}; 1001 1002const int atmel_lcdfb_get_of_wiring_modes(struct device_node *np) 1003{ 1004 const char *mode; 1005 int err, i; 1006 1007 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode); 1008 if (err < 0) 1009 return ATMEL_LCDC_WIRING_BGR; 1010 1011 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++) 1012 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i])) 1013 return i; 1014 1015 return -ENODEV; 1016} 1017 1018static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on) 1019{ 1020 struct atmel_lcdfb_power_ctrl_gpio *og; 1021 1022 list_for_each_entry(og, &pdata->pwr_gpios, list) 1023 gpio_set_value(og->gpio, on); 1024} 1025 1026static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) 1027{ 1028 struct fb_info *info = sinfo->info; 1029 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 1030 struct fb_var_screeninfo *var = &info->var; 1031 struct device *dev = &sinfo->pdev->dev; 1032 struct device_node *np =dev->of_node; 1033 struct device_node *display_np; 1034 struct device_node *timings_np; 1035 struct display_timings *timings; 1036 enum of_gpio_flags flags; 1037 struct atmel_lcdfb_power_ctrl_gpio *og; 1038 bool is_gpio_power = false; 1039 int ret = -ENOENT; 1040 int i, gpio; 1041 1042 sinfo->config = (struct atmel_lcdfb_config*) 1043 of_match_device(atmel_lcdfb_dt_ids, dev)->data; 1044 1045 display_np = of_parse_phandle(np, "display", 0); 1046 if (!display_np) { 1047 dev_err(dev, "failed to find display phandle\n"); 1048 return -ENOENT; 1049 } 1050 1051 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel); 1052 if (ret < 0) { 1053 dev_err(dev, "failed to get property bits-per-pixel\n"); 1054 goto put_display_node; 1055 } 1056 1057 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time); 1058 if (ret < 0) { 1059 dev_err(dev, "failed to get property atmel,guard-time\n"); 1060 goto put_display_node; 1061 } 1062 1063 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2); 1064 if (ret < 0) { 1065 dev_err(dev, "failed to get property atmel,lcdcon2\n"); 1066 goto put_display_node; 1067 } 1068 1069 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon); 1070 if (ret < 0) { 1071 dev_err(dev, "failed to get property bits-per-pixel\n"); 1072 goto put_display_node; 1073 } 1074 1075 INIT_LIST_HEAD(&pdata->pwr_gpios); 1076 ret = -ENOMEM; 1077 for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) { 1078 gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio", 1079 i, &flags); 1080 if (gpio < 0) 1081 continue; 1082 1083 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL); 1084 if (!og) 1085 goto put_display_node; 1086 1087 og->gpio = gpio; 1088 og->active_low = flags & OF_GPIO_ACTIVE_LOW; 1089 is_gpio_power = true; 1090 ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio"); 1091 if (ret) { 1092 dev_err(dev, "request gpio %d failed\n", gpio); 1093 goto put_display_node; 1094 } 1095 1096 ret = gpio_direction_output(gpio, og->active_low); 1097 if (ret) { 1098 dev_err(dev, "set direction output gpio %d failed\n", gpio); 1099 goto put_display_node; 1100 } 1101 list_add(&og->list, &pdata->pwr_gpios); 1102 } 1103 1104 if (is_gpio_power) 1105 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio; 1106 1107 ret = atmel_lcdfb_get_of_wiring_modes(display_np); 1108 if (ret < 0) { 1109 dev_err(dev, "invalid atmel,lcd-wiring-mode\n"); 1110 goto put_display_node; 1111 } 1112 pdata->lcd_wiring_mode = ret; 1113 1114 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight"); 1115 pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted"); 1116 1117 timings = of_get_display_timings(display_np); 1118 if (!timings) { 1119 dev_err(dev, "failed to get display timings\n"); 1120 ret = -EINVAL; 1121 goto put_display_node; 1122 } 1123 1124 timings_np = of_find_node_by_name(display_np, "display-timings"); 1125 if (!timings_np) { 1126 dev_err(dev, "failed to find display-timings node\n"); 1127 ret = -ENODEV; 1128 goto put_display_node; 1129 } 1130 1131 for (i = 0; i < of_get_child_count(timings_np); i++) { 1132 struct videomode vm; 1133 struct fb_videomode fb_vm; 1134 1135 ret = videomode_from_timings(timings, &vm, i); 1136 if (ret < 0) 1137 goto put_timings_node; 1138 ret = fb_videomode_from_videomode(&vm, &fb_vm); 1139 if (ret < 0) 1140 goto put_timings_node; 1141 1142 fb_add_videomode(&fb_vm, &info->modelist); 1143 } 1144 1145 return 0; 1146 1147put_timings_node: 1148 of_node_put(timings_np); 1149put_display_node: 1150 of_node_put(display_np); 1151 return ret; 1152} 1153#else 1154static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) 1155{ 1156 return 0; 1157} 1158#endif 1159 1160static int __init atmel_lcdfb_probe(struct platform_device *pdev) 1161{ 1162 struct device *dev = &pdev->dev; 1163 struct fb_info *info; 1164 struct atmel_lcdfb_info *sinfo; 1165 struct atmel_lcdfb_pdata *pdata = NULL; 1166 struct resource *regs = NULL; 1167 struct resource *map = NULL; 1168 struct fb_modelist *modelist; 1169 int ret; 1170 1171 dev_dbg(dev, "%s BEGIN\n", __func__); 1172 1173 ret = -ENOMEM; 1174 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev); 1175 if (!info) { 1176 dev_err(dev, "cannot allocate memory\n"); 1177 goto out; 1178 } 1179 1180 sinfo = info->par; 1181 sinfo->pdev = pdev; 1182 sinfo->info = info; 1183 1184 INIT_LIST_HEAD(&info->modelist); 1185 1186 if (pdev->dev.of_node) { 1187 ret = atmel_lcdfb_of_init(sinfo); 1188 if (ret) 1189 goto free_info; 1190 } else if (dev_get_platdata(dev)) { 1191 struct fb_monspecs *monspecs; 1192 int i; 1193 1194 pdata = dev_get_platdata(dev); 1195 monspecs = pdata->default_monspecs; 1196 sinfo->pdata = *pdata; 1197 1198 for (i = 0; i < monspecs->modedb_len; i++) 1199 fb_add_videomode(&monspecs->modedb[i], &info->modelist); 1200 1201 sinfo->config = atmel_lcdfb_get_config(pdev); 1202 1203 info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16; 1204 memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs)); 1205 } else { 1206 dev_err(dev, "cannot get default configuration\n"); 1207 goto free_info; 1208 } 1209 1210 if (!sinfo->config) 1211 goto free_info; 1212 1213 sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd"); 1214 if (IS_ERR(sinfo->reg_lcd)) 1215 sinfo->reg_lcd = NULL; 1216 1217 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; 1218 info->pseudo_palette = sinfo->pseudo_palette; 1219 info->fbops = &atmel_lcdfb_ops; 1220 1221 info->fix = atmel_lcdfb_fix; 1222 strcpy(info->fix.id, sinfo->pdev->name); 1223 1224 /* Enable LCDC Clocks */ 1225 sinfo->bus_clk = clk_get(dev, "hclk"); 1226 if (IS_ERR(sinfo->bus_clk)) { 1227 ret = PTR_ERR(sinfo->bus_clk); 1228 goto free_info; 1229 } 1230 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk"); 1231 if (IS_ERR(sinfo->lcdc_clk)) { 1232 ret = PTR_ERR(sinfo->lcdc_clk); 1233 goto put_bus_clk; 1234 } 1235 atmel_lcdfb_start_clock(sinfo); 1236 1237 modelist = list_first_entry(&info->modelist, 1238 struct fb_modelist, list); 1239 fb_videomode_to_var(&info->var, &modelist->mode); 1240 1241 atmel_lcdfb_check_var(&info->var, info); 1242 1243 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1244 if (!regs) { 1245 dev_err(dev, "resources unusable\n"); 1246 ret = -ENXIO; 1247 goto stop_clk; 1248 } 1249 1250 sinfo->irq_base = platform_get_irq(pdev, 0); 1251 if (sinfo->irq_base < 0) { 1252 dev_err(dev, "unable to get irq\n"); 1253 ret = sinfo->irq_base; 1254 goto stop_clk; 1255 } 1256 1257 /* Initialize video memory */ 1258 map = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1259 if (map) { 1260 /* use a pre-allocated memory buffer */ 1261 info->fix.smem_start = map->start; 1262 info->fix.smem_len = resource_size(map); 1263 if (!request_mem_region(info->fix.smem_start, 1264 info->fix.smem_len, pdev->name)) { 1265 ret = -EBUSY; 1266 goto stop_clk; 1267 } 1268 1269 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); 1270 if (!info->screen_base) { 1271 ret = -ENOMEM; 1272 goto release_intmem; 1273 } 1274 1275 /* 1276 * Don't clear the framebuffer -- someone may have set 1277 * up a splash image. 1278 */ 1279 } else { 1280 /* allocate memory buffer */ 1281 ret = atmel_lcdfb_alloc_video_memory(sinfo); 1282 if (ret < 0) { 1283 dev_err(dev, "cannot allocate framebuffer: %d\n", ret); 1284 goto stop_clk; 1285 } 1286 } 1287 1288 /* LCDC registers */ 1289 info->fix.mmio_start = regs->start; 1290 info->fix.mmio_len = resource_size(regs); 1291 1292 if (!request_mem_region(info->fix.mmio_start, 1293 info->fix.mmio_len, pdev->name)) { 1294 ret = -EBUSY; 1295 goto free_fb; 1296 } 1297 1298 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); 1299 if (!sinfo->mmio) { 1300 dev_err(dev, "cannot map LCDC registers\n"); 1301 ret = -ENOMEM; 1302 goto release_mem; 1303 } 1304 1305 /* Initialize PWM for contrast or backlight ("off") */ 1306 init_contrast(sinfo); 1307 1308 /* interrupt */ 1309 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info); 1310 if (ret) { 1311 dev_err(dev, "request_irq failed: %d\n", ret); 1312 goto unmap_mmio; 1313 } 1314 1315 /* Some operations on the LCDC might sleep and 1316 * require a preemptible task context */ 1317 INIT_WORK(&sinfo->task, atmel_lcdfb_task); 1318 1319 ret = atmel_lcdfb_init_fbinfo(sinfo); 1320 if (ret < 0) { 1321 dev_err(dev, "init fbinfo failed: %d\n", ret); 1322 goto unregister_irqs; 1323 } 1324 1325 ret = atmel_lcdfb_set_par(info); 1326 if (ret < 0) { 1327 dev_err(dev, "set par failed: %d\n", ret); 1328 goto unregister_irqs; 1329 } 1330 1331 dev_set_drvdata(dev, info); 1332 1333 /* 1334 * Tell the world that we're ready to go 1335 */ 1336 ret = register_framebuffer(info); 1337 if (ret < 0) { 1338 dev_err(dev, "failed to register framebuffer device: %d\n", ret); 1339 goto reset_drvdata; 1340 } 1341 1342 /* Power up the LCDC screen */ 1343 atmel_lcdfb_power_control(sinfo, 1); 1344 1345 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n", 1346 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base); 1347 1348 return 0; 1349 1350reset_drvdata: 1351 dev_set_drvdata(dev, NULL); 1352 fb_dealloc_cmap(&info->cmap); 1353unregister_irqs: 1354 cancel_work_sync(&sinfo->task); 1355 free_irq(sinfo->irq_base, info); 1356unmap_mmio: 1357 exit_backlight(sinfo); 1358 iounmap(sinfo->mmio); 1359release_mem: 1360 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1361free_fb: 1362 if (map) 1363 iounmap(info->screen_base); 1364 else 1365 atmel_lcdfb_free_video_memory(sinfo); 1366 1367release_intmem: 1368 if (map) 1369 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1370stop_clk: 1371 atmel_lcdfb_stop_clock(sinfo); 1372 clk_put(sinfo->lcdc_clk); 1373put_bus_clk: 1374 clk_put(sinfo->bus_clk); 1375free_info: 1376 framebuffer_release(info); 1377out: 1378 dev_dbg(dev, "%s FAILED\n", __func__); 1379 return ret; 1380} 1381 1382static int __exit atmel_lcdfb_remove(struct platform_device *pdev) 1383{ 1384 struct device *dev = &pdev->dev; 1385 struct fb_info *info = dev_get_drvdata(dev); 1386 struct atmel_lcdfb_info *sinfo; 1387 struct atmel_lcdfb_pdata *pdata; 1388 1389 if (!info || !info->par) 1390 return 0; 1391 sinfo = info->par; 1392 pdata = &sinfo->pdata; 1393 1394 cancel_work_sync(&sinfo->task); 1395 exit_backlight(sinfo); 1396 atmel_lcdfb_power_control(sinfo, 0); 1397 unregister_framebuffer(info); 1398 atmel_lcdfb_stop_clock(sinfo); 1399 clk_put(sinfo->lcdc_clk); 1400 clk_put(sinfo->bus_clk); 1401 fb_dealloc_cmap(&info->cmap); 1402 free_irq(sinfo->irq_base, info); 1403 iounmap(sinfo->mmio); 1404 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1405 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) { 1406 iounmap(info->screen_base); 1407 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1408 } else { 1409 atmel_lcdfb_free_video_memory(sinfo); 1410 } 1411 1412 framebuffer_release(info); 1413 1414 return 0; 1415} 1416 1417#ifdef CONFIG_PM 1418 1419static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) 1420{ 1421 struct fb_info *info = platform_get_drvdata(pdev); 1422 struct atmel_lcdfb_info *sinfo = info->par; 1423 1424 /* 1425 * We don't want to handle interrupts while the clock is 1426 * stopped. It may take forever. 1427 */ 1428 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); 1429 1430 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR); 1431 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); 1432 atmel_lcdfb_power_control(sinfo, 0); 1433 atmel_lcdfb_stop(sinfo); 1434 atmel_lcdfb_stop_clock(sinfo); 1435 1436 return 0; 1437} 1438 1439static int atmel_lcdfb_resume(struct platform_device *pdev) 1440{ 1441 struct fb_info *info = platform_get_drvdata(pdev); 1442 struct atmel_lcdfb_info *sinfo = info->par; 1443 1444 atmel_lcdfb_start_clock(sinfo); 1445 atmel_lcdfb_start(sinfo); 1446 atmel_lcdfb_power_control(sinfo, 1); 1447 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon); 1448 1449 /* Enable FIFO & DMA errors */ 1450 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI 1451 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 1452 1453 return 0; 1454} 1455 1456#else 1457#define atmel_lcdfb_suspend NULL 1458#define atmel_lcdfb_resume NULL 1459#endif 1460 1461static struct platform_driver atmel_lcdfb_driver = { 1462 .remove = __exit_p(atmel_lcdfb_remove), 1463 .suspend = atmel_lcdfb_suspend, 1464 .resume = atmel_lcdfb_resume, 1465 .id_table = atmel_lcdfb_devtypes, 1466 .driver = { 1467 .name = "atmel_lcdfb", 1468 .owner = THIS_MODULE, 1469 .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids), 1470 }, 1471}; 1472 1473module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe); 1474 1475MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver"); 1476MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>"); 1477MODULE_LICENSE("GPL"); 1478