| c898261c0dad617f0f1080bedc02d507a2fcfb92 |
|
25-Jan-2012 |
Keith Packard <keithp@keithp.com> |
drm/i915: Force explicit bpp selection for intel_dp_link_required
It is never correct to use intel_crtc->bpp in intel_dp_link_required,
so instead pass an explicit bpp in to this function. This patch
only supports 18bpp and 24bpp modes, which means that 10bpc modes will
be computed incorrectly. Fixing that will require more extensive
changes, and so must be addressed separately from this bugfix.
intel_dp_link_required is called from intel_dp_mode_valid and
intel_dp_mode_fixup.
* intel_dp_mode_valid is called to list supported modes; in this case,
the current crtc values cannot be relevant as the modes in question
may never be selected. Thus, using intel_crtc->bpp is never right.
* intel_dp_mode_fixup is called during mode setting, but it is run
well before ironlake_crtc_mode_set is called to set intel_crtc->bpp,
so using intel_crtc-bpp in this path can only ever get a stale
value.
Cc: Lubos Kolouch <lubos.kolouch@gmail.com>
Cc: Adam Jackson <ajax@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42263
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44881
Tested-by: Dave Airlie <airlied@redhat.com>
Tested-by: camalot@picnicpark.org (Dell Latitude 6510)
Tested-by: Roland Dreier <roland@digitalvampire.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 832afda6a7d7235ef0e09f4ec46736861540da6d |
|
09-Dec-2011 |
Wu Fengguang <fengguang.wu@intel.com> |
drm/i915: DisplayPort hot remove notification to audio driver
On DP monitor hot remove, clear DP_AUDIO_OUTPUT_ENABLE accordingly,
so that the audio driver will receive hot plug events and take action
to refresh its device state and ELD contents.
Note that the DP_AUDIO_OUTPUT_ENABLE bit may be enabled or disabled
only when the link training is complete and set to "Normal".
Tested OK for both hot plug/remove and DPMS on/off.
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3b5c78a35cf7511c15e09a9b0ffab290a42d9bcf |
|
14-Dec-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Dither down to 6bpc if it makes the mode fit
Some active adaptors (VGA usually) only have two lanes at 2.7GHz.
That's a maximum pixel clock of 144MHz at 8bpc, but 192MHz at 6bpc.
Fixes Asus UX31 panel being black at startup due to no valid modes since
dc22ee6fc18ce0f15424e753e8473c306ece95c1.
v2: Rebased to current code, resulting in the fix applying to EDP panels as
well. Also changed from spatio-temporal to just spatial dithering on
pre-ironlake, to be conssitent (and less visual flicker)
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Eric Anholt <eric@anholt.net>
Tested-by: Dirk Hohndel <hohndel@infradead.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1a2eb4604b85c5efb343da8a4dcf41288fcfca85 |
|
17-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Hook up Ivybridge eDP
The Ivybridge eDP control register looks like a cross between a
Cougarpoint PCH DP control register and a Sandybridge eDP control
register.
Where things trivially match, share the code. Where there are any
tricky bits, just split things out into two obviously separate code paths.
Signed-off-by: Keith Packard <keithp@keithp.com>
Tested-by: Fang Xun <xunx.fang@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41991
/drivers/gpu/drm/i915/intel_dp.c
|
| cdaeb578aca9e017deb0f55f1af8a94a4d63efb3 |
|
22-Nov-2011 |
Dave Airlie <airlied@redhat.com> |
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux into drm-fixes
* 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux: (25 commits)
drm/i915: Fix inconsistent backlight level during disabled
drm, i915: Fix memory leak in i915_gem_busy_ioctl().
drm/i915: Use DPCD value for max DP lanes.
drm/i915: Initiate DP link training only on the lanes we'll be using
drm/i915: Remove trailing white space
drm/i915: Try harder during dp pattern 1 link training
drm/i915: Make DP prepare/commit consistent with DP dpms
drm/i915: Let panel power sequencing hardware do its job
drm/i915: Treat PCH eDP like DP in most places
drm/i915: Remove link_status field from intel_dp structure
drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_control
drm/i915: Module parameters using '-1' as default must be signed type
drm/i915: Turn on another required clock gating bit on gen6.
drm/i915: Turn on a required 3D clock gating bit on Sandybridge.
drm/i915: enable cacheable objects on Ivybridge
drm/i915: add constants to size fence arrays and fields
drm/i915: Ivybridge still has fences!
drm/i915: forcewake warning fixes in debugfs
drm/i915: Fix object refcount leak on mmappable size limit error path.
drm/i915: Use mode_config.mutex in ironlake_panel_vdd_work
...
|
| 9a10f401a401ca69c6537641c8fc0d6b57b5aee8 |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Use DPCD value for max DP lanes.
The BIOS VBT value for an eDP panel has been shown to be incorrect on
one machine, and we haven't found any machines where the DPCD value
was wrong, so we'll use the DPCD value everywhere.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| b34f1f0931575bf1e1483472a5202b8247fa9b10 |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Initiate DP link training only on the lanes we'll be using
Limit the link training setting command to the lanes needed for the
current mode. It seems vaguely possible that a monitor will try to
train the other lanes and fail in some way, so this seems like the
safer plan.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| f2e8b18af95358cf5407bf263cba04fc4c379123 |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Remove trailing white space
Found a couple of bare tabs in intel_dp.c
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| cdb0e95bf571dccc1f75fef9bdad21b167ef0b37 |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Try harder during dp pattern 1 link training
Instead of going through the sequence just once, run through the whole
set up to 5 times to see if something can work. This isn't part of the
DP spec, but the BIOS seems to do it, and given that link training
failure is so bad, it seems reasonable to follow suit.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 21264c638b4f9179655a39436d0340bd0d4ab1de |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Make DP prepare/commit consistent with DP dpms
Make sure the sequence of operations in all three functions makes
sense:
1) The backlight must be off unless the screen is running
2) The link must be running to turn the eDP panel on/off
3) The CPU eDP PLL must be running until everything is off
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 99ea7127a30bda29354e1ed3a75d80d5f9cfc2a7 |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Let panel power sequencing hardware do its job
The panel power sequencing hardware tracks the stages of panel power
sequencing and signals when the panel is completely on or off. Instead
of blindly assuming the panel timings will work, poll the panel power
status register until it shows the correct values.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 417e822deee1d2bcd8a8a60660c40a0903713f2b |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Treat PCH eDP like DP in most places
PCH eDP has many of the same needs as regular PCH DP connections,
including the DP_CTl bit settings, the TRANS_DP_CTL register.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 93f62dad5ffe0962d83772fd16c0c1a9dd69767d |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Remove link_status field from intel_dp structure
No persistent data was ever stored here, so link_status is instead
allocated on the stack as needed.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 832dd3c17f7829fe8e4c257531d6c5c9e19bd7ac |
|
02-Nov-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_control
Every usage of PCH_PP_CONTROL sets the PANEL_UNLOCK_REGS value to
ensure that writes will be respected, move this to a common function
to make the driver cleaner.
No functional changes.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 627f7675f0f530ea555d76543dc4e469d70a1532 |
|
31-Oct-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Use mode_config.mutex in ironlake_panel_vdd_work
Use of the struct_mutex is not correct for locking in mode setting paths.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 2d1a8a48ac68a835c42d8a31a02b8158cd599615 |
|
31-Aug-2011 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
gpu: Add export.h as required to drivers/gpu files.
They need this to get all the EXPORT_SYMBOL variants and THIS_MODULE
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 82d165557ef094d4b4dfc05871aee618ec7102b0 |
|
14-Oct-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Fix eDP on PCH DP on CPT/PPT
According to the gen6 docs, only the DP_A port (on-CPU eDP) still uses
the old IBX bit shift for the link training pattern setup bits.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1c95822afebae625f48ebabfc470cdbb50671fd5 |
|
14-Oct-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Introduce is_cpu_edp()
The obvious counterpart to is_pch_edp(). Convert existing instances of
the idiom to the new routine.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| a60f0e38d72a5e24085d6e7e27a4cadc20ae268a |
|
21-Oct-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add DP test request handling
DPCD 1.1+ adds some automated test infrastructure support. Add support
for reading the IRQ source and jumping to a test handling routine if
needed. Subsequent patches will handle particular tests; this patch
just ACKs any requested tests by default.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| a2006cf5a7ad3463e7c1e9da2c4bc90499427558 |
|
22-Sep-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: read full receiver capability field during DP hot plug
Read link status first, followed by the full DPCD receiver cap field
rather than just the first 8 bytes.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| dc22ee6fc18ce0f15424e753e8473c306ece95c1 |
|
14-Oct-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Remove eDP special cases from bandwidth checks
These were just working around the math being wrong.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| cd9dde44f47501394b9f0715b6a36a92aa74c0d0 |
|
14-Oct-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Fix the math in intel_dp_link_required
The previous code was confused about units, which is pretty reasonable
given that the units themselves are confusing.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| d4270e57efe9e2536798c59e1ed2fd0a1e5cdfcf |
|
11-Oct-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: export a CPT mode set verification function
At the point where we check, we can't do much about the failure, but it
can aid debugging. Note that the auto-train override bit will be reset
as part of normal mode setting with this patch if a pipe ever does get
stuck, but that's consistent with the workaround for CPT provided by the
hardware team. This patch helped catch the fact that the pipe wasn't
running in the !composite sync FDI case on my IVB SDV, so has already
shown to be useful.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 27f8227b1e2b326a9a0995dd9c1f14893c61ee01 |
|
02-Sep-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: support 3 pipes on IVB+
Well almost anyway. IVB has 3 planes, pipes, transcoders, and FDI
interfaces, but only 2 pipe PLLs. So two of the pipes must use the same
pipe timings (e.g. 2 DP plus one other, or two HDMI with the same mode
and one other, etc.).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 86a3073e480c522f12e5291a462f68f6ee30aee3 |
|
20-Oct-2011 |
Keith Packard <keithp@keithp.com> |
Merge branch 'edp-training-fixes' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/intel_dp.c
Just whitespace change conflicts
|
| 32ce697c53f41290c3a2d3807b521b0fe4f42d2a |
|
30-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: No need to wait for eDP power off delay if panel is on
If the panel is powered up, there's no need to delay for the 'off'
interval when turning the panel on.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 05ce1a4961cffd7b0c8d4b70a7c9fa341368bc48 |
|
30-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Restrict ILK-specific eDP power hack to ILK
This eliminates a fairly long delay when power sequencing newer
hardware
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| bd9431597153925b000e810ceadf599b5aa6ad90 |
|
19-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Disable eDP VDD in a delayed work proc instead of synchronously
There's no good reason to turn off the eDP force VDD bit synchronously
while probing devices; that just sticks a huge delay into all mode
setting paths. Instead, queue a delayed work proc to disable the VDD
force bit and then remember when that fires to ensure that the
appropriate delay is respected before trying to turn it back on.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| ebf33b18816d9755087474cda7761e5944dd56c1 |
|
30-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Create helper functions to determine eDP power state
We need to check eDP VDD force and panel on in several places, so
create some simple helper functions to avoid duplicating code.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 7d639f35b7f6b218f7b58918fb6b1f028f869894 |
|
30-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: edp_panel_on does not need to return a bool
The return value was unused, so just stop doing that.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| d15456de79eea2aa03cd277866db80556e984d49 |
|
19-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Move eDP panel fixed mode from dev_priv to intel_dp
This value doesn't come directly from the VBT, and so is rather
specific to the particular DP output.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| f01eca2e52169eaf3a485cbd9752435489fbfba9 |
|
29-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Correct eDP panel power sequencing delay computations
Store the panel power sequencing delays in the dp private structure,
rather than the global device structure. Who knows, maybe we'll get
more than one eDP device in the future.
From the eDP spec, we need the following numbers:
T1 + T3 Power on to Aux Channel operation (panel_power_up_delay)
This marks how long it takes the panel to boot up and
get ready to receive aux channel communications.
T8 Video signal to backlight on (backlight_on_delay)
Once a valid video signal is being sent to the device,
it can take a while before the panel is actuall
showing useful data. This delay allows the panel
to get something reasonable up before the backlight
is turned on.
T9 Backlight off to video off (backlight_off_delay)
Turning the backlight off can take a moment, so
this delay makes sure there is still valid video
data on the screen.
T10 Video off to power off (panel_power_down_delay)
Presumably this delay allows the panel to perform
an orderly shutdown of the display.
T11 + T12 Power off to power on (panel_power_cycle_delay)
So, once you turn the panel off, you have to wait a
while before you can turn it back on. This delay is
usually the longest in the entire sequence.
Neither the VBIOS source code nor the hardware documentation has a
clear mapping between the delay values they provide and those required
by the eDP spec. The VBIOS code actually uses two different labels for
the delay values in the five words of the relevant VBT table.
**** MORE LATER ***
Look at both the current hardware register settings and the VBT
specified panel power sequencing timings. Use the maximum of the two
delays, to make sure things work reliably. If there is no VBT data,
then those values will be initialized to zero, so we'll just use the
values as programmed in the hardware. Note that the BIOS just fetches
delays from the VBT table to place in the hardware registers, so we
should get the same values from both places, except for rounding.
VBT doesn't provide any values for T1 or T2, so we'll always just use
the hardware value for that.
The panel power up delay is thus T1 + T2 + T3, which should be
sufficient in all cases.
The panel power down delay is T1 + T2 + T12, using T1+T2 as a proxy
for T11, which isn't available anywhere.
For the backlight delays, the eDP spec says T6 + T8 is the delay from the
end of link training to backlight on and T9 is the delay from
backlight off until video off. The hardware provides a 'backlight on'
delay, which I'm taking to be T6 + T8 while the VBT provides something
called 'T7', which I'm assuming is s
On the macbook air I'm testing with, this yields a power-up delay of
over 200ms and a power-down delay of over 600ms. It all works now, but
we're frobbing these power controls several times during mode setting,
making the whole process take an awfully long time.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| f58ff8549ec0dba61aa7f2510559bce814507316 |
|
29-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Ensure eDP powered up during DP_SET_POWER operation in dp_prepare
Any call to intel_dp_sink_dpms must ensure that the panel has power so
that the DP_SET_POWER operation will be correctly received. The only
one missing this was in intel_dp_prepare.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| 0b5c541b93792ddd7fe34a450c76377ffad7bef3 |
|
29-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Enable eDP panel power during I2C initialization sequence
The DP i2c initialization code does a couple of i2c transactions,
which means that an eDP panel must be powered up.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| 8c241fef3e6f69f3f675678ae03599ece3f562e2 |
|
29-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Wrap DP EDID fetch functions to enable eDP panel power
Talking to the eDP DDC channel requires that the panel be powered
up. Wrap both the EDID and modes fetch code with calls to turn the vdd
power on and back off.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| 552fb0b7a6e8079339913512b75d8c203f54bfdf |
|
29-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Delay DP i2c initialization until panel power timings are computed
On eDP, DDC requires panel power, but turning that on uses the panel
power sequencing timing values fetch from the DPCD data.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| 245e2708773796aaa13e97523e035676b008b337 |
|
06-Oct-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Ensure panel is on during DPMS off
If the panel is already off, we'll need to turn VDD on to execute the
(useless) DPMS off code. Yes, it would be better to just not do any of
this, but correctness, and *then* performance.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| bee7eb2da2fb50ccf76cb7596d20e90d28de040c |
|
29-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Turn force VDD back off when panel running in intel_dp_dpms
The VDD force bit is turned on before touching the panel, but if it
was enabled, there was no call to turn it back off. Add a call.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| 97af61f57e03a39afa309d1c8a0d8fb9331e2f89 |
|
29-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Check for eDP inside edp panel on/off funcs
Cleans up code dealing with eDP a bit. Remove redundant checks in
callers
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1c0ae80a5e2893a3a3ed9582e46249ff559d2739 |
|
19-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Unlock PCH_PP_CONTROL always
Avoid any question about locked registers by just writing the unlock
pattern with every write to the register.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 9b984daec45632c4c1ef6e628dca4d2bc8f544ed |
|
19-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Check eDP power when doing aux channel communications
Verify that the eDP VDD is on, either with the panel being on or with
the VDD force-on bit being set.
This demonstrates that in many instances, VDD is not on when needed,
which leads to failed EDID communications.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 47f0eb2234a2a1c790825393bbaccfadf82463d3 |
|
19-Sep-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Only use VBT panel mode on eDP if no EDID is found
We're going to assume that EDID is more reliable than the VBT tables
for eDP panels, which is notably true on MacBook machines where the
VBT contains completely bogus data.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_dp.c
|
| e0dac65ed45e72fe34cc7ccc76de0ba220bd38bb |
|
05-Sep-2011 |
Wu Fengguang <fengguang.wu@intel.com> |
drm/i915: pass ELD to HDMI/DP audio driver
Add ELD support for Intel Eaglelake, IbexPeak/Ironlake,
SandyBridge/CougarPoint and IvyBridge/PantherPoint chips.
ELD (EDID-Like Data) describes to the HDMI/DP audio driver the audio
capabilities of the plugged monitor. It's built and passed to audio
driver in 2 steps:
(1) at get_modes time, parse EDID and save ELD to drm_connector.eld[]
(2) at mode_set time, write drm_connector.eld[] to the Transcoder's hw
ELD buffer and set the ELD_valid bit to inform HDMI/DP audio driver
This patch is tested OK on G45/HDMI, IbexPeak/HDMI and IvyBridge/HDMI+DP.
Test scheme: plug in the HDMI/DP monitor, and run
cat /proc/asound/card0/eld*
to check if the monitor name, HDMI/DP type, etc. show up correctly.
Minor imperfection: the GEN5_AUD_CNTL_ST/DIP_Port_Select field always
reads 0 (reserved). Without knowing the port number, I worked it around
by setting the ELD_valid bit for ALL the three ports. It's tested to not
be a problem, because the audio driver will find invalid ELD data and
hence rightfully abort, even when it sees the ELD_valid indicator.
Thanks to Zhenyu and Pierre-Louis for a lot of valuable help and testing.
CC: Zhao Yakui <yakui.zhao@intel.com>
CC: Wang Zhenyu <zhenyu.z.wang@intel.com>
CC: Jeremy Bush <contractfrombelow@gmail.com>
CC: Christopher White <c.white@pulseforce.com>
CC: Pierre-Louis Bossart <pierre-louis.bossart@intel.com>
CC: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 0206e353a0416ad63ce07f53c807c2c725633b87 |
|
16-Aug-2011 |
Akshay Joshi <me@akshayjoshi.com> |
Drivers: i915: Fix all space related issues.
Various issues involved with the space character were generating
warnings in the checkpatch.pl file. This patch removes most of those
warnings.
Signed-off-by: Akshay Joshi <me@akshayjoshi.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| aaa6fd2a004147bf32fce05720938236de3361d9 |
|
12-Aug-2011 |
Matthew Garrett <mjg@redhat.com> |
Not all systems expose a firmware or platform mechanism for changing the backlight intensity on i915, so add native driver support.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: David Airlie <airlied@linux.ie>
Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Len Brown <lenb@kernel.org>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Sedat Dilek <sedat.dilek@googlemail.com>
Tested-by: Michel Alexandre Salim <salimma@fedoraproject.org>
Tested-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3d208bef113657e27f8731921454d6da408b76c5 |
|
03-Aug-2011 |
Keith Packard <keithp@keithp.com> |
Merge branch 'drm-intel-fixes' into drm-intel-next
|
| 4edd17a25c99f34bd7a75c1daf31afe840237da8 |
|
03-Aug-2011 |
Keith Packard <keithp@keithp.com> |
Revert "drm/i915/dp: Zero the DPCD data before connection probe"
This reverts commit 97cdd7101079adc3c626d159c62d43de949516c8.
Clearing the dpcd data means that if the fetch fails, any previous
data will be lost. On eDP, this is no fun as we only fetch dpcd at
init time, so the memset will destroy that the next time through.
/drivers/gpu/drm/i915/intel_dp.c
|
| 11bee43ebba0bfc92165c059f6e9869197ea8889 |
|
02-Aug-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: wait for previous AUX channel activity to clear
Before initiating a new read or write on the DP AUX channel, wait for
any outstanding activity to complete. This may happen during normal
retry behavior. If the wait fails (i.e. after 1ms the AUX channel is
still busy) dump a backtrace to make the caller easier to spot.
v2: use msleep instead, and timeout after 3ms (only ever saw 1 retry
with msleep in testing)
v3: fix backtrace check to trigger if the 3ms wait times out
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=38136.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 2c1756b12edc19fdd75c833699cb752e1bbb641e |
|
29-Jul-2011 |
Keith Packard <keithp@keithp.com> |
Merge branch 'drm-intel-fixes' into drm-intel-next
|
| d2b996ac698aebb28557355857927b8b934bb4f9 |
|
26-Jul-2011 |
Keith Packard <keithp@keithp.com> |
Revert and fix "drm/i915/dp: remove DPMS mode tracking from DP"
This reverts commit 885a50147f00a8a80108904bf58a18af357717f3.
We actually *do* need to track DPMS state so that on hotplug, we don't
retrain the link until DPMS is disabled.
However, that code had avery small bug -- it wouldn't set the
dpms_mode at mode set time, and so link retraining would not actually
occur on monitor hotplug until the monitor had gone through a DPMS
off/DPMS on cycle.
Signed-off-by: Keith Packard <keithp@keithp.com>
Tested-by: Andrew Lutomirski <luto@mit.edu>
/drivers/gpu/drm/i915/intel_dp.c
|
| 59f3e272d788305e16098f0b18309919c9216d67 |
|
26-Jul-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: In intel_dp_init, replace read of DPCD with intel_dp_get_dpcd
Eliminates an open-coded read and also gains the retry behaviour of
intel_dp_get_dpcd, which seems like a good idea.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 26d61aad7a46115628341e9eb95433f30efef21a |
|
26-Jul-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Rename i915_dp_detect_common to intel_dp_get_dpcd
This describes the function better, allowing it to be used where the
DPCD value is relevant.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 92fd8fd13b7570f6a8ba519c4e8ec98f10a86ce9 |
|
26-Jul-2011 |
Keith Packard <keithp@keithp.com> |
drm/i915: Use dp_detect_common in hotplug helper function
This uses the common dpcd reading routine, i915_dp_detect_common,
instead of open-coding a call to intel_dp_aux_native_read. Besides
reducing duplicated code, this also gains the read retries which
may be necessary when a cable is first plugged back in and the link
needs to be retrained.
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| cf96e46fcd147856fd8151fab91c410f0ec16c47 |
|
26-Jul-2011 |
Keith Packard <keithp@keithp.com> |
Merge branch 'drm-intel-fixes' into drm-intel-next
|
| e85194641bec56179dcf5e1704ce5c6bf30340c6 |
|
21-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Don't turn CPT DP ports on too early
The docs say the port has to come on in training pattern 1; at this
point, though, ->DP is in normal mode. The intent here is to wait
until the port is in fact sending data, but that doesn't happen since
we've broken the sequence the hardware expects, and the vblank wait will
time out and kvetch in the log.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 81055854d096959898fdc17ed11729eb019eff07 |
|
21-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Explicitly disable symbol scrambling while training
The DP spec says training patterns 1 and 2 are to be sent non-scrambled,
and the GPU docs claim that happens (or at least, there's no explicit
scrambling control). But the sink may be confused if we don't
explicitly tell it what we're doing, so play it safe.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 887a82ee80b42bb14ba70f8138292023d5040b08 |
|
25-Jul-2011 |
Keith Packard <keithp@keithp.com> |
Merge branch 'drm-intel-fixes' into drm-intel-next
|
| a2cab1b24a4ea75a68fa21bfb7d5b1a45121583c |
|
12-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Explicitly request 8/10 channel coding
It's not clear what a sink would do if you wrote zero to this register -
which I guess would mean "I don't support any channel encodings, good
luck" - but let's not find out.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 71ba9000e673d6171a52f2a8b14e0419087f7199 |
|
12-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Retry DPCD fetch on G4X too
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| ac66ae8346fff704301e24ac55da1d76020660b2 |
|
12-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Better hexdump of DPCD
%hx alone prints 0 as "0", not "00".
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 9de88e6e89a2222061af8e1448f6f346e3413fc8 |
|
12-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Read more DPCD registers on connection probe
For parity with radeon and nouveau, and also because I suspect we're
going to need it to get format-conversion dongles right.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1b9be9d09d85b3697418dc444db30d069203ff7d |
|
12-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Move DPCD dump to common code instead of PCH-only
No reason not to see this on g4x, after all.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 97cdd7101079adc3c626d159c62d43de949516c8 |
|
12-Jul-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Zero the DPCD data before connection probe
Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| bc67f799e7667fb3c00286f2415c3cc44a253aec |
|
07-Jul-2011 |
Keith Packard <keithp@keithp.com> |
Merge branch 'drm-intel-fixes' into drm-intel-next
|
| c7ad381078ee1b5ce2ab5274bd5f12fee6e1e59a |
|
07-Jul-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: manage sink power state if possible
On sinks with a DPCD rev of 1.1 or greater, we can send sink power
management commands to address 0x600 per section 5.1.5 of the
DisplayPort 1.1a spec.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| df0c237d124fb8d10b98f7b43d63d962eeed9355 |
|
07-Jul-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: consolidate AUX retry code
When checking link status during a hot plug event or detecting sink
presence, we need to retry 3 times per the spec (section 9.1 of the 1.1a
DisplayPort spec). Consolidate the retry code into a
native_aux_read_retry function for use by get_link_status and _detect.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 885a50147f00a8a80108904bf58a18af357717f3 |
|
07-Jul-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: remove DPMS mode tracking from DP
We currently use this when a hot plug event is received, only checking
the link status and re-training if we had previously configured a link.
However if we want to preserve the DP configuration across both hot plug
and DPMS events (which we do for userspace apps that don't respond to
hot plug uevents), we need to unconditionally check the link and try to
bring it up on hot plug.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 899526d9a73fda47516cf11ccb3467ad6702f568 |
|
07-Jul-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: try to read receiver capabilities 3 times when detecting
If ->detect is called too soon after a hot plug event, the sink may not
be ready yet. So try up to 3 times with 1ms sleeps in between tries to
get the data (spec dictates that receivers must be ready to respond within
1ms and that sources should try 3 times).
See section 9.1 of the 1.1a DisplayPort spec.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 59cd09e1aea3ac6eb15b45e5d2261a63ecb1799c |
|
07-Jul-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: read more receiver capability bits on hotplug
When a hotplug event is received, we need to check the receiver cap bits
in case they've changed (as they might with a hub or chain config).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 7183dc2912510cf005fcc59239f8d153ef51d3f0 |
|
07-Jul-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: use DP DPCD defines when looking at DPCD values
Makes it easier to search for DP related constants.
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 61da5fab5a9b129cf05b1fe4666c3e45b3103fd4 |
|
07-Jul-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: retry link status read 3 times on failure
Especially after a hotplug or power status change, the sink may not
reply immediately to a link status query. So retry 3 times per the spec
to really make sure nothing is there.
See section 9.1 of the 1.1a DisplayPort spec.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 89c6143263ef8e14e42e17324a234418d8030b10 |
|
24-Jun-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: use pipe bpp in DP link bandwidth calculation
Now that we track bpp on a per-pipe basis, we can use the actual value
rather than assuming 24bpp.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 858fa03527ded333dc5701f546bd5d1b5d7515ad |
|
24-Jun-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: use pipe bpp in DP link bandwidth calculations
The pipe may be driving various bpp values depending on the display
configuration, so take that into account when calculating link bandwidth
requirements.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3f43c48d333777e815ae68d66396cb6dfbc2dd79 |
|
12-May-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Share the common force-audio property between connectors
Make the audio property creation routine common and share the single
property between the connectors.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 31acbcc408f412d1ba73765b846c38642be553c3 |
|
17-Apr-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Be paranoid in case we disable a DP before it is attached
Given that the hardware may be left in a random condition by the BIOS,
it is conceivable that we then attempt to clear the DP_PIPEB_SELECT bit
without us ever enabling/attaching the DP encoder to a pipe. Thus
causing a NULL deference when we attempt to wait for a vblank on that
crtc.
Reported-and-tested-by: Bryan Christ <bryan.christ@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36314
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36456
Reported-and-tested-by: Bo Wang <bo.b.wang@intel.com>
Cc: stable@kernel.org
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 25985edcedea6396277003854657b5f3cb31a628 |
|
31-Mar-2011 |
Lucas De Marchi <lucas.demarchi@profusion.mobi> |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
/drivers/gpu/drm/i915/intel_dp.c
|
| 48898b038b69ef4801f0e059026c8f6920684677 |
|
18-Mar-2011 |
Takashi Iwai <tiwai@suse.de> |
drm/i915/dp: Correct the order of deletion for ghost eDP devices
The order of the calls does matter indeed. Swapping the call order of
intel_dp_destroy() and intel_dp_encoder_destroy() fixes the problem.
This is because i2c_del_adapter unregisters the device which parent is
intel_connector, and connectors are removed in intel_dp_destroy(). Thus
intel_dp_encoder_destroy() must be called before intel_dp_destroy().
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=24822
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3d3dc149eda48566619d165f6b34e5eeca00edf1 |
|
12-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Sanity check eDP existence
Some hardware claims to have both an LVDS panel and an eDP output.
Whilst this may be true in a rare case, more often it is just broken
hardware. If we see an eDP device we know that it must be connected and
so we can confirm its existence with a simple probe.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34165
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=24822
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| e953fd7bb32f55309a96abd5ceba9cf68d221434 |
|
21-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Add support for limited color range of broadcast outputs
In order to prevent "crushed blacks" on TVs, the range of the RGB output
may be limited to 16-235. This used to be available through Xorg under
the "Broadcast RGB" option, so reintroduce support for KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34543
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 9035a97a32836d0e456ddafaaf249a844e6e4b5e |
|
16-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into drm-intel-next
Grab the latest stabilisation bits from -fixes and some suspend and
resume fixes from linus.
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
|
| fe16d949b45036d9f80e20e07bde1ddacc930b10 |
|
12-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Move the lvds OpRegion lid detection code to panel and reuse for eDP
Share the lid detection code for the all panels for consistent behaviour
and a single place to add the eventual quirks for crap hardware.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1aad7ac0458f40e2d0365d488620084f3965f6e7 |
|
09-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Trigger modesetting if force-audio changes
If the user changes the force-audio property and it no longer reflects
the current configuration, then we need to trigger a mode set in order
to update the registers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 9db4a9c7b2a3bd5b4952846bc0c2f58daa80ddd7 |
|
07-Feb-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: cleanup per-pipe reg usage
We had some conversions over to the _PIPE macros, but didn't get
everything. So hide the per-pipe regs with an _ (still used in a few
places for legacy) and add a few _PIPE based macros, then make sure
everyone uses them.
[update: remove usage of non-existent no-op macro]
[update 2: keep modesetting suspend/resume code, update to new reg names]
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: stylistic cleanups for checkpatch and taste]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 5d6135012e9a7aa8a9128145ed9315eb916feea2 |
|
25-Jan-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: use VDD AUX override to make panel power sequencing look better
Rather than power cycling the panel when there are no bits to display,
use the VDD AUX bit to power the panel up just enough for DP AUX
transactions to work. This prevents a bit of unnecessary ugliness as
mode sets occur on the panel.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 987a709e1589cf10e250e04ce9df910b735d4f60 |
|
25-Jan-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: remove now unnecessary delays in eDP panel power sequencing
Now that we're doing the right thing elsewhere, these are no longer
necessary.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31114
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3c5a62b5226ca5db993660281e9c2a7275d9fb02 |
|
06-Jan-2011 |
Yuanhan Liu <yuanhan.liu@linux.intel.com> |
drm/i915: fix calculation of eDP signal levels on Sandybridge
Some voltage swing/pre-emphasis level use the same value on eDP
Sandybridge, like 400mv_0db and 600mv_0db are with the same value
of (0x0 << 22). So, fix them, and point out the value if it isn't
a supported voltage swing/pre-emphasis level.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
/drivers/gpu/drm/i915/intel_dp.c
|
| 37f809755845cc3e18e8216c04525bdb885fa13b |
|
05-Jan-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: make DP training try a little harder
When trying to do channel equalization, we need to make sure we still
have clock recovery on all lanes while training. We also need to try
clock recovery again if we lose the clock or if channel eq fails 5
times. We'll try clock recovery up to 5 more times before giving up
entirely.
Gets suspend/resume working on my Vaio again and brings us back into
compliance with the DP training sequence spec.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 8d5203ca62539c6ab36a5bc2402c2de1de460e30 |
|
09-Dec-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into drm-intel-next
|
| 8316f33766a82907c694267ff911e45e256f09f9 |
|
08-Dec-2010 |
David Flynn <davidf@rd.bbc.co.uk> |
drm/i915/dp: Fix I2C/EDID handling with active DisplayPort to DVI converter
The DisplayPort standard (1.1a) states that:
The I2C-over-AUX Reply field is valid only when Native AUX CH Reply
field is AUX_ACK (00). When Native AUX CH Reply field is not 00, then,
I2C-over-AUX Reply field must be 00 and be ignored.
This fixes broken EDID reading when using an active DisplayPort to
duallink DVI converter. If the AUX CH replier chooses to defer the
transaction, a short read occurs and erroneous data is returned as
the i2c reply due to a lack of length checking and failure to check
for AUX ACK.
As a result, broken EDIDs can look like:
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: bc bc bc ff bc bc bc ff bc bc bc ac bc bc bc 45 ???.???.???????E
10: bc bc bc 10 bc bc bc 34 bc bc bc ee bc bc bc 4c ???????4???????L
20: bc bc bc 50 bc bc bc 00 bc bc bc 40 bc bc bc 00 ???P???.???@???.
30: bc bc bc 01 bc bc bc 01 bc bc bc a0 bc bc bc 40 ???????????????@
40: bc bc bc 00 bc bc bc 00 bc bc bc 00 bc bc bc 55 ???.???.???.???U
50: bc bc bc 35 bc bc bc 31 bc bc bc 20 bc bc bc fc ???5???1??? ????
60: bc bc bc 4c bc bc bc 34 bc bc bc 46 bc bc bc 00 ???L???4???F???.
70: bc bc bc 38 bc bc bc 11 bc bc bc 20 bc bc bc 20 ???8??????? ???
80: bc bc bc ff bc bc bc ff bc bc bc ff bc bc bc ff ???.???.???.???.
...
which can lead to:
[drm:drm_edid_block_valid] *ERROR* EDID checksum is invalid, remainder
[drm:drm_edid_block_valid] *ERROR* Raw EDID:
<3>30 30 30 30 30 30 30 32 38 32 30 32 63 63 31 61 000000028202cc1a
<3>28 00 02 8c 00 00 00 00 18 00 00 00 00 00 00 00 (...............
<3>20 4c 61 73 74 20 62 65 61 63 6f 6e 3a 20 33 32 Last beacon: 32
<3>32 30 6d 73 20 61 67 6f 46 00 05 8c 00 00 00 00 20ms agoF.......
<3>36 00 00 00 00 00 00 00 00 0c 57 69 2d 46 69 20 6.........Wi-Fi
<3>52 6f 75 74 65 72 01 08 82 84 8b 96 24 30 48 6c Router......$0Hl
<3>03 01 01 06 02 00 00 2a 01 00 2f 01 00 32 04 0c .......*../..2..
<3>12 18 60 dd 09 00 10 18 02 00 00 01 00 00 18 00 ..`.............
Signed-off-by: David Flynn <davidf@rd.bbc.co.uk>
[ickle: fix up some surrounding checkpatch warnings]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
/drivers/gpu/drm/i915/intel_dp.c
|
| 1a1c69762a14f50dd574a9cbabbfa1b1542f580e |
|
08-Dec-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/intel_dp.c
|
| 1b39d6f37622f1da70aa2cfd38bfff9a52c13e05 |
|
06-Dec-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Only apply the workaround if the select is still active
As we may try to power down the link at various times, it is not
necessarily still coupled with an encoder and so we must be careful not
to depend upon an operation that is only valid when the link is still
attached to a pipe.
Fixes regression in 5bddd17.
Reported-and-tested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org [after applying 5bddd17]
/drivers/gpu/drm/i915/intel_dp.c
|
| 160b1543cdae83e9f8914ac7afc3d2bd686140af |
|
05-Dec-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Trivial code tidy
Locally scope the crtc to where it is used.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 5bddd17fec58f253cddd0bc9eab2cd9eb1bbab4a |
|
18-Nov-2010 |
Eric Anholt <eric@anholt.net> |
drm/i915: Apply a workaround for transitioning from DP on pipe B to HDMI.
This workaround only applies to Ironlake.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
/drivers/gpu/drm/i915/intel_dp.c
|
| 3cf2efb1a7c68d55d60dcb2ed9609e1a2fc25952 |
|
29-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
Revert "drm/i915/dp: use VBT provided eDP params if available"
This reverts commit 869184a675662bddcdf76c5b95665272facff2b8.
This is required for the Sony Vaio Jesse was working on at the time, but
breaks most other eDP machines - machines that were working in earlier
kernels.
Reported-and-tested-by: Dave Airlie <airlied@redhat.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31188
Tested-by: Zhao Jian <jian.j.zhao@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| dd2b379f071424f36f9f90ff83cb4ad058c7b6ed |
|
26-Oct-2010 |
Takashi Iwai <tiwai@suse.de> |
drm/i915: Fix typo from "Enable DisplayPort Audio"
Hi,
while I looked through your changes in drm-intel git tree (as I've got
a pressure for supporting DisplayPort audio), I stumbled on the
possible bug in the commit a9756bb5b25d5d997df0c5d8c95db01292191bea
Author: Zhenyu Wang <zhenyuw@linux.intel.com>
Date: Sun Sep 19 13:09:06 2010 +0800
drm/i915: Enable DisplayPort audio
In this commit, you changed the return value of g4x_dp_detect()
to "bit", but it should be "status", I suppose.
[ickle: mea culpa.]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31094
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| f684960ed5b902994ba6540138d910f5caf7ea2a |
|
19-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Add 'force_audio' property
Allow the user to override the detection of the sink's audio capabilities
from EDID. Not all sinks support the required EDID level to specify
whether they handle audio over the display connection, so allow the user
to enable it manually.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| a9756bb5b25d5d997df0c5d8c95db01292191bea |
|
19-Sep-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: Enable DisplayPort audio
This will turn on DP audio output by checking monitor's audio
capability.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
[ickle: rebase onto recent changes and rearranged for clarity]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 736085bcf91720fd90175c288c542c721c281bb0 |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: down the DP link even if the reg indicates it's already down
Since the PLL may still be on, and the training pattern may not be
correct. Fixes suspend/resume on my PCH eDP test system.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: minor merge conflict and silence the compiler]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 298b0b392c750137f148fda056a7d4c42019814c |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: make eDP PLL functions work as advertised
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 895692befab73fd399d854c7db41d6d7260af2da |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: don't bother with DP PLL for PCH attached eDP
We don't use the CPU DP PLL with PCH attached eDP panels, so don't
bother to enable it.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 869184a675662bddcdf76c5b95665272facff2b8 |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: use VBT provided eDP params if available
We can skip most of the link training step if we use the VBT provided
values.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 896673836b8c55b75e7d7d2741aaaadff0c6a038 |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: cache eDP DPCD data
Cache the first 4 bytes of DPCD data in the eDP case. It's unlikely to
change and can save us some trouble at link training time.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 01cb9ea633ddf3e8770dfe7851e88610087098bc |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: eDP power sequencing fixes
Enable the panel before adjusting eDP link params, make sure the panel
is idle after powering it on before proceeding with other activity,
delay backlight enable to avoid visible flicker.
Also avoid using VDD per hw team recommendation; it can conflict with
the builtin panel power sequencing logic and lead to panel power
sequencing failures.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1d85036278f1b3eb3b7c5db805e5c4c847d1415d |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: remove broken intel_pch_has_edp function
Since we set the output type of PCH attached eDP panels to
INTEL_OUTPUT_eDP this function would never return true when it should.
It's been replaced by working functions.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 814948adec172dbc41252b1815e4e83aedfe91b9 |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add eDP checking functions for the display code
The display code needs to distinguish between CPU and PCH attached eDP
panels, so add some helpers to handle that.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 51190667b3c6927356e594cdf6955980ff47bb16 |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: correct eDP lane count and bpp
With the old check we'd never set lane_count or bpp to different values
on PCH attached eDP panels.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 4d9264615b98fe8015eca7d84a9862b1489c69d4 |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: remove redundant is_pch_edp checks
If is_edp is true, is_pch_edp will always be true. So limit the calls
to the latter function to places where the distinction actually matters.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| cfcb0fc9c2f2decf065e9a6a1c622541e8b4090b |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/dp: convert eDP checks to functions and document
Most of the PCH eDP checks are redundant, so document the functions in
preparation for removing most of the calls.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 2c6be944111a873ce96865f1a6033056bdf0d0e2 |
|
03-Oct-2010 |
Keith Packard <keithp@keithp.com> |
drm/i915: mark display port DPMS state as 'ON' when enabling output
The display port DPMS state is tracked internally in the display port
driver so that when a hotplug event comes along, the driver can know
whether to try retraining the link. This doesn't work well if the
driver never sets the DPMS state to ON when the output is enabled.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 58e10eb92d36a62568349d985c9140d9be16a99c |
|
03-Oct-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/i915_gem_evict.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
|
| b99a9d9bb62a984bdfcb6c973dfe180bd776abbe |
|
03-Oct-2010 |
Keith Packard <keithp@keithp.com> |
drm/i915: vblank status not valid while training display port
While the display port is in training mode, vblank interrupts don't
occur. Because we have to wait for the display port output to turn on
before starting the training sequence, enable the output in 'normal'
mode so that we can tell when a vblank has occurred, then start the
training sequence.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 27d64339a8d8465484286a2da93f5f6c36be5c3d |
|
24-Sep-2010 |
Hette Visser <hettevisser@gmail.com> |
drm/i915/dp: Wait for PP_CONTROL to take effect.
This patch fixes the black screen bug on Dell e6510, by
adding two delays to give the eDP panel time to turn on before we
continue with the next write.
300ms is rather arbitray and a rather long sleep, we need to find a way
of refining this value.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29278
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 5ceb0f9bb7bde101d8b07cb803002591dcb8c804 |
|
24-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Parse the eDP link configuration from the vBIOS
First step, lets have a look at the values for troublesome panels and
see if they may be used to improve our link training.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| e9e5f8e8d373e72f5c39dafde1ce110fc7082118 |
|
21-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into HEAD
Conflicts:
drivers/char/agp/intel-agp.c
drivers/gpu/drm/i915/intel_crt.c
|
| f899fc64cda8569d0529452aafc0da31c042df2e |
|
21-Jul-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: use GMBUS to manage i2c links
Use the GMBUS interface rather than direct bit banging to grab the EDID
over DDC (and for other forms of auxiliary communication with external
display controllers). The hope is that this method will be much faster
and more reliable than bit banging for fetching EDIDs from buggy monitors
or through switches, though we still preserve the bit banging as a
fallback in case GMBUS fails.
Based on an original patch by Jesse Barnes.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 930a9e283516a3a3595c0c515113f1b78d07f695 |
|
14-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm: Use a nondestructive mode for output detect when polling (v2)
v2: Julien Cristau pointed out that @nondestructive results in
double-negatives and confusion when trying to interpret the parameter,
so use @force instead. Much easier to type as well. ;-)
And fix the miscompilation of vmgfx reported by Sedat Dilek.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 7b334fcb45b757ffb093696ca3de1b0c8b4a33f1 |
|
10-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm: Use a nondestructive mode for output detect when polling
Destructive load-detection is very expensive and due to failings
elsewhere can trigger system wide stalls of up to 600ms. A simple
first step to correcting this is not to invoke such an expensive
and destructive load-detection operation automatically.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29536
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=16265
Reported-by: Bruno Prémont <bonbons@linux-vserver.org>
Tested-by: Sitsofe Wheeler <sitsofe@yahoo.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| fe255d0028903f1132a3c1214edc91cf95b7cd98 |
|
11-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Convert a udelay(17000) to a sleep during link-off
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 4d12fe0b4864682d3562021cde0f32961c655d75 |
|
10-Sep-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: don't unlock panel regs
This was just a workaround for some broken Ironlake CRTC code.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| df0e924883d029a8651a2a0c7b8da67a07611ed2 |
|
09-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Make the connector->encoder relationship explicit
Currently we have a exact mapping of a connector onto an encoder for its
whole lifetime. Make this an explicit property of the structure and so
simplify the code.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 4ef69c7a64b78d477d1666eba258ca049e8bac91 |
|
09-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Rename intel_encoder->enc to base for consistency
[Patch is slightly larger than is strictly necessary to fixup
surrounding checkpatch.pl errors.]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1af5fa1b7e5ff8332f8a2ee3c5fb44d93b34868d |
|
08-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Flush the PLL register write before sleeping
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 2c9d97545914cc764786702f361a1f1c9bb8dfa9 |
|
08-Sep-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: make sure panel is sequenced off when starting a mode set
Otherwise we may not be able to train the DP link.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3ba5c569c4a99c43bdac9f0c1c65e15a7b3390b9 |
|
25-Aug-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: make sure VDD AUX power has time to settle
When turning on or off the VDD AUX bit, we need to give the panel time
to start or stop or AUX transactions may fail.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3969c9c927b0bdb1e477a1eda60743143a75e4a5 |
|
08-Sep-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: don't change VDD AUX status in panel power functions
Mode set sequence outlines when the AUX VDD bit should be set and
cleared, and it's separate from the panel power sequence.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 33a34e4e5969c5272cd6cb88f2e01c97218dd80b |
|
08-Sep-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: split DP link training across panel power sequencing
Mode set sequence requires that we start training, then enable the
panel, then complete training. So split the DP training function into
two parts; the first enables the DP port and sets training pattern 1 and
the second completes the training.
As part of this, remove some redundant function args from the various DP
handling functions and use the intel_dp fields everywhere we can.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: removed first ironlake_edp_backlight_on() on advice of jbarnes]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| b2094bbad48a59f59b115832879121aa210841f0 |
|
08-Sep-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: use VDD AUX for panel power around detection and in prepare
Mode setting sequence specifies that we use VDD AUX for configuration
and detection, and early in the mode set sequence. Only later (after
DP_A has started training) should we actually enable panel power.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: checkpatch.pl complaining about whitespace]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 6176b8f908a58a7affaacf6f3a90ef14325686f0 |
|
08-Sep-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: use 125MHz reference clock for PCH attached eDP
Fix the test so we don't try to use the 450MHz refclk on PCH attached
eDP.
References:
https://bugs.freedesktop.org/show_bug.cgi?id=29141
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 7eaf5547d0460027b15a297bb15d80bdd600cb41 |
|
08-Sep-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: fix eDP detection
Panel needs to be powered up.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 995b6762f0fd54377bbfafdf5328b12de698bfa8 |
|
20-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Quieten sparse warnings for missing prototypes.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 481b6af3d1f36d4a19bd36321c1e9f713db49aad |
|
23-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Drop the msleep parameter to wait_for()
Jesse's feedback from using the wait_for() macro was that the msleep
argument was that it was superfluous and made the macro more difficult
to use and to read. As the actually amount of time to sleep is not
critical, the crucial part is to sleep and let the processor schedule
something else whilst we wait for the event, replace the argument with a
hardcoded value.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 24d05927c37adf62fe8833eceba50585cb78f906 |
|
20-Aug-2010 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/i915: unload: fix intel dp encoder cleanup
struct intel_dp contains both struct intel_encoder at the beginning (as
it's base-class) and an i2c adapater. When initializing, the i2c adapter
gets assigned
intel_encoder->ddc_adaptor = &intel_dp->adapter
and the generic intel_encode_destroy happily calls kfree on this pointer.
Ouch. Fix this by using a dp specific cleanup function.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_dp.c
|
| 4f7f7b7eb94bd37c449f06932459bbed78826f8d |
|
18-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/dp: Really try 5 times before giving up.
Only stop trying if the aux channel sucessfully reports that the
transmission was completed, otherwise try again. On the 5th failure,
bail and report that something is amiss.
This fixes a sporadic failure in reading the EDID for my external panel
over DP.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
/drivers/gpu/drm/i915/intel_dp.c
|
| 9d0498a2bf7455159b317f19531a3e5db2ecc9c4 |
|
18-Aug-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: wait for actual vblank, not just 20ms
Waiting for a hard coded 20ms isn't always enough to make sure a vblank
period has actually occurred, so add code to make sure we really have
passed through a vblank period (or that the pipe is off when disabling).
This prevents problems with mode setting and link training, and seems to
fix a bug like https://bugs.freedesktop.org/show_bug.cgi?id=29278, but
on an HP 8440p instead. Hopefully also fixes
https://bugs.freedesktop.org/show_bug.cgi?id=29141.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| d240f20f545fa4ed78ce48d1eb62ab529f2b1467 |
|
14-Aug-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: make sure eDP PLL is enabled at the right time
We need to make sure the eDP PLL is enabled before the pipes or planes,
so do it as part of the DP prepare mode set function.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 7643a7fa16edf180d593f705f4fa5930c40e8d2d |
|
11-Aug-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: eDP mode set sequence corrections
We should disable the panel first when shutting down an eDP link. And
when turning one on, the panel needs to be enabled before link training
or eDP I/O won't be enabled.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 37c6c9b0e941fbb7f37a93d36abaf5fcafea87a8 |
|
11-Aug-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add panel reset workaround
Ironlake requires that we clear the reset panel bit during power
sequences and restore it afterwards. Uncondtionally add code to do that
since it should be harmless on SNB+.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 913d8d110078788c14812dce8bb62c37946821d2 |
|
07-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Ensure that while(INREG()) are bounded (v2)
Add a new macro, wait_for, to simplify the act of waiting on a register
to change state. wait_for() takes three arguments, the condition to
inspect on every loop, the maximum amount of time to wait and whether to
yield the cpu for a length of time after each check.
v2: Upgrade failure messages to DRM_ERROR on the suggestion of
Eric Anholt. We do not expect to hit these conditions as they reflect
programming errors, so if we do we want to be notified.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1d8e1c75ffa84400758aef9cc59298920b8801f9 |
|
07-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Enable aspect/centering panel fitting for Ironlake.
v2: Hook in DP paths to keep FULLSCREEN panel fitting on eDP.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| ea5b213ad4b161463e76b63dbb115ea20e2200f0 |
|
04-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Subclass intel_encoder.
Subclass intel_encoder to reduce the pointer dance through
intel_encoder->dev_priv.
10 files changed, 896 insertions(+), 997 deletions(-)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 7de56f43e06ec6e17f548dfb359d395adbfbb87d |
|
19-Jul-2010 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Validate the mode for eDP by using fixed panel size
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 0d3a1beecfa54b938edf3ed046902f072e1e180a |
|
19-Jul-2010 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Always use the fixed panel timing for eDP
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| b9efc4804b1e61ee01a0d824c5d27bfdb518fffe |
|
19-Jul-2010 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Add fixed panel mode parsed from EDID for eDP without fixed mode in VBT
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| cb0953d734348e8862d6d7edc666cfb3bf6d8fae |
|
16-Jul-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915: Initialize LVDS and eDP outputs before anything else
This makes them sort to the front in X, which makes them likely to be
the primary outputs if you haven't specified a preference in your DE,
which is likely to be what you want.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| b329530ca7cdf6bf014f2124efd983e01265d623 |
|
16-Jul-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Correctly report eDP in the core connector type
Do this for both real eDP and for PCH_DP_D when used as the eDP
connection.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| f091737978251811e34e7813ba4bfae5cae0b810 |
|
16-Jul-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Rename has_edp to is_pch_edp to reflect its real meaning
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 4f444071702bf0b76cfb381150cf0fc8cacdc931 |
|
21-Jul-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: apply DP bandwidth workaround for PCH eDP as well
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=29141 though the
workaround itself is still a bit of a mystery.
Tested-by: Adam Hill <sidepipeuk@yahoo.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 2bd34f6ca86b5a5f9b749624f73310820e7a93fd |
|
02-Aug-2010 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/master' into drm-intel-next
This resolves the conflict in the EDP code, which has been rather
popular to hack on recently.
Conflicts:
drivers/gpu/drm/i915/intel_dp.c
|
| 36e83a187ca7517e9bdce7148b1c2c27661ef38f |
|
12-Jun-2010 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Add the support of eDP on DP-D for Ibex/CPT
This one adds support for eDP that connected on PCH DP-D port
instead of CPU DP-A port, and only DP-D port could be used for eDP.
https://bugs.freedesktop.org/show_bug.cgi?id=27220
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Jan-Hendrik Zab <jan@jhz.name>
Tested-by: Templar <templar@rshc.de>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 5620ae29f1eabe655f44335231b580a78c8364ea |
|
26-Jul-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: make sure we shut off the panel in eDP configs
Fix error from the last pull request. Making sure we shut the panel off
is more correct and saves power.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| 9934c132989d5c488d2e15188220ce240960ce96 |
|
22-Jul-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: make sure eDP panel is turned on
When enabling the eDP port, we need to make sure the panel is turned on
after training the link. If we don't, it likely won't come back after
suspend or may not come up at all.
For unknown reasons, unlocking the panel regs before initiating a power
on sequence is necessary. There are known bugs in the PCH panel
sequencing logic, apparently this is one possible workaround.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=28739.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: "Paulo J. S. Silva" <pjssilva@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| fe27d53e5c597ee5ba5d72a29d517091f244e974 |
|
30-Jun-2010 |
Dave Airlie <airlied@redhat.com> |
i915: fix ironlake edp panel setup (v4)
The eDP spec claims a 20% overhead for the 8:10 encoding scheme used
on the wire. Take this into account when picking the lane/clock speed
for the panel.
v3: some panels are out of spec, try our best to deal with them, don't
refuse modes on eDP panels, and try the largest allowed settings if
all else fails on eDP.
v4: fix stupid typo, forgot to git add before amending.
Fixes several reports in bugzilla:
https://bugs.freedesktop.org/show_bug.cgi?id=28070
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| d8201ab6514f8dc1a0ccfac52c688d80976a425a |
|
07-May-2010 |
Dan Carpenter <error27@gmail.com> |
i915: remove unneeded null checks
The "encoder" variable can never be null because it is used as loop
cursor in a list_for_each_entry() loop.
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| a7de64e540d2017a8e44dec1ca9d88a509aa7e05 |
|
13-May-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Add DPCD data to debug output
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 9962c9252e46eda7058067cbe73bdf1ed74b0d37 |
|
13-May-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Only enable enhanced framing if the sink supports it
DisplayPort spec v1.1a, Table 2-52.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| eb1f8e4f3be898df808e2dfc131099f5831d491d |
|
07-May-2010 |
Dave Airlie <airlied@redhat.com> |
drm/fbdev: rework output polling to be back in the core. (v4)
After thinking it over a lot it made more sense for the core to deal with
the output polling especially so it can notify X.
v2: drop plans for fake connector - per Michel's comments - fix X patch sent to xorg-devel, add intel polled/hpd setting, add initial nouveau polled/hpd settings.
v3: add config lock take inside polling, add intel/nouveau poll init/fini calls
v4: config lock was a bit agressive, only needed around connector list reading.
otherwise it could re-enter.
glisse: discard drm_helper_hpd_irq_event
v3: Reviewed-by: Michel Dänzer <michel@daenzer.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 97921a5b03d40681b3aed620a5e719710336c6df |
|
20-Apr-2010 |
Dave Airlie <airlied@redhat.com> |
Merge remote branch 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next into drm-core-next
* 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next: (48 commits)
agp/intel-gtt: kill previous_size assignments
agp/intel-gtt: kill intel_i830_tlbflush
agp/intel: split out gmch/gtt probe, part 1
agp/intel: kill mutli_gmch_chip
agp/intel: uncoditionally reconfigure driver on resume
agp/intel: split out the GTT support
agp/intel: introduce intel-agp.h header file
drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
drm/i915/pch: Use minimal number of FDI lanes (v2)
drm/i915: Add the support of memory self-refresh on Ironlake
drm/i915: Move Pineview CxSR and watermark code into update_wm hook.
drm/i915: Only save/restore FBC on the platform that supports FBC
drm/i915: Fix the incorrect argument for SDVO SET_TV_format command
drm/i915: Add support of SDVO on Ibexpeak PCH
drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on).
drm/i915: do not read uninitialized ->dev_private
Revert "drm/i915: Use a dmi quirk to skip a broken SDVO TV output."
drm/i915: implement multifunction SDVO device support
drm/i915: remove unused intel_pipe_get_connector()
drm/i915: remove connector object in old output structure
...
|
| 6e0032f0ae4440e75256bee11b163552cae21962 |
|
27-Mar-2010 |
Karsten Wiese <fzuuzf@googlemail.com> |
drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
PORT_HOTPLUG_EN has allready been setup in i915_driver_irq_postinstall(),
when intel_dp_detect() runs.
Delete the DP[BCD]_HOTPLUG_INT_EN defines, they are not referenced anymore.
I found this while searching for a fix for
https://bugzilla.redhat.com/show_bug.cgi?id=528312
Signed-off-by: Karsten Wiese <fzu@wemgehoertderstaat.de>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 13bd8e4673d527a9e48f41956b11d391e7c2cfe0 |
|
17-Apr-2010 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
drm/i915: Ignore LVDS EDID when it is unavailabe or invalid
drm/i915: Add no_lvds entry for the Clientron U800
drm/i915: Rename many remaining uses of "output" to encoder or connector.
drm/i915: Rename intel_output to intel_encoder.
agp/intel: intel_845_driver is an agp driver!
drm/i915: introduce to_intel_bo helper
drm/i915: Disable FBC on 915GM and 945GM.
|
| 55f78c43598dbfbce09034b463ed2abc72f1420d |
|
29-Mar-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: convert DP/eDP driver to new encoder/connector structure
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 9c9e792795f96d201d85188607261f9f8bbf3219 |
|
05-Apr-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915: Set sync polarity correctly on DisplayPort
Probably only matters for format-converting dongles, but might as well
get it right all the time.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| ab00a9ef8d4ce7de4d5b15cbf4101feeb8cf7f4d |
|
05-Apr-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915: Un-magic a DPCD register write
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| e3421a189447c0b8cd0aff5c299f53b5ab7c38f6 |
|
08-Apr-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: enable DP/eDP for Sandybridge/Cougarpoint
DP on Cougarpoint has new training pattern definitions, and
new transcoder DP control register is used to determine the mapping
for transcoder and DP digital output. And eDP for Sandybridge has
new voltage and pre-emphasis level definitions.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 6443170f6d862a1cc89e61e4bb2410b714b875f4 |
|
03-Apr-2010 |
Eric Anholt <eric@anholt.net> |
drm/i915: Remove dead KMS encoder save/restore code.
This was brought over from UMS, and used for a while until we decided
that drm_helper_resume_force_mode was easier and more reliable, since
it didn't require duplicating all the code deleted here. We just
forgot to delete all that junk for a while.
/drivers/gpu/drm/i915/intel_dp.c
|
| 335af9a235a82842854b394507ab5e310d88be42 |
|
30-Mar-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: change intel_ddc_get_modes() function parameters
This one replaces original param for intel_ddc_get_modes() with
DRM connector and i2c bus adapter instead. With explicit params,
we won't require that a single driver structure must hold connector
and DDC bus reference, which ease the conversion to splitted encoder/
connector model.
It also clears up for some cases that we would steal other DDC bus
for mode probe, like VGA analog DDC probe for DVI-I. Also it fixed
a bug in old DVI-I probe handling, that failed to restore origin
analog GPIO port.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 5a0e3ad6af8660be21ca98a971cd00f331318c05 |
|
24-Mar-2010 |
Tejun Heo <tj@kernel.org> |
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| 21d40d37eca86872f2bf0af995809ebdef25c9d9 |
|
25-Mar-2010 |
Eric Anholt <eric@anholt.net> |
drm/i915: Rename intel_output to intel_encoder.
The intel_output naming is inherited from the UMS code, which had a
structure of screen -> CRTC -> output. The DRM code has an additional
notion of encoder/connector, so the structure is screen -> CRTC ->
encoder -> connector. This is a useful structure for SDVO encoders
which can support multiple connectors (each of which requires
different programming in the one encoder and could be connected to
different CRTCs), or for DVI-I, where multiple encoders feed into the
connector for whether it's used for digital or analog. Most of our
code is encoder-related, so transition it to talking about encoders
before we start trying to distinguish connectors.
This patch is produced by sed s/intel_output/intel_encoder/ over the
driver.
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| c619eed4b2ee1b2bde3e02464eb81632a08bb976 |
|
29-Jan-2010 |
Eric Anholt <eric@anholt.net> |
drm/i915: More s/IS_IRONLAKE/HAS_PCH_SPLIT for Sandybridge.
I think this is pretty much correct. Not really tested.
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 6251ec0ae2eb9e9e96689422358c2fdb35c63768 |
|
11-Jan-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: fix eDP pipe mask
eDP could be on pipe A or B.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 885a5fb5b120a5c7e0b3baad7b0feb5a89f76c18 |
|
11-Jan-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: fix pixel color depth setting on eDP
Original DP mode_valid check didn't take pixel color depth into account,
which made one 1600x900 eDP panel's mode check invalid because of overclock,
but actually this 6bpc panel does can work with x1 lane at 2.7G. This one
trys to take bpp value properly both in mode validation and mode setting.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 6207937d4feea000913e8ca23fe20c7744be7847 |
|
06-Jan-2010 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Don't use the child device parsed from VBT to setup HDMI/DP
On some boxes the BIOS will report different child device arrays when
the system is booted with/without the dock. In such case the HDMI/DP
port can't be setup correctly. So revert two commits
(fc816655236cd9da162356e96e74c7cfb0834d92/
6e36595a2131e7ed5ee2674be54b2713ba7f0490) that use the child device
parsed from VBT to setup HDMI/DP.
http://bugzilla.kernel.org/show_bug.cgi?id=14854
http://bugzilla.kernel.org/show_bug.cgi?id=14860
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Sean Young <sean@mess.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| b01f2c3a4a37d09a47ad73ccbb46d554d21cfeb0 |
|
11-Dec-2009 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: only enable hotplug for detected outputs
This patch changes around our hotplug enable code a bit to only enable
it for ports we actually detect and initialize. This prevents problems
with stuck or spurious interrupts on outputs that aren't actually wired
up, and is generally more correct.
Fixes FDO bug #23183.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 3ff99164f67aae78a2bd2313f65ad55bddb1ffea |
|
08-Dec-2009 |
Dave Airlie <airlied@redhat.com> |
Merge remote branch 'anholt/drm-intel-next' into drm-linus
This merges the upstream Intel tree and fixes up numerous conflicts
due to patches merged into Linus tree later in -rc cycle.
Conflicts:
drivers/char/agp/intel-agp.c
drivers/gpu/drm/drm_dp_i2c_helper.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_suspend.c
|
| ab2c0672984f7f7ebec6d5f615fd5a6ebad26f3d |
|
04-Dec-2009 |
Dave Airlie <airlied@redhat.com> |
drm/intel: refactor DP i2c support and DP common header to drm helper
Both radeon and nouveau can re-use this code so move it up a level
so they can. However the hw interfaces for aux ch are different
enough that the code to translate from mode, address, bytes
to actual hw interfaces isn't generic, so move that code into the
Intel driver.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| f2b115e69d46344ae7afcaad5823496d2a0d8650 |
|
03-Dec-2009 |
Adam Jackson <ajax@redhat.com> |
drm/i915: Fix product names and #defines
IGD* isn't a useful name. Replace with the codenames, as sourced from
pci.ids.
Signed-off-by: Adam Jackson <ajax@redhat.com>
[anholt: Fixed up for merge with pineview/ironlake changes]
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 6e36595a2131e7ed5ee2674be54b2713ba7f0490 |
|
02-Dec-2009 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Declare the new VBT parsing functions as static
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 652af9d74e1a3a10bb10f0d8e8f42ddac26bbc1a |
|
02-Dec-2009 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Add the missing clonemask for display port on Ironlake
Add the missing clonemask for display port on Ironlake.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| f24bc39facc1e74eb989908106fe9f6d375ae16e |
|
02-Dec-2009 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: fix the incorrect condition judgement in dp_is_present_in_vbt
We were always looking for the PORT_IDPB entry.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| ae266c98f580a9ba5e0bfdb1d1f0f70ab3cd807f |
|
24-Nov-2009 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Don't set up DP ports that aren't in the BIOS device table.
Use the child device array to decide whether the given DP output should be
initialized. If the given DP port can't be found in child device array,
it is not present and won't be initialized.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 28c97730c36e06d5ba0c442156eb2154347cc3fe |
|
09-Oct-2009 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMS
Replace the DRM_DEBUG with DRM_DEBUG_KMS in output device code.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| d54e9d28241fd52cca3df4f6bc2054a30d453fed |
|
19-Oct-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: quiet DP i2c init
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| a419aef8b858a2bdb98df60336063d28df4b272f |
|
18-Aug-2009 |
Joe Perches <joe@perches.com> |
trivial: remove unnecessary semicolons
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
/drivers/gpu/drm/i915/intel_dp.c
|
| 7c8460db30dfd085ef3837c8fb02ecf2e718b983 |
|
08-Sep-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: fix mask bits setting
eDP is exclusive connector too, and add missing crtc_mask
setting for TV.
This fixes
http://bugzilla.kernel.org/show_bug.cgi?id=14139
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reported-and-tested-by: Carlos R. Mafra <crmafra2@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
/drivers/gpu/drm/i915/intel_dp.c
|
| f8aed700c6ec46ddade6570004ce25332283b306 |
|
24-Aug-2009 |
Ma Ling <ling.ma@intel.com> |
drm/i915: Set crtc/clone mask in different output devices
Based on Bspec each encoder has different sharing pipe property,
i.e. Integrated or SDVO TV both will occupy one pipe exclusively,
and sdvo-non-tv and crt are allowed to share one. The patch moves
sharing judgment into differnet output functions, and sets the right
clone bit.
This fixes both HDMI outputs choosing the same pipe.
https://bugs.freedesktop.org/show_bug.cgi?id=22247
Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by : Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 32f9d658aee5be09ebdd28fc730630e61d0b46db |
|
23-Jul-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: Add eDP support on IGDNG mobile chip
This adds embedded DisplayPort support on next mobile chip which
aims to replace origin LVDS port. VBT's driver feature block has
been used to determine the type of current internal panel for eDP
or LVDS.
Currently no panel fitting support for eDP and backlight control
would be added in future.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 5eb08b69f510fadaba77eb9a1bda0f7299c4ebcc |
|
23-Jul-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: enable DisplayPort support on IGDNG
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| eebc863e469cd91d96c4e3636450596ae29f0502 |
|
23-Jul-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: Fix channel ending action for DP aux transaction
We should use current channel 'status' bits to clear DP aux channel's
done and error bits, instead of using the channel setting bits, that
will set send/busy bit again to initiate new transaction.
This also includes also some minor cleanup.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| 1ae8c0a56eeb3ed358b78ccadd024d6b721f26bc |
|
29-Jun-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: Make driver less chatty
Convert many printk calls to DRM_DEBUG calls to reduce kernel log noise
for normal activities. Switch other printk calls to DRM_ERROR or DRM_INFO.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_dp.c
|
| fb0f8fbf97e8a25074c81c629500d94cafa9e366 |
|
12-Jun-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: Generate 2MHz clock for display port aux channel I/O. Retry I/O.
The display port aux channel clock is taken from the hrawclk value, which is
provided to the chip as the FSB frequency (as far as I can determine). The
strapping values for that are available in the CLKCFG register, now used to
select an appropriate divider to generate a 2MHz clock.
In addition, the DisplayPort spec requires that each aux channel I/O be
retried 'at least 3 times' in case the sink is idle when the first request
comes in.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| a5b3da543d4882d57a2f3e05d37ad8e1e1453489 |
|
12-Jun-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: Clarify error returns from display port aux channel I/O
Use distinct error return values for each kind of aux channel I/O failure.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| c8110e52b753f3d105604df84ac06cd6d1645409 |
|
06-May-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: Use hotplug callback to retrain DP link
When a DP monitor is plugged back in, it needs to be retrained if it was
active before.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|
| a4fc5ed69817c73e32571ad7837bb707f9890009 |
|
08-Apr-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: Add Display Port support
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_dp.c
|