| cc1f71942944890c7e05fc55dc4427c94b63d4f1 |
|
05-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
drm: introduce drm_can_sleep and use in intel/radeon drivers. (v2)
So we have a few places where the drm drivers would like to sleep to
be nice to the system, mainly in the modesetting paths, but we also
have two cases were atomic modesetting must take place, panic writing
and kernel debugger. So provide a central inline to determine if a
sleep or delay should be used and use this in the intel and radeon drivers.
v2: drop intel_drv.h MSLEEP macro, nobody uses it.
Based on patch from Michel Dänzer <michel.daenzer@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43941
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 8ea30864229e54b01ac0e9fe88c4b733a940ec4e |
|
03-Jan-2012 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add color key support v4
Add new ioctls for getting and setting the current destination color
key. This allows for simple overlay display control by matching a color
key value in the primary plane before blending the overlay on top.
v2: remove unnecessary mutex acquire/release around reg accesses
v3: add support for full color key management
v4: fix copy & paste bug in snb_get_colorkey
don't bother checking min/max values against docs as the docs are likely
wrong (how could we handle 10bpc surface formats?)
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_drv.h
|
| 175bd4204e069f8bd855ca3dcf70a78db4410936 |
|
13-Dec-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: track sprite coverage and disable primary plane if possible
To save power when the sprite is full screen, we can disable the primary
plane on the same pipe. Track the sprite status and enable/disable the
primary opportunistically.
v2: remove primary plane enable/disable hooks; they're identical
Reviewed-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| b840d907fcf6d5d5ef91af4518b3dab3a5da0f75 |
|
13-Dec-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add SNB and IVB video sprite support v6
The video sprites support various video surface formats natively and can
handle scaling as well. So add support for them using the new DRM core
sprite support functions.
v2: use drm specific fourcc header and defines
v3: address Daniel's comments:
- don't take struct mutex around register access (only needed for
regs in the GT power well)
- don't hold struct mutex across vblank waits
- fix up update_plane API (pass obj instead of GTT offset)
- add interlaced defines for sprite regs
- drop unnecessary 'reg' variables
- comment double buffered reg flushing
Also fix w/h confusion when writing the scaling reg.
v4: more fixes, address more comments from Daniel, and include Hai's fix
- prevent divide by zero in scaling calculation (Hai Lan)
- update to Ville's new DRM_FORMAT_* types
- fix sprite watermark handling (calc based on CRTC size, separate
from normal display wm)
- remove private refcounts now that the fb cleanups handles things
v5: add linear surface support
v6: remove color key clearing & setting from update_plane
For this version, I tested DPMS since it came up in the last review;
DPMS off/on works ok when a video player is working under X, but for
power saving we'll probably want to do something smarter. I'll leave
that for a separate patch on top. Likewise with the refcounting/fb
layer handling, which are really separate cleanups.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 1fbe6f625f69e48c4001051dc1431afc704acfaa |
|
20-Dec-2011 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'v3.2-rc6' of /home/airlied/devel/kernel/linux-2.6 into drm-core-next
Merge in the upstream tree to bring in the mainline fixes.
Conflicts:
drivers/gpu/drm/exynos/exynos_drm_fbdev.c
drivers/gpu/drm/nouveau/nouveau_sgdma.c
|
| 3b5c78a35cf7511c15e09a9b0ffab290a42d9bcf |
|
14-Dec-2011 |
Adam Jackson <ajax@redhat.com> |
drm/i915/dp: Dither down to 6bpc if it makes the mode fit
Some active adaptors (VGA usually) only have two lanes at 2.7GHz.
That's a maximum pixel clock of 144MHz at 8bpc, but 192MHz at 6bpc.
Fixes Asus UX31 panel being black at startup due to no valid modes since
dc22ee6fc18ce0f15424e753e8473c306ece95c1.
v2: Rebased to current code, resulting in the fix applying to EDP panels as
well. Also changed from spatio-temporal to just spatial dithering on
pre-ironlake, to be conssitent (and less visual flicker)
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Eric Anholt <eric@anholt.net>
Tested-by: Dirk Hohndel <hohndel@infradead.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 308e5bcbdb10452e8aba31aa21432fb67ee46d72 |
|
14-Nov-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm: add an fb creation ioctl that takes a pixel format v5
To properly support the various plane formats supported by different
hardware, the kernel must know the pixel format of a framebuffer object.
So add a new ioctl taking a format argument corresponding to a fourcc
name from the new drm_fourcc.h header file. Implement the fb creation
hooks in terms of the new mode_fb_cmd2 using helpers where the old
bpp/depth values are needed.
v2: create DRM specific fourcc header file for sharing with libdrm etc
v3: fix rebase failure and use DRM fourcc codes in intel_display.c and
update commit message
v4: make fb_cmd2 handle field into an array for multi-object formats
pull in Ville's fix for the memcpy in drm_plane_init
apply Ville's cleanup to zero out fb_cmd2 arg in drm_mode_addfb
v5: add 'flags' field for interlaced support (from Ville)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 260052100ef669b5374f72055379adc5da35034b |
|
22-Sep-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: use correct SPD type value
SPD frames are actually type 0x83, not just 0x3.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@kernel.org
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| d4270e57efe9e2536798c59e1ed2fd0a1e5cdfcf |
|
11-Oct-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: export a CPT mode set verification function
At the point where we check, we can't do much about the failure, but it
can aid debugging. Note that the auto-train override bit will be reset
as part of normal mode setting with this patch if a pipe ever does get
stuck, but that's consistent with the workaround for CPT provided by the
hardware team. This patch helped catch the fact that the pipe wasn't
running in the !composite sync FDI case on my IVB SDV, so has already
shown to be useful.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 4b645f14021871e06ce96c359bbdf0b48248c26e |
|
12-Oct-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add PLL sharing support to handle 3 pipes
Add two new fields to the intel_crtc struct for 3 pipe support: no_pll
and use_pll_a. The no_pll field is only set on the 3rd pipe to indicate
that it doesn't have a PLL of its own and so shouldn't try to write the
main PLL regs. The use_pll_a field controls which PLL pipe 3 will
share, A or B. The core code will try to share PLLs with whichever pipe
has the same timings, rejecting the mode set if none is found. This
means that pipe 3 must always be set after one of the other pipes has
been configured with real PLL settings.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 0ac225e56997ef89f46eb51b02799a685b78f214 |
|
28-Sep-2011 |
Keith Packard <keithp@keithp.com> |
Merge branch 'drm-intel-fixes' into drm-intel-next
|
| cc68c81aed7d892deaf12d720d5455208e94cd0a |
|
21-Sep-2011 |
Simon Farnsworth <simon.farnsworth@onelan.co.uk> |
drm/i915: Enable SDVO hotplug interrupts for HDMI and DVI
I was seeing a nasty 5 frame glitch every 10 seconds, caused by the
poll for connection on DVI attached by SDVO.
As my SDVO DVI supports hotplug detect interrupts, the fix is to
enable them, and hook them in to the various bits of driver
infrastructure so that they work reliably.
Note that this is only tested on single-function DVI-D SDVOs, on two
platforms (965GME and 945GSE), and has not been checked against a
specification document.
With lots of help from Adam Jackson <ajax@redhat.com> on IRC.
Signed-off-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| e0dac65ed45e72fe34cc7ccc76de0ba220bd38bb |
|
05-Sep-2011 |
Wu Fengguang <fengguang.wu@intel.com> |
drm/i915: pass ELD to HDMI/DP audio driver
Add ELD support for Intel Eaglelake, IbexPeak/Ironlake,
SandyBridge/CougarPoint and IvyBridge/PantherPoint chips.
ELD (EDID-Like Data) describes to the HDMI/DP audio driver the audio
capabilities of the plugged monitor. It's built and passed to audio
driver in 2 steps:
(1) at get_modes time, parse EDID and save ELD to drm_connector.eld[]
(2) at mode_set time, write drm_connector.eld[] to the Transcoder's hw
ELD buffer and set the ELD_valid bit to inform HDMI/DP audio driver
This patch is tested OK on G45/HDMI, IbexPeak/HDMI and IvyBridge/HDMI+DP.
Test scheme: plug in the HDMI/DP monitor, and run
cat /proc/asound/card0/eld*
to check if the monitor name, HDMI/DP type, etc. show up correctly.
Minor imperfection: the GEN5_AUD_CNTL_ST/DIP_Port_Select field always
reads 0 (reserved). Without knowing the port number, I worked it around
by setting the ELD_valid bit for ALL the three ports. It's tested to not
be a problem, because the audio driver will find invalid ELD data and
hence rightfully abort, even when it sees the ELD_valid indicator.
Thanks to Zhenyu and Pierre-Louis for a lot of valuable help and testing.
CC: Zhao Yakui <yakui.zhao@intel.com>
CC: Wang Zhenyu <zhenyu.z.wang@intel.com>
CC: Jeremy Bush <contractfrombelow@gmail.com>
CC: Christopher White <c.white@pulseforce.com>
CC: Pierre-Louis Bossart <pierre-louis.bossart@intel.com>
CC: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 0206e353a0416ad63ce07f53c807c2c725633b87 |
|
16-Aug-2011 |
Akshay Joshi <me@akshayjoshi.com> |
Drivers: i915: Fix all space related issues.
Various issues involved with the space character were generating
warnings in the checkpatch.pl file. This patch removes most of those
warnings.
Signed-off-by: Akshay Joshi <me@akshayjoshi.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| aaa6fd2a004147bf32fce05720938236de3361d9 |
|
12-Aug-2011 |
Matthew Garrett <mjg@redhat.com> |
Not all systems expose a firmware or platform mechanism for changing the backlight intensity on i915, so add native driver support.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: David Airlie <airlied@linux.ie>
Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Len Brown <lenb@kernel.org>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Sedat Dilek <sedat.dilek@googlemail.com>
Tested-by: Michel Alexandre Salim <salimma@fedoraproject.org>
Tested-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| c0864cb39c68696e80657360eba63da5e743b7aa |
|
03-Aug-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/hdmi: HDMI source product description infoframe support
Set an SPD infoframe if the sink supports it.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 45187ace97f7b3deb559b25348ccb7e301c158c9 |
|
03-Aug-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915/hdmi: split infoframe setting from infoframe type code
This makes it easier to add support for other infoframes (e.g. SPD,
vendor specific).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 1630fe754c83b3e57efa51c85f1a21e612a63a0e |
|
08-Jul-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Perform intel_enable_fbc() from a delayed task
In order to accommodate the requirements of re-enabling FBC after
page-flipping, but to avoid doing so and incurring the cost of a wait
for vblank in the middle of a page-flip sequence, we defer the actual
enablement by 50ms. If any request to disable FBC arrive within that
interval, the enablement is cancelled and we are saved from blocking on
the wait.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 5a3542041bf85a65633ed203c3782492116ebb94 |
|
24-Jun-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: split out Ironlake pipe bpp picking code
Figuring out which pipe bpp to use is a bit painful. It depends on both
the encoder and display configuration attached to a pipe. For instance,
to drive a 24bpp framebuffer out to an 18bpp panel, we need to use 6bpc
on the pipe but also enable dithering. But driving that same
framebuffer to a DisplayPort output on another pipe means using 8bpc and
no dithering.
So split out and enhance the code to handle the various cases, returning
an appropriate pipe bpp as well as whether dithering should be enabled.
Save the resulting pipe bpp in the intel_crtc struct for use by encoders
in calculating bandwidth requirements (defaults to 24bpp on pre-ILK).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 23b2f8bb92feb83127679c53633def32d3108e70 |
|
28-Jun-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: load a ring frequency scaling table v3
The ring frequency scaling table tells the PCU to treat certain GPU
frequencies as if they were a given CPU frequency for purposes of
scaling the ring frequency. Normally the PCU will scale the ring
frequency based on the CPU P-state, but with the table present, it will
also take the GPU frequency into account.
The main downside of keeping the ring frequency high while the CPU is
at a low frequency (or asleep altogether) is increased power
consumption. But then if you're keeping your GPU busy, you probably
want the extra performance.
v2:
- add units to debug table header (from Eric)
- use tsc_khz as a fallback if the cpufreq driver doesn't give us a freq
(from Chris)
v3:
- fix comments & debug output
- remove unneeded force wake get/put
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 3f43c48d333777e815ae68d66396cb6dfbc2dd79 |
|
12-May-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Share the common force-audio property between connectors
Make the audio property creation routine common and share the single
property between the connectors.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 645c62a5e95a5f9a8e0d0627446bbda4ee042024 |
|
11-May-2011 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: split PCH clock gating init
Ibex Peak and CougarPoint already require a different setting (added
here), and future chips will likely follow that precedent.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| d2dff872ac44540622ef77a2b7d6ce4a1b145931 |
|
19-Apr-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Attach a fb to the load-detect pipe
We need to ensure that we feed valid memory into the display plane
attached to the pipe when switching the pipe on. Otherwise, the display
engine may read through an invalid PTE and so throw an PGTBL_ER
exception.
As we need to perform load detection before even the first object is
allocated for the fbdev, there is no pre-existing object large enough
for us to borrow to use as the framebuffer. So we need to create one
and cleanup afterwards. At other times, the current fbcon may be large
enough for us to borrow it for duration of load detection.
Found by assert_fb_bound_for_plane().
Reported-by: Knut Petersen <Knut_Petersen@t-online.de>
References: https://bugs.freedesktop.org/show_bug.cgi?id=36246
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 8261b19173b89d86cc3088483595e2879e4976d6 |
|
20-Apr-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Don't store temporary load-detect variables in the generic encoder
Keep all the state required for undoing and restoring the previous pipe
configuration together in a single struct passed from
intel_get_load_detect_pipe() to intel_release_load_detect_pipe() rather
than stuffing them inside the common encoder structure.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 7173188d5d5e50b95c588dbae3b3bc78fde4138e |
|
20-Apr-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Simplify return value from intel_get_load_detect_pipe
... and so remove the confusion as to whether to use the returned crtc
or intel_encoder->base.crtc with the subsequent load-detection. Even
though they were the same, the two instances of load-detection code
disagreed over which was the more correct.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| e8e7a2b8ccfdae0d4cb6bd25824bbedcd42da316 |
|
21-Apr-2011 |
Dave Airlie <airlied@redhat.com> |
drm/i915: restore only the mode of this driver on lastclose (v2)
i915 calls the panic handler function on last close to reset the modes,
however this is a really bad idea for multi-gpu machines, esp shareable
gpus machines. So add a new entry point for the driver to just restore
its own fbcon mode.
v2: move code into fb helper, fix panic code to block mode change on
powered off GPUs.
[airlied: this hits drm core and I wrote it and it was reviewed on intel-gfx
so really I signed it off twice ;-).]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 9f01b25048ad12b5d71f4f7d3b62ef737639a08d |
|
24-Mar-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Busy-spin wait_for condition in atomic contexts
During modesetting, we need to wait for the hardware to report
readiness by polling the registers. Normally, we call msleep() between
reads, because some state changes may take a whole vblank or more
to complete. However during a panic, we are in an atomic context and
cannot sleep. Instead, busy spin polling the termination condition.
References: https://bugzilla.kernel.org/show_bug.cgi?id=31772
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_drv.h
|
| e953fd7bb32f55309a96abd5ceba9cf68d221434 |
|
21-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Add support for limited color range of broadcast outputs
In order to prevent "crushed blacks" on TVs, the range of the RGB output
may be limited to 16-235. This used to be available through Xorg under
the "Broadcast RGB" option, so reintroduce support for KMS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34543
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| ce453d81cb0397aa7d5148984f51907e14072d74 |
|
21-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Use a device flag for non-interruptible phases
The code paths for modesetting are growing in complexity as we may need
to move the buffers around in order to fit the scanout in the aperture.
Therefore we face a choice as to whether to thread the interruptible status
through the entire pinning and unbinding code paths or to add a flag to
the device when we may not be interrupted by a signal. This does the
latter and so fixes a few instances of modesetting failures under stress.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 9035a97a32836d0e456ddafaaf249a844e6e4b5e |
|
16-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into drm-intel-next
Grab the latest stabilisation bits from -fixes and some suspend and
resume fixes from linus.
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
|
| fe16d949b45036d9f80e20e07bde1ddacc930b10 |
|
12-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Move the lvds OpRegion lid detection code to panel and reuse for eDP
Share the lid detection code for the all panels for consistent behaviour
and a single place to add the eventual quirks for crap hardware.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| ac66808814036b4c33dd98091b2176ae6157f1a8 |
|
09-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Disable RC6 on Ironlake
The automatic powersaving feature is once again causing havoc, with 100%
reliable hangs on boot and resume on affected machines.
Reported-by: Francesco Allertsen <fallertsen@gmail.com>
Reported-by: Gui Rui <chaos.proton@gmail.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=28582
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 417ae1476de3ae9689a374d70565f41b3474641e |
|
19-Jan-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Include TLB miss latency in g4x watermark computations
Reports of FIFO underruns are still persisting on gm45.
References: https://bugs.freedesktop.org/show_bug.cgi?id=27589
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 47356eb67285014527a5ab87543ba1fae3d1e10a |
|
11-Jan-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/panel: Only record the backlight level when it is enabled
By tracking the current status of the backlight we can prevent recording
the value of the current backlight when we have disabled it. And so
prevent restoring it to 'off' after an unbalanced sequence of
intel_lvds_disable/enable.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=22672
Tested-by: Alex Riesen <raa.lkml@gmail.com>
Tested-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
/drivers/gpu/drm/i915/intel_drv.h
|
| 3b8d8d91d51c7d15cda51052624169edf7b6dbc6 |
|
17-Dec-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: dynamic render p-state support for Sandy Bridge
Add an interrupt handler for switching graphics frequencies and handling
PM interrupts. This should allow for increased performance when busy
and lower power consumption when idle.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 0cdab21f9a1fca50dd27e488839f5a6578e333b2 |
|
05-Dec-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Uncouple render/power ctx before suspending
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| b9e68670cc3a13166b389ce847af19b0d0d33c67 |
|
03-Dec-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/intel_drv.h
|
| c5d1b51d3559664920136b45f4d2366ed9a9e8be |
|
29-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Clear pfit registers when not used by any outputs
... otherwise the panel-fitter may be left enabled with random settings
and cause unintended filtering (i.e. blurring of native modes on external
panels).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31942
Reported-and-tested-by: Ben Kohler <bkohler@gmail.com>
Tested-by: Ciprian Docan <docan@eden.rutgers.edu>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 919926aeb3e89825093c743dd54f04e42e7d9150 |
|
12-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Thread the pipelining ring through the callers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 05394f3975dceb107a5e1393e2244946e5b43660 |
|
08-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Use drm_i915_gem_object as the preferred type
A glorified s/obj_priv/obj/ with a net reduction of over a 100 lines and
many characters!
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 48fcfc888b48ad49dd83faa107264bbfb0089cad |
|
03-Nov-2010 |
Kyle McMartin <kyle@redhat.com> |
i915: reprogram power monitoring registers on resume
Fixes issue where i915_gfx_val was reporting values several
orders of magnitude higher than physically possible (without
leaving scorch marks on my thighs at least.)
Signed-off-by: Kyle McMartin <kyle@redhat.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 3c17fe4b8f40a112a85758a9ab2aebf772bdd647 |
|
24-Sep-2010 |
David Härdeman <david@hardeman.nu> |
i915: enable AVI infoframe for intel_hdmi.c [v4]
This patch enables the sending of AVI infoframes in
drivers/gpu/drm/i915/intel_hdmi.c.
My receiver currently loses sync when the HDMI output on my computer
(DG45FC motherboard) is switched from 800x600 (the BIOS resolution) to
1920x1080 as part of the boot. Fixable by switching inputs on the receiver
a couple of times.
With this patch, my receiver has not lost sync yet (> 40 tries).
Fourth version, now based on drm-intel-next from:
git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel.git
Two questions still remain:
I'm assuming that the sdvo hardware also stores a header ECC byte in
the MSB of the first dword - is this correct?
Does the SDVOB and SDVOC handling in intel_hdmi_set_avi_infoframe()
look correct?
Signed-off-by: David Härdeman <david@hardeman.nu>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 1d85036278f1b3eb3b7c5db805e5c4c847d1415d |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: remove broken intel_pch_has_edp function
Since we set the output type of PCH attached eDP panels to
INTEL_OUTPUT_eDP this function would never return true when it should.
It's been replaced by working functions.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 814948adec172dbc41252b1815e4e83aedfe91b9 |
|
08-Oct-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add eDP checking functions for the display code
The display code needs to distinguish between CPU and PCH attached eDP
panels, so add some helpers to handle that.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 58e10eb92d36a62568349d985c9140d9be16a99c |
|
03-Oct-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/i915_gem_evict.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
|
| ab7ad7f6451580aa7eccc0ba62807c872088a8f9 |
|
03-Oct-2010 |
Keith Packard <keithp@keithp.com> |
drm/i915: Use pipe state to tell when pipe is off
Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.
Contrarywise, disabling the plane will not cause the display line
value to stop changing, so instead we wait for the vblank interrupt
bit to get set. And, we only do this when we're not about to wait for
the pipe to turn off.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| f899fc64cda8569d0529452aafc0da31c042df2e |
|
21-Jul-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: use GMBUS to manage i2c links
Use the GMBUS interface rather than direct bit banging to grab the EDID
over DDC (and for other forms of auxiliary communication with external
display controllers). The hope is that this method will be much faster
and more reliable than bit banging for fetching EDIDs from buggy monitors
or through switches, though we still preserve the bit banging as a
fallback in case GMBUS fails.
Based on an original patch by Jesse Barnes.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 890f3359f7b84d7015104360d647ccac5f515542 |
|
14-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/i2c: Track the parent encoder rather than just the dev
The SDVO proxy i2c adapter wants to be able to use information stored in
the encoder, so pass that through intel_i2c rather than iterate over all
known encoders every time.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 48b956c5a89c7b100ef3b818b6ccf759ab695383 |
|
14-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Push pipelining of display plane flushes to the caller
This ensures that we do wait upon the flushes to complete if necessary
and avoid the visual tears, whilst enabling pipelined page-flips.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| f7abfe8b281991c66406c42c1a6c6c9ee0daa0ff |
|
13-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Fix an overlay regression from 7e7d76c
When separating out the prepare/commit into its own separate functions
we overlooked that the intel_crtc->dpms_mode was being used elsewhere to
check on the actual status of the pipe.
Track that bit of logic separately from the actual dpms mode, so there
is no confusion should we be able to handle multiple dpms modes, nor
any semantic conflict between prepare/commit and dpms.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 6b383a7f6378f193c30200435d8170f95916b5f0 |
|
13-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Share crtc setup and teardown between dpms and disable/enable
This closes a couple of corner cases where we introduced and forgot
about a couple of routines that need to be called when disabling the
crtc and then re-enabling it. The code needs to be moved again so that
the common bits are shared across generations.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| e9e331a8abeece1565d383510ed985945132ffe3 |
|
13-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/lvds: Ensure panel is unlocked for Ironlake or the panel fitter
Commit 77d07fd9d73ef28689737c0952dbd5d6a5017743 introduced a regression
where by not waiting for the panel to be turned off, left the panel and
PLL registers locked across the modeset. Thus the panel remaining blank.
As pointed out by Daniel Vetter, when testing LVDS it helps to open the
laptop and look at the actual panel you are purporting to test.
A second issue with the patch was that in order to modify the panel
fitter before gen5, the pipe and the panel must have be completely
powered down. So we wait.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| ec5da01e23eec303dd313aa62b8ed4712c488437 |
|
12-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Use msleep instead of mdelay during wait_vblank_off
Avoid a potentially long busy-wait if we not in the process of
atomically switching to the kdb console.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 021357acc8ea85273a9882b3fe89935629f51b12 |
|
07-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Use the real FDI frequency for determining b/w
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| df0e924883d029a8651a2a0c7b8da67a07611ed2 |
|
09-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Make the connector->encoder relationship explicit
Currently we have a exact mapping of a connector onto an encoder for its
whole lifetime. Make this an explicit property of the structure and so
simplify the code.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_drv.h
|
| f875c15a4fbf37534dda30771d8bde8604fbbf09 |
|
09-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Use the direct mapping of pipe->crtc
Why iterate all the crtcs to find the pipe, when we already know which
crtc is attached to which pipe?
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_drv.h
|
| 4ef69c7a64b78d477d1666eba258ca049e8bac91 |
|
09-Sep-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Rename intel_encoder->enc to base for consistency
[Patch is slightly larger than is strictly necessary to fixup
surrounding checkpatch.pl errors.]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_drv.h
|
| 37811fcc9188f748407646e1157f3ed24ae181a4 |
|
25-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Show framebuffer info in debugfs
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| a95735569312f2ab0c80425e2cd1e5cb0b4e1870 |
|
22-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Refactor panel backlight controls
There were two instances of code to control the panel backlight and
neither handled the complete set of device variations.
Fixes:
Bug 29716 - [GM965] Regression: Backlight resets to minimum when changing resolution
https://bugs.freedesktop.org/show_bug.cgi?id=29716
And a bug on one of my PineView boxes which overflowed the backlight
value.
Incorporates part of a similar patch by Matthew Garrett that exposes a
native Intel backlight controller.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 23f09ce31ca68af3728ac5eed3e3efb03c5f990a |
|
12-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/overlay: Make the overlay control struct opaque.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_drv.h
|
| 5dcdbcb06badbdf2faa698bf3198e421a1e12840 |
|
12-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/overlay: Pass interruptible to switch_off()
During DPMS we currently do not want the overlay code to be
interruptible, so pass that information down and only take the
uninterrruptible paths.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_drv.h
|
| 8dfbc3403113bcc51f0350c3471fa1abf664305f |
|
12-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/overlay: Combine SWITCH_OFF into a single step
We can program the h/w to first wait on the flip and then switch off
without relying on s/w intervention. This removes the need for a double
step switch off, bringing much rejoicing.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_drv.h
|
| 9bb2ff731b32c023e7a502efdc0dee46157290d5 |
|
12-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/overlay: Explicitly pass regs from map to unmap
The scoping of the validity of the mapping is thus clarified.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_drv.h
|
| 722506f04dae7c88193dab2fc836ff15070190f0 |
|
12-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/overlay: Whitespace
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
/drivers/gpu/drm/i915/intel_drv.h
|
| 6c9547ff354d867318d78094aa8e9cf5218851e2 |
|
25-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915/sdvo: Preserve pixel-multiplier
Store the pixel-multiplier on the adjusted mode and avoid modifying the
requested mode.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 82d7c9e7da9fa11b8ed968c94a19c7732e11c1ad |
|
07-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Avoid using msleep under kdb and wait_for()
wait_for() uses msleep() to yield the cpu whilst spinning waiting for a
register to change. kdb asserts that mode changes are atomic and so
prohibits msleep. The alternative would be to use mdelay or to simply
probe the register more often instead of busy waiting.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 481b6af3d1f36d4a19bd36321c1e9f713db49aad |
|
23-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Drop the msleep parameter to wait_for()
Jesse's feedback from using the wait_for() macro was that the msleep
argument was that it was superfluous and made the macro more difficult
to use and to read. As the actually amount of time to sleep is not
critical, the crucial part is to sleep and let the processor schedule
something else whilst we wait for the event, replace the argument with a
hardcoded value.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/gpu/drm/i915/intel_drv.h
|
| 4e5359cd053bfb7d8dabe4a63624a5726848ffbc |
|
01-Sep-2010 |
Simon Farnsworth <simon.farnsworth@onelan.co.uk> |
drm/i915: Avoid pageflipping freeze when we miss the flip prepare interrupt
When we miss the flip prepare interrupt, we never get into the
software state needed to restart userspace, resulting in a freeze of a
full-screen OpenGL application (such as a compositor).
Work around this by checking DSPxSURF/DSPxBASE to see if the page flip
has actually happened. If it has, do the work we would have done when
the flip prepare interrupt comes in.
Also, add debugfs information to tell us what's going on (based on the
patch from Chris Wilson attached to bugs.fdo bug #29798).
Signed-off-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/drivers/gpu/drm/i915/intel_drv.h
|
| 9d0498a2bf7455159b317f19531a3e5db2ecc9c4 |
|
18-Aug-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: wait for actual vblank, not just 20ms
Waiting for a hard coded 20ms isn't always enough to make sure a vblank
period has actually occurred, so add code to make sure we really have
passed through a vblank period (or that the pipe is off when disabling).
This prevents problems with mode setting and link training, and seems to
fix a bug like https://bugs.freedesktop.org/show_bug.cgi?id=29278, but
on an HP 8440p instead. Hopefully also fixes
https://bugs.freedesktop.org/show_bug.cgi?id=29141.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 560b85bb750c3c539641993dd508b61260c9e874 |
|
07-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Only update i845/i865 CURBASE when disabled (v2)
The i845 and i865 have a peculiarlity in that CURBASE is not the trigger
for the vsync update of the cursor registers but instead the
modification of that register is prohibited whilst the cursor is
enabled. Reorder the write sequence for CURPOS, CURCNTR and CURBASE on
i845 to i865 to match.
v2: Remove the checks for i845/i865 from within i9xx_cursor_update()
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 913d8d110078788c14812dce8bb62c37946821d2 |
|
07-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Ensure that while(INREG()) are bounded (v2)
Add a new macro, wait_for, to simplify the act of waiting on a register
to change state. wait_for() takes three arguments, the condition to
inspect on every loop, the maximum amount of time to wait and whether to
yield the cpu for a length of time after each check.
v2: Upgrade failure messages to DRM_ERROR on the suggestion of
Eric Anholt. We do not expect to hit these conditions as they reflect
programming errors, so if we do we want to be notified.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 1d8e1c75ffa84400758aef9cc59298920b8801f9 |
|
07-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Enable aspect/centering panel fitting for Ironlake.
v2: Hook in DP paths to keep FULLSCREEN panel fitting on eDP.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 87f8ebf309b2df69b57be96bf36d2d61009fd296 |
|
04-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Disable the cursor for DPMS_OFF
The comments have long desired that we should switch off the cursor
along with the display plane, make it so.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 615fb93f6d99cce2ab36dcf09986e321e17c356f |
|
04-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Subclass intel_connector.
Make the code that tiny bit clearer by reducing the pointer dance.
2 files changed, 130 insertions(+), 147 deletions(-)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| ea5b213ad4b161463e76b63dbb115ea20e2200f0 |
|
04-Aug-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Subclass intel_encoder.
Subclass intel_encoder to reduce the pointer dance through
intel_encoder->dev_priv.
10 files changed, 896 insertions(+), 997 deletions(-)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| cda4b7d3a5b1dcbc0d8e7bad52134347798e9047 |
|
09-Jul-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Unset cursor if out-of-bounds upon mode change (v4)
The docs warn that to position the cursor such that no part of it is
visible on the pipe is an undefined operation. Avoid such circumstances
upon changing the mode, or at any other time, by unsetting the cursor if
it moves out of bounds.
"For normal high resolution display modes, the cursor must have at least a
single pixel positioned over the active screen.” (p143, p148 of the hardware
registers docs).
Fixes:
Bug 24748 - [965G] Graphics crashes when resolution is changed with KMS
enabled
https://bugs.freedesktop.org/show_bug.cgi?id=24748
v2: Only update the cursor registers if they change.
v3: Fix the unsigned comparision of x,y against width,height.
v4: Always set CUR.BASE or else the cursor may become corrupt.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reported-by: Christian Eggers <ceggers@gmx.de>
Cc: Christopher James Halse Rogers <chalserogers@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| cb0953d734348e8862d6d7edc666cfb3bf6d8fae |
|
16-Jul-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915: Initialize LVDS and eDP outputs before anything else
This makes them sort to the front in X, which makes them likely to be
the primary outputs if you haven't specified a preference in your DE,
which is likely to be what you want.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 2bd34f6ca86b5a5f9b749624f73310820e7a93fd |
|
02-Aug-2010 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/master' into drm-intel-next
This resolves the conflict in the EDP code, which has been rather
popular to hack on recently.
Conflicts:
drivers/gpu/drm/i915/intel_dp.c
|
| 36e83a187ca7517e9bdce7148b1c2c27661ef38f |
|
12-Jun-2010 |
Zhao Yakui <yakui.zhao@intel.com> |
drm/i915: Add the support of eDP on DP-D for Ibex/CPT
This one adds support for eDP that connected on PCH DP-D port
instead of CPU DP-A port, and only DP-D port could be used for eDP.
https://bugs.freedesktop.org/show_bug.cgi?id=27220
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Jan-Hendrik Zab <jan@jhz.name>
Tested-by: Templar <templar@rshc.de>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 127bd2ac91c3ecf42890ac320f4c65346d110e78 |
|
24-Jul-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
drm/i915: Use the correct scanout alignment for fbcon.
This fixes a potential modesetting error during boot with plymouth on
Broadwater and Crestline introduced with 9df47c. The framebuffer was
hard-coding an alignment of 64K, but the modesetting code required the
documented alignment of 128K. The result was that we would attempt to
unbind the pinned fbcon buffer, triggering an ERROR and ultimately
failing the mode change.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 1afe3e9d4335bf3bc5615e37243dc8fef65dac8f |
|
26-Mar-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: gen3 page flipping fixes
Gen3 chips have slightly different flip commands, and also contain a bit
that indicates whether a "flip pending" interrupt means the flip has
been queued or has been completed.
So implement support for the gen3 flip command, and make sure we use the
flip pending interrupt correctly depending on the value of ECOSKPD bit
0.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| eb1f8e4f3be898df808e2dfc131099f5831d491d |
|
07-May-2010 |
Dave Airlie <airlied@redhat.com> |
drm/fbdev: rework output polling to be back in the core. (v4)
After thinking it over a lot it made more sense for the core to deal with
the output polling especially so it can notify X.
v2: drop plans for fake connector - per Michel's comments - fix X patch sent to xorg-devel, add intel polled/hpd setting, add initial nouveau polled/hpd settings.
v3: add config lock take inside polling, add intel/nouveau poll init/fini calls
v4: config lock was a bit agressive, only needed around connector list reading.
otherwise it could re-enter.
glisse: discard drm_helper_hpd_irq_event
v3: Reviewed-by: Michel Dänzer <michel@daenzer.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 7fff400be6fbf64f10abca9939718aaf1d61c255 |
|
20-Apr-2010 |
Dave Airlie <airlied@redhat.com> |
Merge branch 'drm-fbdev-cleanup' into drm-core-next
* drm-fbdev-cleanup:
drm/fb: remove drm_fb_helper_setcolreg
drm/kms/fb: use slow work mechanism for normal hotplug also.
drm/kms/fb: add polling support for when nothing is connected.
drm/kms/fb: provide a 1024x768 fbcon if no outputs found.
drm/kms/fb: separate fbdev connector list from core drm connectors
drm/kms/fb: move to using fb helper crtc grouping instead of core crtc list
drm/fb: fix fbdev object model + cleanup properly.
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/nouveau/nouveau_drv.h
|
| 77ffb5979de59efd1a6b280b10d647b09285bee0 |
|
12-Apr-2010 |
Adam Jackson <ajax@redhat.com> |
drm/i915/pch: Use minimal number of FDI lanes (v2)
This should be a small power savings. Tested on Lenovo T410 (Ironlake), LVDS
VGA and DisplayPort, up to 1920x1200R.
v2: Add Sandybridge support, fix obvious math error.
Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 1f254ec2f1360202e2a024ce6b82df69fb14988f |
|
29-Mar-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: remove connector object in old output structure
As all display drivers have been converted, remove the left reference
for connector object in old structure.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 335af9a235a82842854b394507ab5e310d88be42 |
|
30-Mar-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: change intel_ddc_get_modes() function parameters
This one replaces original param for intel_ddc_get_modes() with
DRM connector and i2c bus adapter instead. With explicit params,
we won't require that a single driver structure must hold connector
and DDC bus reference, which ease the conversion to splitted encoder/
connector model.
It also clears up for some cases that we would steal other DDC bus
for mode probe, like VGA analog DDC probe for DVI-I. Also it fixed
a bug in old DVI-I probe handling, that failed to restore origin
analog GPIO port.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| c1c43977e6fc789cbde094303fa9ace629a35aca |
|
30-Mar-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: passing drm connector param for load detection
In load detection, connector's encoder assignment must be kept
consistent for proper mode setting, and this makes connector as
explicit parameter for load detect function to not require single
data structure to hold both encoder and connector reference, ease
the transition for splitted encoder/connector model.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| f1c79df3aa2eda4756ddfe976f2eb5aa6507a35a |
|
30-Mar-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: Add new helper to return current attached encoder for connector
For introducing splitted encoder/connector structure, this helper will return
connector's attached encoder when needed.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 5daa55eba7d7219616423c6955e90a8f196294a5 |
|
30-Mar-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: Add new 'intel_connector' structure
This adds new structure of intel_connector to present drm's
connector object, which is used to convert from origin single
output into encoder/connector model.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 4abe35204af82a018ca3ce6db4102aa09719698e |
|
30-Mar-2010 |
Dave Airlie <airlied@redhat.com> |
drm/kms/fb: use slow work mechanism for normal hotplug also.
a) slow work is always used now for any fbcon hotplug, as its not
a fast task and is more suited to being ran under slow work.
b) attempt to not do any fbdev changes when X is running as we'll
just mess it up. This hooks set_par to hopefully do the changes
once X hands control to fbdev.
This also adds the nouveau/intel hotplug support.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 386516744ba45d50f42c6999151cc210cb4f96e4 |
|
30-Mar-2010 |
Dave Airlie <airlied@redhat.com> |
drm/fb: fix fbdev object model + cleanup properly.
The fbdev layer in the kms code should act like a consumer of the kms services and avoid having relying on information being store in the kms core structures in order for it to work.
This patch
a) removes the info pointer/psuedo palette from the core drm_framebuffer structure and moves it to the fbdev helper layer, it also removes the core drm keeping a list of kernel kms fbdevs.
b) migrated all the fb helper functions out of the crtc helper file into the fb helper file.
c) pushed the fb probing/hotplug control into the driver
d) makes the surface sizes into a structure for ease of passing
This changes the intel/radeon/nouveau drivers to use the new helper.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 21d40d37eca86872f2bf0af995809ebdef25c9d9 |
|
25-Mar-2010 |
Eric Anholt <eric@anholt.net> |
drm/i915: Rename intel_output to intel_encoder.
The intel_output naming is inherited from the UMS code, which had a
structure of screen -> CRTC -> output. The DRM code has an additional
notion of encoder/connector, so the structure is screen -> CRTC ->
encoder -> connector. This is a useful structure for SDVO encoders
which can support multiple connectors (each of which requires
different programming in the one encoder and could be connected to
different CRTCs), or for DVI-I, where multiple encoders feed into the
connector for whether it's used for digital or analog. Most of our
code is encoder-related, so transition it to talking about encoders
before we start trying to distinguish connectors.
This patch is produced by sed s/intel_output/intel_encoder/ over the
driver.
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| f97108d1d0facc7902134ebc453b226bbd4d1cdb |
|
29-Jan-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add dynamic performance control support for Ironlake
Ironlake (and 965GM, which this patch doesn't support) supports a
hardware performance and power management feature that allows it to
adjust to changes in GPU load over time with software help. The goal
if this is to maximize performance/power for a given workload.
This patch enables that feature, which is also a requirement for
supporting Intelligent Power Sharing, a feature which allows for
dynamic budgeting of power between the CPU and GPU in Arrandale
platforms.
Tested-by: ykzhao <yakui.zhao@intel.com>
[anholt: Resolved against the irq handler loop removal]
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 7e8b60faea972604c315634cff62d44803731ea9 |
|
08-Nov-2009 |
Andrew Lutomirski <luto@mit.edu> |
drm/i915: restore render clock gating on resume
Rather than restoring just a few clock gating registers on resume,
just reinitialize the whole thing.
Signed-off-by: Andy Lutomirski <luto@mit.edu>
[anholt: Fixed up for RC6 support landed since the patch was written]
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| f0217c42c9ab3d772e543f635ce628b9478f70b6 |
|
01-Dec-2009 |
Eric Anholt <eric@anholt.net> |
drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.
This is a sync of a fix I made in the old UMS code. If the BIOS uses
the GMBUS and doesn't clear that setup, then our bit-banging I2C can
fail, leading to monitors not being detected.
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 6b95a207c1fd552e7d017837c5eaf1b0173a48c9 |
|
18-Nov-2009 |
Kristian Høgsberg <krh@bitplanet.net> |
drm/i915: Add intel implementation of the pageflip ioctl
Acked-by: Jakob Bornecrantz <jakob@vmware.com>
Acked-by: Thomas Hellström <thomas@shipmail.org>
Review-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jesse "Orange Smoothie" Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 03f77ea5972e6a2363152aec692744cac824daba |
|
15-Sep-2009 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/i915: implement interruptible sleeps in the overlay code
At least for the common case of userspace ioctls. When doing a
modeset operation, the wait is still uninterruptible. But considering
that failing to turn off the overlay when switching off the crtc it's
running on hangs the chip, it doesn't complicate matters _very_
much. There's just an unkillable X in addition to a black screen.
BUG() about it and explain in the code.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 5a5a0c64a99d7542c48c99d1a8bbb49e665842be |
|
15-Sep-2009 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/i915: implement fastpath for overlay flip waiting
As long as the gpu can keep up, neither the cpu (waiting for gpu)
nore the gpu (waiting for vblank to do an overlay flip) stalls.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 02e792fbaadb75dec8e476a05b610e49908fc6a4 |
|
15-Sep-2009 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/i915: implement drmmode overlay support v4
This implements intel overlay support for kms via a device-specific
ioctl. Thomas Hellstrom brought up the idea of a general ioctl (on
dri-devel). We've reached the conclusion that such an infrastructure
only makes sense when multiple kms overlay implementations exists,
which atm don't (and it doesn't look like this is gonna change).
Open issues:
- Runs in sync with the gpu, i.e. unnecessary waiting. I've decided
to wait on this because the hw tends to hang when changing something
in this area. I left some dummy functions as infrastructure.
- polyphase filtering uses a static table.
- uses uninterruptible sleeps. Unfortunately the alternatives may
unnecessarily wedged the hw if/when we timeout too early (and
userspace only overloaded the batch buffers with stuff worth a few
secs of gpu time).
Changes since v1:
- fix off-by-one misconception on my side. This fixes fullscreen
playback.
Changes since v2:
- add underrun detection as spec'ed for i965.
- flush caches properly, fixing visual corruptions.
Changes since v4:
- fix up cache flushing of overlay memory regs.
- killed require_pipe_a logic - it hangs the chip.
Tested-By: diego.abelenda@gmail.com (on a 865G)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[anholt: Resolved against the MADVISE ioctl going in before this one]
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| c1176d6f03e1085797ce83648a2c76ae15a2b515 |
|
08-Oct-2009 |
Dave Airlie <airlied@redhat.com> |
Merge branch 'drm-next' of ../drm-next into drm-linus
conflict in radeon since new init path merged with vga arb code.
Conflicts:
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/radeon_device.c
|
| b8c00ac5b50b54491657f8b6740db1df50149944 |
|
06-Oct-2009 |
Dave Airlie <airlied@redhat.com> |
drm/fb: add more correct 8/16/24/32 bpp fb support.
The previous patches had some unwanted side effects, I've fixed
the lack of 32bpp working, and fixed up 16bpp so it should also work.
this also adds the interface to allow the driver to set a preferred
console depth so for example low memory rn50 can set it to 8bpp.
It also catches 24bpp on cards that can't do it and forces 32bpp.
Tested on r100/r600/i945.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 94e0fb086fc5663c38bbc0fe86d698be8314f82f |
|
24-Sep-2009 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (57 commits)
drm/i915: Handle ERESTARTSYS during page fault
drm/i915: Warn before mmaping a purgeable buffer.
drm/i915: Track purged state.
drm/i915: Remove eviction debug spam
drm/i915: Immediately discard any backing storage for uneeded objects
drm/i915: Do not mis-classify clean objects as purgeable
drm/i915: Whitespace correction for madv
drm/i915: BUG_ON page refleak during unbind
drm/i915: Search harder for a reusable object
drm/i915: Clean up evict from list.
drm/i915: Add tracepoints
drm/i915: framebuffer compression for GM45+
drm/i915: split display functions by chip type
drm/i915: Skip the sanity checks if the current relocation is valid
drm/i915: Check that the relocation points to within the target
drm/i915: correct FBC update when pipe base update occurs
drm/i915: blacklist Acer AspireOne lid status
ACPI: make ACPI button funcs no-ops if not built in
drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocks
drm/i915: intel_display.c handle latency variable efficiently
...
Fix up trivial conflicts in drivers/gpu/drm/i915/{i915_dma.c|i915_drv.h}
|
| 44040f107e64d689ccd3211ac62c6bc44f3f0775 |
|
21-Sep-2009 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (133 commits)
drm/vgaarb: add VGA arbitration support to the drm and kms.
drm/radeon: some r420s have a CP race with the DMA engine.
drm/radeon/r600/kms: rv670 is not DCE3
drm/radeon/kms: r420 idle after programming GA_ENHANCE
drm/radeon/kms: more fixes to rv770 suspend/resume path.
drm/radeon/kms: more alignment for rv770.c with r600.c
drm/radeon/kms: rv770 blit init called too late.
drm/radeon/kms: move around new init path code to avoid posting at init
drm/radeon/r600: fix some issues with suspend/resume.
drm/radeon/kms: disable VGA rendering engine before taking over VRAM
drm/radeon/kms: Move radeon_get_clock_info() call out of radeon_clocks_init().
drm/radeon/kms: add initial connector properties
drm/radeon/kms: Use surfaces for scanout / cursor byte swapping on big endian.
drm/radeon/kms: don't fail if we fail to init GPU acceleration
drm/r600/kms: fixup number of loops per blit calculation.
drm/radeon/kms: reprogram format in set base.
drm/radeon: avivo chips have no separate int bit for display
drm/radeon/r600: don't do interrupts
drm: fix _DRM_GEM addmap error message
drm: update crtc x/y when only fb changes
...
Fixed up trivial conflicts in firmware/Makefile due to network driver
(cxgb3) and drm (mga/r128/radeon) firmware being listed next to each
other.
|
| 28d520433b6375740990ab99d69b0d0067fd656b |
|
21-Sep-2009 |
Dave Airlie <airlied@redhat.com> |
drm/vgaarb: add VGA arbitration support to the drm and kms.
VGA arb requires DRM support for non-kms drivers, to turn on/off
irqs when disabling the mem/io regions.
VGA arb requires KMS support for GPUs where we can turn off VGA
decoding. Currently we know how to do this for intel and radeon
kms drivers, which allows them to be removed from the arbiter.
This patch comes from Fedora rawhide kernel.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 8082400327d8d2ca54254b593644942bed0edd25 |
|
11-Sep-2009 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: framebuffer compression for pre-GM45
This patch adds framebuffer compression (good for about ~0.5W power
savings in the best case) support for pre-GM45 chips. GM45+ have a new,
more flexible FBC scheme that will be added in a separate patch.
FBC can't always be enabled: the compressed buffer must be physically
contiguous and reside in stolen space. So if you have a large display
and a small amount of stolen memory, you may not be able to take
advantage of FBC. In some cases, a BIOS setting controls how much
stolen space is available. Increasing this to 8 or 16M can help.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 7c8460db30dfd085ef3837c8fb02ecf2e718b983 |
|
08-Sep-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: fix mask bits setting
eDP is exclusive connector too, and add missing crtc_mask
setting for TV.
This fixes
http://bugzilla.kernel.org/show_bug.cgi?id=14139
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reported-and-tested-by: Carlos R. Mafra <crmafra2@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
/drivers/gpu/drm/i915/intel_drv.h
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| 11670d3c93210793562748d83502ecbef4034765 |
|
07-Sep-2009 |
Dave Airlie <airlied@redhat.com> |
Merge intel drm-intel-next branch
Merge remote branch 'anholt/drm-intel-next' of ../anholt-2.6 into drm-next
Conflicts:
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_sdvo.c
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| 652c393a3368af84359da37c45afc35a91144960 |
|
17-Aug-2009 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: add dynamic clock frequency control
There are several sources of unnecessary power consumption on Intel
graphics systems. The first is the LVDS clock. TFTs don't suffer from
persistence issues like CRTs, and so we can reduce the LVDS refresh rate
when the screen is idle. It will be automatically upclocked when
userspace triggers graphical activity. Beyond that, we can enable memory
self refresh. This allows the memory to go into a lower power state when
the graphics are idle. Finally, we can drop some clocks on the gpu
itself. All of these things can be reenabled between frames when GPU
activity is triggered, and so there should be no user visible graphical
changes.
Signed-off-by: Jesse Barnes <jesse.barnes@intel.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
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| 785b93ef8c309730c2de84ce9c229e40e2d01480 |
|
28-Aug-2009 |
Dave Airlie <airlied@redhat.com> |
drm/kms: move driver specific fb common code to helper functions (v2)
Initially I always meant this code to be shared, but things
ran away from me before I got to it.
This refactors the i915 and radeon kms fbdev interaction layers
out into generic helpers + driver specific pieces.
It moves all the panic/sysrq enhancements to the core file,
and stores a linked list of kernel fbs. This could possibly be
improved to only store the fb which has fbcon on it for panics
etc.
radeon retains some specific codes used for a big endian
workaround.
changes:
fix oops in v1
fix freeing path for crtc_info
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
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| f8aed700c6ec46ddade6570004ce25332283b306 |
|
24-Aug-2009 |
Ma Ling <ling.ma@intel.com> |
drm/i915: Set crtc/clone mask in different output devices
Based on Bspec each encoder has different sharing pipe property,
i.e. Integrated or SDVO TV both will occupy one pipe exclusively,
and sdvo-non-tv and crt are allowed to share one. The patch moves
sharing judgment into differnet output functions, and sets the right
clone bit.
This fixes both HDMI outputs choosing the same pipe.
https://bugs.freedesktop.org/show_bug.cgi?id=22247
Signed-off-by: Ma Ling <ling.ma@intel.com>
Reviewed-by : Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
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| 32f9d658aee5be09ebdd28fc730630e61d0b46db |
|
23-Jul-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
drm/i915: Add eDP support on IGDNG mobile chip
This adds embedded DisplayPort support on next mobile chip which
aims to replace origin LVDS port. VBT's driver feature block has
been used to determine the type of current internal panel for eDP
or LVDS.
Currently no panel fitting support for eDP and backlight control
would be added in future.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
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| a4fc5ed69817c73e32571ad7837bb707f9890009 |
|
08-Apr-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: Add Display Port support
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
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| c31c4ba3437d98efa19710e30d694a1cfdf87aa5 |
|
06-May-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: add per-output hotplug callback for KMS
This allows each output to deal with plug/unplug events as needed.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
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| f9c10a9b96a31b4a82a4fa807400c04f00284068 |
|
30-May-2009 |
Keith Packard <keithp@keithp.com> |
drm/i915: Change I2C api to pass around i2c_adapters
The existing API passed around intel_i2c_chan pointers, which are dependent
on the i2c bit-banging algo. This precluded the driver from using outputs
which use a different algo. Switching to the more general i2c_adpater allows
the driver to support non bit-banging DDC.
This also required moving the slave address into the output private
structures.
Signed-off-by: Keith Packard <keithp@keithp.com>
/drivers/gpu/drm/i915/intel_drv.h
|
| 08d7b3d1edff84bd673d9e9ab36b5aa62e1ba903 |
|
29-Apr-2009 |
Carl Worth <cworth@cworth.org> |
drm/i915: Add new GET_PIPE_FROM_CRTC_ID ioctl.
This allows userlevel code to discover the pipe number corresponding
to a given CRTC ID. This is necessary for doing pipe-specific
operations such as waiting for vblank on a given CRTC. Failure to use
the right pipe mapping can result in GPU hangs, or at least failure
to actually sync to vblank.
Signed-off-by: Carl Worth <cworth@cworth.org>
[anholt: Style touchups from review]
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| 0ba0e9e1f173a59ba402a253d356612c821b7a14 |
|
07-Apr-2009 |
Shaohua Li <shaohua.li@intel.com> |
drm/i915: workaround IGD i2c bus issue in kernel side (v2)
In IGD, DPCUNIT_CLOCK_GATE_DISABLE bit should be set, otherwise i2c
access will be wrong.
v2: Disable CLOCK_GATE_DISABLE bit after bit bashing as suggested by Eric.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/drivers/gpu/drm/i915/intel_drv.h
|
| e2f0ba97d60e59fe5c6237851933a9c38a8f9a24 |
|
03-Feb-2009 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
drm/i915: sync SDVO code with stable userland modesetting driver
Pull in an update from the 2D driver (hopefully the last one, future work
should be done here and pulled back into xf86-video-intel as needed).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
/drivers/gpu/drm/i915/intel_drv.h
|
| 7d57382e65994ab7d01741373bd1c420370aed9f |
|
02-Jan-2009 |
Eric Anholt <eric@anholt.net> |
drm/i915: Add support for integrated HDMI on G4X hardware.
This is ported directly from the userland 2D driver code. The HDMI audio bits
aren't hooked up yet.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
/drivers/gpu/drm/i915/intel_drv.h
|
| 3f8bc370ac679a5fe5c098f30d3cf8e80f62a9f8 |
|
18-Dec-2008 |
Kristian Høgsberg <krh@redhat.com> |
drm/i915: Pin cursor bo and unpin old bo when setting cursor.
We also didn't track the cursor bo before and would leak a reference
when the cursor image was change.
Signed-off-by: Kristian Høgsberg <krh@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
/drivers/gpu/drm/i915/intel_drv.h
|
| 79e539453b34e35f39299a899d263b0a1f1670bd |
|
07-Nov-2008 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/i915/intel_drv.h
|