| 6b7746e8768e1c550b320d5af761f73e5aa37f76 |
|
20-Feb-2012 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: properly set accel working flag and bailout when false
If accel is not working many subsystem such as the ib pool might not be
initialized properly that can lead to segfault inside kernel when cs
ioctl is call with non working acceleration. To avoid this make sure
the accel working flag is false when an error in GPU startup happen and
return EBUSY from cs ioctl if accel is not working.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 721604a15b934f0a8d1909acb8017f029128be2f |
|
06-Jan-2012 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: GPU virtual memory support v22
Virtual address space are per drm client (opener of /dev/drm).
Client are in charge of virtual address space, they need to
map bo into it by calling DRM_RADEON_GEM_VA ioctl.
First 16M of virtual address space is reserved by the kernel.
Once using 2 level page table we should be able to have a small
vram memory footprint for each pt (there would be one pt for all
gart, one for all vram and then one first level for each virtual
address space).
Plan include using the sub allocator for a common vm page table
area and using memcpy to copy vm page table in & out. Or use
a gart object and copy things in & out using dma.
v2: agd5f fixes:
- Add vram base offset for vram pages. The GPU physical address of a
vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete
cards and the physical bus address of the stolen memory on
integrated chips.
- VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1
v3: agd5f:
- integrate with the semaphore/multi-ring stuff
v4:
- rebase on top ttm dma & multi-ring stuff
- userspace is now in charge of the address space
- no more specific cs vm ioctl, instead cs ioctl has a new
chunk
v5:
- properly handle mem == NULL case from move_notify callback
- fix the vm cleanup path
v6:
- fix update of page table to only happen on valid mem placement
v7:
- add tlb flush for each vm context
- add flags to define mapping property (readable, writeable, snooped)
- make ring id implicit from ib->fence->ring, up to each asic callback
to then do ring specific scheduling if vm ib scheduling function
v8:
- add query for ib limit and kernel reserved virtual space
- rename vm->size to max_pfn (maximum number of page)
- update gem_va ioctl to also allow unmap operation
- bump kernel version to allow userspace to query for vm support
v9:
- rebuild page table only when bind and incrementaly depending
on bo referenced by cs and that have been moved
- allow virtual address space to grow
- use sa allocator for vram page table
- return invalid when querying vm limit on non cayman GPU
- dump vm fault register on lockup
v10: agd5f:
- Move the vm schedule_ib callback to a standalone function, remove
the callback and use the existing ib_execute callback for VM IBs.
v11:
- rebase on top of lastest Linus
v12: agd5f:
- remove spurious backslash
- set IB vm_id to 0 in radeon_ib_get()
v13: agd5f:
- fix handling of RADEON_CHUNK_ID_FLAGS
v14:
- fix va destruction
- fix suspend resume
- forbid bo to have several different va in same vm
v15:
- rebase
v16:
- cleanup left over of vm init/fini
v17: agd5f:
- cs checker
v18: agd5f:
- reworks the CS ioctl to better support multiple rings and
VM. Rather than adding a new chunk id for VM, just re-use the
IB chunk id and add a new flags for VM mode. Also define additional
dwords for the flags chunk id to define the what ring we want to use
(gfx, compute, uvd, etc.) and the priority.
v19:
- fix cs fini in weird case of no ib
- semi working flush fix for ni
- rebase on top of sa allocator changes
v20: agd5f:
- further CS ioctl cleanups from Christian's comments
v21: agd5f:
- integrate CS checker improvements
v22: agd5f:
- final cleanups for release, only allow VM CS on cayman
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| b15ba51207e54245409d6f46e20dab36f906eed1 |
|
15-Nov-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: introduce a sub allocator and convert ib pool to it v4
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 30eb77f4e6ba20f797af4ff79807fae7cb67429e |
|
20-Nov-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: precompute fence cpu/gpu addr once v3
Add a start fence driver helper function which will be call
once for each ring and will compute cpu/gpu addr for fence
depending on wether to use wb buffer or scratch reg.
This patch replace initialize fence driver separately which
was broken in regard of GPU lockup. The fence list for created,
emited, signaled must be initialize once and only from the
asic init callback not from the startup call back which is
call from the gpu reset.
v2: With this in place we no longer need to know the number of
rings in fence_driver_init, also writing to the scratch reg
before knowing its offset is a bad idea.
v3: rebase on top of change to previous patch in the serie
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| e32eb50dbe43862606a51caa94368ec6bd019434 |
|
23-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: rename struct radeon_cp to radeon_ring
That naming seems to make more sense, since we not
only want to run PM4 rings with it.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| bf85279958da96cb4b11aac89b34f0424c3c120e |
|
13-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make cp variable an array
Replace cp, cp1 and cp2 members with just an array
of radeon_cp structs.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 7b1f2485db253aaa0081e1c5213533e166130732 |
|
23-Sep-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make all functions work with multiple rings.
Give all asic and radeon_ring_* functions a
radeon_cp parameter, so they know the ring to work with.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 7465280c076d6440e5908c158c83b542dc063a30 |
|
25-Aug-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add support for multiple fence queues v2
For supporting multiple CP ring buffers, async DMA
engines and UVD. We still need a way to synchronize
between engines.
v2 initialize unused fence driver ring to avoid issue in
suspend/unload
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| e70f224c1938af208b64b02c5cec27889fefcaec |
|
25-Oct-2011 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: add a CS ioctl flag not to rewrite tiling flags in the CS
This adds a new optional chunk to the CS ioctl that specifies optional flags
to the CS parser. Why this is useful is explained below. Note that some regs
no longer need the NOP relocation packet if this feature is enabled.
Tested on r300g and r600g with this flag disabled and enabled.
Assume there are two contexts sharing the same mipmapped tiled texture.
One context wants to render into the first mipmap and the other one
wants to render into the last mipmap. As you probably know, the hardware
has a MACRO_SWITCH feature, which turns off macro tiling for small mipmaps,
but that only applies to samplers.
(at least on r300-r500, though later hardware likely behaves the same)
So we want to just re-set the tiling flags before rendering (writing
packets), right? ... No. The contexts run in parallel, so they may
set the tiling flags simultaneously and then fire their command streams
also simultaneously. The last one setting the flags wins, the other one
loses.
Another problem is when one context wants to render into the first and
the last mipmap in one CS. Impossible. It must flush before changing
tiling flags and do the rendering into the smaller mipmaps in another CS.
Yet another problem is that writing copy_blit in userspace would be a mess
involving re-setting tiling flags to please the kernel, and causing races
with other contexts at the same time.
The only way out of this is to send tiling flags with each CS, ideally
with each relocation. But we already do that through the registers.
So let's just use what we have in the registers.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| c9a1be96277b3b2d2e8aff2ba69d7817ea8e46c9 |
|
03-Nov-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: consolidate GART code, fix segfault after GPU lockup V2
After GPU lockup VRAM gart table is unpinned and thus its pointer
becomes unvalid. This patch move the unpin code to a common helper
function and set pointer to NULL so that page update code can check
if it should update GPU page table or not. That way bo still bound
to GART can be unbound (pci_unmap_page for all there page) properly
while there is no need to update the GPU page table.
V2 move the test for null gart out of the loop, small optimization
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| fcf4de5acf09889e3f0c131ebe385c983006d71b |
|
31-Aug-2011 |
Tormod Volden <debian.tormod@gmail.com> |
drm/radeon: Print gart initialization details on all chipsets
This was previously done for r300 only. Use %016llX instead of %08X for
printing the table address.
Also fix typos in gart warning messages.
Signed-off-by: Tormod Volden <debian.tormod@gmail.com>
Reviewed-by: Michel Dänzer <michel@daenzer.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 25985edcedea6396277003854657b5f3cb31a628 |
|
31-Mar-2011 |
Lucas De Marchi <lucas.demarchi@profusion.mobi> |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
/drivers/gpu/drm/radeon/r300.c
|
| e16b396ce314b2bcdfe6c173fe075bf8e3432368 |
|
18-Mar-2011 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (47 commits)
doc: CONFIG_UNEVICTABLE_LRU doesn't exist anymore
Update cpuset info & webiste for cgroups
dcdbas: force SMI to happen when expected
arch/arm/Kconfig: remove one to many l's in the word.
asm-generic/user.h: Fix spelling in comment
drm: fix printk typo 'sracth'
Remove one to many n's in a word
Documentation/filesystems/romfs.txt: fixing link to genromfs
drivers:scsi Change printk typo initate -> initiate
serial, pch uart: Remove duplicate inclusion of linux/pci.h header
fs/eventpoll.c: fix spelling
mm: Fix out-of-date comments which refers non-existent functions
drm: Fix printk typo 'failled'
coh901318.c: Change initate to initiate.
mbox-db5500.c Change initate to initiate.
edac: correct i82975x error-info reported
edac: correct i82975x mci initialisation
edac: correct commented info
fs: update comments to point correct document
target: remove duplicate include of target/target_core_device.h from drivers/target/target_core_hba.c
...
Trivial conflict in fs/eventpoll.c (spelling vs addition)
|
| ec4f2ac471e25d3e0cea05abb8da34c05a0868f9 |
|
28-Jan-2011 |
Paul Bolle <pebolle@tiscali.nl> |
drm: Fix printk typo 'failled'
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
/drivers/gpu/drm/radeon/r300.c
|
| 16e4b8a6e44b8c736c37af370afaa428c3239fb6 |
|
16-Feb-2011 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: do not reject X16 and Y16X16 floating-point formats on r300
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| fff1ce4dc6113b6fdc4e3a815ca5fd229408f8ef |
|
14-Feb-2011 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: check AA resolve registers on r300
This is an important security fix because we allowed arbitrary values
to be passed to AARESOLVE_OFFSET. This also puts the right buffer address
in the register.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 501834349e872ed4115eea3beef65ca9eeb5528e |
|
14-Feb-2011 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: fix tracking of BLENDCNTL, COLOR_CHANNEL_MASK, and GB_Z on r300
Also move ZB_DEPTHCLEARVALUE to the list of safe regs.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 40b4a7599d5555b408e594f4c8dae8015ccaae8f |
|
12-Feb-2011 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: optimize CS state checking for r100->r500
The colorbuffer, zbuffer, and texture states are checked only once when
they get changed. This improves performance in the apps which emit
lots of draw packets and few state changes.
This drops performance in glxgears by a 1% or so, but glxgears is not
a benchmark we care about.
The time spent in the kernel when running Torcs dropped from 33% to 23%
and the frame rate is higher, which is a good thing.
r600 might need something like this as well.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| d75ee3be44380040b9d2c7925298dc52e049768d |
|
25-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: clean up some magic numbers
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
/drivers/gpu/drm/radeon/r300.c
|
| 25b2ec5b643c9ea784e5a51e5e9602cd536965f2 |
|
11-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: balance asic_reset functions
First, we were calling mc_stop() at the top of the function
which turns off all MC (memory controller) clients,
then checking if the GPU is idle. If it was idle we
returned without re-enabling the MC clients which would
lead to a blank screen, etc. This patch checks if the
GPU is idle before calling mc_stop().
Second, if the reset failed, we were returning without
re-enabling the MC clients. This patch re-enables
the MC clients before returning regardless of whether
the reset was successful or not.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 3313e3d4333ccbf8bd7c816775cfe9aca623bd8a |
|
07-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add pcie get/set lane support for r6xx/r7xx/evergreen
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 9eba4a93ce520a627e876b0d1851d4f78a701c2b |
|
05-Jan-2011 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: manage r300 CMASK RAM access and allow CMASK clear
The CMASK RAM is for colorbuffer compression (used in conjunction
with MSAA). Only one user (filp) can access it.
The CMASK RAM access is managed in the same way as Hyper-Z, but there is
a separate ioctl, because an app that uses MSAA does not necessarily
have to use zbuffering.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 204663c48711ddceee09df46269cd34d49d1f7be |
|
21-Dec-2010 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: add ARGB2101010 colorbuffer support for r500
This should be part of DRM 2.8.0.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| fce7d61be01ad7606056608be08fef15b70eeb84 |
|
30-Oct-2010 |
Joe Perches <joe@perches.com> |
drivers/gpu/drm: Update WARN uses
Coalesce long formats.
Align arguments.
Add missing newlines.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 724c80e1d630296d1324859e964d80d35007d83c |
|
28-Aug-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: enable writeback (v2)
When writeback is enabled, the GPU shadows writes to certain
registers into a buffer in memory. The driver can then read
the values from the shadow rather than reading back from the
register across the bus. Writeback can be disabled by setting
the no_wb module param to 1.
On r6xx/r7xx/evergreen, the following registers are shadowed:
- CP scratch registers
- CP read pointer
- IH write pointer
On r1xx-rr5xx, the following registers are shadowed:
- CP scratch registers
- CP read pointer
v2:
- Combine wb patches for r6xx-evergreen and r1xx-r5xx
- Writeback is disabled on AGP boards since it tends to be
unreliable on AGP using the gart.
- Check radeon_wb_init return values properly.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| ab9e1f5966591dc3e811418e96ba04f284c52458 |
|
13-Jul-2010 |
Dave Airlie <airlied@redhat.com> |
drm/radeon: add basic zmask/hiz support (v4)
This interface allows userspace to request hyperz support, it probably
needs more locking, and really reporting that you can have hyperz is racy
since someone else might get it before you do.
v2: modify so we pass 0 valued packets to let DDX/r300c keep working.
also fixed incorrect 0x4f1c reference.
v3: fixup zb_bw_cntl so older drivers keep working
v4: add locking, fixup SC_HYPERZ_EN - patch stream to disable hiz
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| d656ae53f64cb0f01dac8a02c4d31453d64ef97c |
|
02-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'v2.6.35-rc6' into drm-radeon-next
Need this to avoid conflicts with future radeon fixes
|
| 4c712e6c7ef19e7e8e1f38b27bb65290def39b40 |
|
14-Jul-2010 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: check/restore sanity before doing anything else with GPU.
On systems using kexec, the new kernel is booted straight from the old kernel, without any warning to the graphics driver. So the GPU is basically left as-is in a running state, however the CPU side is completly reset.
Without stating the saneness of anyone using kexec on live systems, we should at least try not to crash the GPU. This patch resets 3 registers to 0 that could cause bad things to happen to the running system.
This allows kexec to work on a Power6/RN50 system.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| bbb642f9c9a43dbe45ffe14935397a2a34100263 |
|
16-Jul-2010 |
Kulikov Vasiliy <segooon@gmail.com> |
drm: radeon: check kzalloc() result
If kzalloc() fails exit with -ENOMEM.
Signed-off-by: Kulikov Vasiliy <segooon@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 8d369bb196f1f9111cb7ab839d4f420378fa7b30 |
|
15-Jul-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: fix gtt MC base alignment on rs4xx/rs690/rs740 asics
The asics in question have the following requirements with regard to
their gart setups:
1. The GART aperture size has to be in the form of 2^X bytes, where X is from 25 to 31
2. The GART aperture MC base has to be aligned to a boundary equal to the size of the
aperture.
3. The GART page table has to be aligned to the boundary equal to the size of the table.
4. The GART page table size is: table_entry_size * (aperture_size / page_size)
5. The GART page table has to be allocated in non-paged, non-cached, contiguous system
memory.
This patch takes care 2. The rest should already be handled properly.
This fixes a regression noticed by: Torsten Kaiser <just.for.lkml@googlemail.com>
Tested-by: Torsten Kaiser <just.for.lkml@googlemail.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| f9da52d54eb0e8822b5e7f32ab1cfa6522533d6e |
|
12-Jun-2010 |
Roland Scheidegger <sroland@vmware.com> |
drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx
fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=28459
agd5f: apply to r1xx/r2xx as well.
Signed-off-by: Roland Scheidegger <sroland@vmware.com>
Cc: stable@kernel.org
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 05ea893c46805b2981ea8ba6df881e3d65edd63b |
|
19-May-2010 |
Dave Airlie <airlied@redhat.com> |
Merge remote branch 'anholt/drm-intel-next' into drm-next
* anholt/drm-intel-next: (515 commits)
drm/i915: Fix out of tree builds
drm/i915: move fence lru to struct drm_i915_fence_reg
drm/i915: don't allow tiling changes on pinned buffers v2
drm/i915: Be extra careful about A/D matching for multifunction SDVO
drm/i915: Fix DDC bus selection for multifunction SDVO
drm/i915: cleanup mode setting before unmapping registers
drm/i915: Make fbc control wrapper functions
drm/i915: Wait for the GPU whilst shrinking, if truly desperate.
drm/i915: Use spatio-temporal dithering on PCH
[MTD] Remove zero-length files mtdbdi.c and internal.ho
pata_pcmcia / ide-cs: Fix bad hashes for Transcend and kingston IDs
libata: Fix several inaccuracies in developer's guide
slub: Fix bad boundary check in init_kmem_cache_nodes()
raid6: fix recovery performance regression
KEYS: call_sbin_request_key() must write lock keyrings before modifying them
KEYS: Use RCU dereference wrappers in keyring key type code
KEYS: find_keyring_by_name() can gain access to a freed keyring
ALSA: hda: Fix 0 dB for Packard Bell models using Conexant CX20549 (Venice)
ALSA: hda - Add quirk for Dell Inspiron 19T using a Conexant CX20582
ALSA: take tu->qlock with irqs disabled
...
|
| ce8f53709bf440100cb9d31b1303291551cf517f |
|
07-May-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/pm: rework power management
- Separate dynpm and profile based power management methods. You can select the pm method
by echoing the selected method ("dynpm" or "profile") to power_method in sysfs.
- Expose basic 4 profile in profile method
"default" - default clocks
"auto" - select between low and high based on ac/dc state
"low" - DC, low power mode
"high" - AC, performance mode
The current base profile is "default", but it should switched to "auto" once we've tested
on more systems. Switching the state is a matter of echoing the requested profile to
power_profile in sysfs. The lowest power states are selected automatically when dpms turns
the monitors off in all states but default.
- Remove dynamic fence-based reclocking for the moment. We can revisit this later once we
have basic pm in.
- Move pm init/fini to modesetting path. pm is tightly coupled with display state. Make sure
display side is initialized before pm.
- Add pm suspend/resume functions to make sure pm state is properly reinitialized on resume.
- Remove dynpm module option. It's now selectable via sysfs.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 34dc4d4423dc342848d72be764832cbc0852854a |
|
07-May-2010 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/master' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/radeon/r300.c
The BSD ringbuffer support that is landing in this branch
significantly conflicts with the Ironlake PIPE_CONTROL fix on master,
and requires it to be tested successfully anyway.
|
| 7ebd467551ed6ae200d7835a84bbda0dcadaa511 |
|
05-May-2010 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
drm/radeon/kms/legacy: only enable load detection property on DVI-I
drm/radeon/kms: fix panel scaling adjusted mode setup
drivers/gpu/drm/drm_sysfs.c: sysfs files error handling
drivers/gpu/drm/radeon/radeon_atombios.c: range check issues
gpu: vga_switcheroo, fix lock imbalance
drivers/gpu/drm/drm_memory.c: fix check for end of loop
drivers/gpu/drm/via/via_video.c: fix off by one issue
drm/radeon/kms/agp The wrong AGP chipset can cause a NULL pointer dereference
drm/radeon/kms: r300 fix CS checker to allow zbuffer-only fastfill
|
| 797fd5b9dad12a100c81b5782573a41259728cb1 |
|
13-Apr-2010 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: r300 fix CS checker to allow zbuffer-only fastfill
Signed-off-by: Marek Olšák <maraeo@gmail.com>
/drivers/gpu/drm/radeon/r300.c
|
| 0bfb82449c9c98a8cfb1f0f886b5b0c7f7b0ff1a |
|
27-Apr-2010 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
drm/radeon: Fix sparc regression in r300_scratch()
drm: make sure vblank interrupts are disabled at DPMS time
drm/radeon/kms/evergreen: No EnableYUV table
drm/radeon: 9800 SE has only one quadpipe
drm/radeon/kms: don't print error for legal crtcs.
drm/radeon/kms/evergreen: fix LUT setup
|
| a1e9ada3e148dc300fdd25705bd3ac024897dc68 |
|
26-Apr-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: R3XX-R4XX fix GPU reset code
Previous reset code leaded to computer hard lockup (need to unplug
the power too reboot the computer) on various configuration. This
patch change the reset code to avoid hard lockup. The GPU reset
is failing most of the time but at least user can log in remotely
or properly shutdown the computer.
Two issues were leading to hard lockup :
- Writting to the scratch register lead to hard lockup most likely
because the write back mecanism is in fuzy state after GPU lockup.
- Resetting the GPU memory controller and not reinitializing it
after leaded to hard lockup. We did only reinitialize in case of
successfull reset thus unsuccessfull reset quickly leaded to hard
lockup.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 94f7bf647315472c80b8368c849739038e5620a3 |
|
22-Apr-2010 |
Tormod Volden <debian.tormod@gmail.com> |
drm/radeon: 9800 SE has only one quadpipe
Although these cards have 2 pipelines on the silicon only
the first passed the QA and the other should be disabled.
http://www.digital-daily.com/video/ati-radeon9800se/
http://www.rojakpot.com/showarticle.aspx?artno=101&pgno=1
agd5f: add some other SE cards as well; fix up kms
Signed-off-by: Tormod Volden <debian.tormod@gmail.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
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| 0bcb1d844ac638a4c4280f697d5bfac9791e9a70 |
|
20-Apr-2010 |
Dave Airlie <airlied@redhat.com> |
Merge branch 'drm-radeon-lockup' into drm-core-next
* drm-radeon-lockup:
drm/radeon/kms: simplify & improve GPU reset V2
drm/radeon/kms: rename gpu_reset to asic_reset
drm/radeon/kms: fence cleanup + more reliable GPU lockup detection V4
Conflicts:
drivers/gpu/drm/radeon/r300.c
|
| 73c6c7fbb74d07a80fee41ce4ca3976547519e42 |
|
19-Apr-2010 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
drm/radeon/kms: add FireMV 2400 PCI ID.
drm/radeon/kms: allow R500 regs VAP_ALT_NUM_VERTICES and VAP_INDEX_OFFSET
drivers/gpu/radeon: Add MSPOS regs to safe list.
drm/radeon/kms: disable the tv encoder when tv/cv is not in use
drm/radeon/kms: adjust pll settings for tv
drm/radeon/kms: fix tv dac conflict resolver
drm/radeon/kms/evergreen: don't enable hdmi audio stuff
drm/radeon/kms/atom: fix dual-link DVI on DCE3.2/4.0
drm/radeon/kms: fix rs600 tlb flush
drm/radeon/kms: print GPU family and device id when loading
drm/radeon/kms: fix calculation of mipmapped 3D texture sizes
drm/radeon/kms: only change mode when coherent value changes.
drm/radeon/kms: more atom parser fixes (v2)
|
| cae94b0ad9d147152af77b971a7234faf20027a9 |
|
21-Feb-2010 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: allow R500 regs VAP_ALT_NUM_VERTICES and VAP_INDEX_OFFSET
[airlied: fix V_A_N_V to not be safe and fix check to make sure only r500
- bump userspace version]
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 2f10ffcfb28beb35137d9e86992c771b4a6c5f2a |
|
09-Apr-2010 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (29 commits)
drm/nouveau: bail out of auxch transaction if we repeatedly recieve defers
drm/nv50: implement gpio set/get routines
drm/nv50: parse/use some more de-magiced parts of gpio table entries
drm/nouveau: store raw gpio table entry in bios gpio structs
drm/nv40: Init some tiling-related PGRAPH state.
drm/nv50: Add NVA3 support in ctxprog/ctxvals generator.
drm/nv50: another dodgy DP hack
drm/nv50: punt hotplug irq handling out to workqueue
drm/nv50: preserve an unknown SOR_MODECTRL value for DP encoders
drm/nv50: Allow using the NVA3 new compute class.
drm/nv50: cleanup properly if PDISPLAY init fails
drm/nouveau: fixup the init failure paths some more
drm/nv50: fix instmem init on IGPs if stolen mem crosses 4GiB mark
drm/nv40: add LVDS table quirk for Dell Latitude D620
drm/nv40: rework lvds table parsing
drm/nouveau: detect vram amount once, and save the value
drm/nouveau: remove some unused members from drm_nouveau_private
drm/nouveau: Make use of TTM busy_placements.
drm/nv50: add more 0x100c80 flushy magic
drm/nv50: fix fbcon when framebuffer above 4GiB mark
...
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| 90aca4d2740255bd130ea71a91530b9920c70abe |
|
09-Mar-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: simplify & improve GPU reset V2
This simplify and improve GPU reset for R1XX-R6XX hw, it's
not 100% reliable here are result:
- R1XX/R2XX works bunch of time in a row, sometimes it
seems it can work indifinitly
- R3XX/R3XX the most unreliable one, sometimes you will be
able to reset few times, sometimes not even once
- R5XX more reliable than previous hw, seems to work most
of the times but once in a while it fails for no obvious
reasons (same status than previous reset just no same
happy ending)
- R6XX/R7XX are lot more reliable with this patch, still
it seems that it can fail after a bunch (reset every
2sec for 3hour bring down the GPU & computer)
This have been tested on various hw, for some odd reasons
i wasn't able to lockup RS480/RS690 (while they use to
love locking up).
Note that on R1XX-R5XX the cursor will disapear after
lockup haven't checked why, switch to console and back
to X will restore cursor.
Next step is to record the bogus command that leaded to
the lockup.
V2 Fix r6xx resume path to avoid reinitializing blit
module, use the gpu_lockup boolean to avoid entering
inifinite waiting loop on fence while reiniting the GPU
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| a2d07b7438f015a0349bc9af3c96a8164549bbc5 |
|
09-Mar-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: rename gpu_reset to asic_reset
Patch rename gpu_reset to asic_reset in prevision of having
gpu_reset doing more stuff than just basic asic reset.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 225758d8ba4fdcc1e8c9cf617fd89529bd4a9596 |
|
09-Mar-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: fence cleanup + more reliable GPU lockup detection V4
This patch cleanup the fence code, it drops the timeout field of
fence as the time to complete each IB is unpredictable and shouldn't
be bound.
The fence cleanup lead to GPU lockup detection improvement, this
patch introduce a callback, allowing to do asic specific test for
lockup detection. In this patch the CP is use as a first indicator
of GPU lockup. If CP doesn't make progress during 1second we assume
we are facing a GPU lockup.
To avoid overhead of testing GPU lockup frequently due to fence
taking time to be signaled we query the lockup callback every
500msec. There is plenty code comment explaining the design & choise
inside the code.
This have been tested mostly on R3XX/R5XX hw, in normal running
destkop (compiz firefox, quake3 running) the lockup callback wasn't
call once (1 hour session). Also tested with forcing GPU lockup and
lockup was reported after the 1s CP activity timeout.
V2 switch to 500ms timeout so GPU lockup get call at least 2 times
in less than 2sec.
V3 store last jiffies in fence struct so on ERESTART, EBUSY we keep
track of how long we already wait for a given fence
V4 make sure we got up to date cp read pointer so we don't have
false positive
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 57b54ea6b7863ccfeb41851b5f58f9fd1b83c79e |
|
02-Apr-2010 |
Michel Dänzer <daenzer@vmware.com> |
drm/radeon: R300 AD only has one quad pipe.
Gleaned from the Mesa code.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=27355 .
Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 336f5899d287f06d8329e208fc14ce50f7ec9698 |
|
05-Apr-2010 |
Tejun Heo <tj@kernel.org> |
Merge branch 'master' into export-slabh
|
| f9274562026558ab54a29331cf13e9ebec8cc890 |
|
17-Mar-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: avoid possible oops (call gart_fini before gart_disable)
radeon_gart_fini might call GART unbind callback function which
might try to access GART table but if gart_disable is call first
the GART table will be unmapped so any access to it will oops.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| f47299c55a837af1727bc601e1fc0fa33adaeda5 |
|
17-Mar-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: display watermark fixes
- rs780/880 were using the wrong bandwidth functions
- convert r1xx-r4xx to use the same pm sclk/mclk structs as
r5xx+
- move bandwidth setup to a common function
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 29fb52ca78b4e265ec6c626b0c7b2927953949cf |
|
11-Mar-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: expose thermal/fan i2c buses
Look up i2c bus in the power table and expose it.
You'll need to load a hwmon driver for any chips
on the bus, this patch just exposes the bus.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/drivers/gpu/drm/radeon/r300.c
|
| 5a0e3ad6af8660be21ca98a971cd00f331318c05 |
|
24-Mar-2010 |
Tejun Heo <tj@kernel.org> |
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
/drivers/gpu/drm/radeon/r300.c
|
| e6990375ef4ec449994991034238f1ffab8a3a1a |
|
11-Mar-2010 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
drm/radeon: include radeon_asic.h in the asic specific files
In essence this creates a home for all asic specific declarations in
radeon_asic.h
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 939461d59d6ac4e5142f767d24810c9b4b5caa38 |
|
14-Feb-2010 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: add support for square microtiles on r3xx-r5xx
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| aa5120d2ef228042416d3023fb7eda9ee487dcf9 |
|
18-Feb-2010 |
Rafał Miłecki <zajec5@gmail.com> |
drm/radeon/kms: implement reading active PCIE lanes on R600+
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 8e36113082821980c60ce89a6c5d45fc9492fc26 |
|
18-Feb-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: fix R3XX/R4XX memory controller initialization
Version 2 of memory controller did break the initialization for
R3XX/R4XX hardware. This patch fix it.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| d594e46ace22afa1621254f6f669e65430048153 |
|
17-Feb-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: simplify memory controller setup V2
Get rid of _location and use _start/_end also simplify the
computation of vram_start|end & gtt_start|end. For R1XX-R2XX
we place VRAM at the same address of PCI aperture, those GPU
shouldn't have much memory and seems to behave better when
setup that way. For R3XX and newer we place VRAM at 0. For
R6XX-R7XX AGP we place VRAM before or after AGP aperture this
might limit to limit the VRAM size but it's very unlikely.
For IGP we don't change the VRAM placement.
Tested on (compiz,quake3,suspend/resume):
PCI/PCIE:RV280,R420,RV515,RV570,RV610,RV710
AGP:RV100,RV280,R420,RV350,RV620(RPB*),RV730
IGP:RS480(RPB*),RS690,RS780(RPB*),RS880
RPB: resume previously broken
V2 correct commit message to reflect more accurately the bug
and move VRAM placement to 0 for most of the GPU to avoid
limiting VRAM.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 44ca7478d46aaad488d916f7262253e000ee60f9 |
|
11-Feb-2010 |
Pauli Nieminen <suokkos@gmail.com> |
drm/radeon: Add asic hook for dma copy to r200 cards.
r200 cards have dma engine which can be used to tranfer data
between vram and system memory.
r300 dma engine registers match r200 dma engine. Enabling
dma copy for r200 is simple as hooking r200 asic to already
existing function r300_copy_dma.
Rename r300_dma_copy to r200_dma_copyto reflect that supports
starts from r200 cards.
v2: Created a new asic object for r200 cards.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 82568565683b4991964a5fc89a9ca0c7122818e8 |
|
05-Feb-2010 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: set gart pages to invalid on unbind and point to dummy page
this uses a new entrypoint to invalidate gart entries instead of using 0.
Changed to rather than pointing to 0 address point empty entry to dummy
page. This might help to avoid hard lockup if for some wrong
reasons GPU try to access unmapped GART entry.
I'm not 100% sure this is going to work, we probably need to allocate
a dummy page and point all the GTT entries at it similiar to what AGP does.
but we can test this first I suppose.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| c836a4126768cd76af9ee33b3c11f57695d5fda6 |
|
23-Dec-2009 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add functions to get current pcie lanes
Currently unused.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 4612dc97991a09e1a9e4d5d981e16589d7cb150c |
|
05-Feb-2010 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: clean up some low-hanging magic numbers
Switch some magic numbers to their proper defines.
The register header madness needs to be cleaned up
at some point.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 5ff55717674470b96562f931f778c878080755b7 |
|
05-Feb-2010 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: fix r300 vram width calculations
This was incorrect according to the docs and the UMS driver does
it like this.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 655efd3dc92cd0d37292157178d33deb0430aeaa |
|
02-Feb-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: don't call suspend path before cleaning up GPU
In suspend path we unmap the GART table while in cleaning up
path we will unbind buffer and thus try to write to unmapped
GART leading to oops. In order to avoid this we don't call the
suspend path in cleanup path. Cleanup path is clever enough
to desactive GPU like the suspend path is doing, thus this was
redondant.
Tested on: RV370, R420, RV515, RV570, RV610, RV770 (all PCIE)
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| d0269ed8580b492df75dafb011dc51a1390bf200 |
|
07-Jan-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Make sure we release AGP device if we acquired it
In some case we weren't releasing the AGP device at module unloading.
This leaded to unfunctional AGP at next module load. This patch make
sure we release the AGP bus if we acquire it.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| cafe6609d6dc0a6a278f9fdbb59ce4d761a35ddd |
|
07-Jan-2010 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Schedule host path read cache flush through the ring V2
R300 family will hard lockup if host path read cache flush is
done through MMIO to HOST_PATH_CNTL. But scheduling same flush
through ring seems harmless. This patch remove the hdp_flush
callback and add a flush after each fence emission which means
a flush after each IB schedule. Thus we should have same behavior
without the hard lockup.
Tested on R100,R200,R300,R400,R500,R600,R700 family.
V2: Adjust fence counts in r600_blit_prepare_copy()
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 512889f450c1851d9e3628f1894b9b64b0701eac |
|
19-Dec-2009 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: add 3DC compression support
There are 2 formats:
ATI1N: 64 bits per 4x4 block, one-channel format
ATI2N: 128 bits per 4x4 block, two-channel format
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 46c64d4bfa01cda7d58c514164f8b127ab6741b7 |
|
17-Dec-2009 |
Marek Olšák <maraeo@gmail.com> |
drm/radeon/kms: allow rendering while no colorbuffer is set on r300
Because hardware cannot disable all colorbuffers directly to do depth-only
rendering, a user should:
- disable reading from a colorbuffer in blending
- disable fastfill
- set the color channel mask to 0 to prevent writing to a colorbuffer
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| d785d78bbdb53580b12c40e820af5a3281ce2fc8 |
|
07-Dec-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: fix r100->r500 CS checker for compressed textures. (v2)
This adds support for compressed textures to the r100->r500 CS
checker, it lets me run openarena and the demos in mesa fine.
Thanks to Maciej Cencora for initial comments.
Changes since v1:
fix calculations with Maciej formulas
Reviewed-by: Maciej Cencora <m.cencora@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 6e7267721fd67d626433ea10c59fc232c6928259 |
|
15-Dec-2009 |
Maciej Cencora <m.cencora@gmail.com> |
drm/radeon/kms: allow for texture tiling
This adds the relocations for texture tiling for KMS.
Signed-off-by: Maciej Cencora <m.cencora@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 6234077d6bad4db25d516743b6723c1b26505341 |
|
15-Dec-2009 |
Rafał Miłecki <zajec5@gmail.com> |
drm/radeon/kms: init pm on all chipsets
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 550e2d9270e2f0a10c3b063899f70e4cca25fe72 |
|
09-Dec-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: restore surface registers on resume.
On resume on my rv530 laptop surface cntl was left disabled, so
wierd stuff would happen with rendering to a tiled front buffer.
This checks if the surface regs are assigned to bos and reprograms
the surface registers on resume using the same path that clears
them all on init.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 92cde00cbaf3236ef7ea9bd4f0b43c8c4a3f507f |
|
04-Dec-2009 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/legacy: set common regs to sane value
The DDX and radeonfb always set these regs to a sane value.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 4c7886791264f03428d5424befb1b96f08fc90f4 |
|
20-Nov-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Rework radeon object handling
The locking & protection of radeon object was somewhat messy.
This patch completely rework it to now use ttm reserve as a
protection for the radeon object structure member. It also
shrink down the various radeon object structure by removing
field which were redondant with the ttm information. Last it
converts few simple functions to inline which should with
performances.
airlied: rebase on top of r600 and other changes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 1614f8b17b8cc3ad143541d41569623d30dbc9ec |
|
01-Dec-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add irq mitigation code for sw interrupt.
We really don't need to process every irq that comes in, we only
really want to do SW irq processing when we are actually waiting for
a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems
so it needs some testing.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 72542d77058bd45ccafd1e15ed3c70349fe3277b |
|
01-Dec-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: ignore unposted GPUs with no BIOS.
If we find a GPU but we can't find its BIOS and it isn't posted,
then ignore it.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 17e15b0c719b5ec0b344d3ebe3787b48315a0218 |
|
05-Nov-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: AGP systems need PCI bus mastering enabled
We might not hit this yet, but when if we do any sort of writeback
we really need to enable PCI bus mastering on these systems from
what I can see.
This enables PCI BM on all radeons that require it.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| a77f171843d466d4af0d527bcb2d314fafa8afd7 |
|
14-Oct-2009 |
Matt Turner <mattst88@gmail.com> |
drm/radeon/kms: use RADEON_GPU_PAGE_SIZE instead of 4096
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 62a8ea3f7bb61e5f92db0a648b7cc566852c36ec |
|
01-Oct-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Remove old init path as no hw use it anymore
This remove old init path and allow code cleanup, now all hw
use the new init path, see top of radeon.h for description of
this.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 207bf9e90cd40f91d4662127b8ae3b64e6b101c4 |
|
30-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert R300 to new init path
Also cleanup register specific to R300.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| ca6ffc64cba0cdd0a2b3fcad0e1d19edcf277ccc |
|
01-Oct-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: Convert RS400/RS480 to new init path & fix legacy VGA (V3)
Also cleanup register specific to RS400/RS480. This patch also fix
legacy VGA register used to disable VGA access we were programming
wrong register. Now we should properly disable VGA on r100 up to
rs400 asics. Note that RS400/RS480 resume is broken, it hangs the
computer while reprogramming dynamic clock, doesn't work either
without that patch. We need to spend more time investigating this
issue. Version 2 of the patch remove dead code that was left
commented out in the previous version. Version 3 correct the
placement on IGP of the VRAM inside GPU address space to match the
stollen RAM placement of IGP.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 513bcb4655e68706594e45dfa1d4b181500110ba |
|
23-Sep-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: don't require up to 64k allocations. (v2)
This avoids needing to do a kmalloc > PAGE_SIZE for the main
indirect buffer chunk, it adds an accessor for all reads from
the chunk and caches a single page at a time for subsequent
reads.
changes since v1:
Use a two page pool which should be the most common case
a single packet spanning > PAGE_SIZE will be hit, but I'm
having trouble seeing anywhere we currently generate anything like that.
hopefully proper short page copying at end
added parser_error flag to set deep errors instead of having to test
every ib value fetch.
fixed bug in patch that went to list.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 4aac047323e3082d0866b8ad3784236632105af4 |
|
14-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: clear confusion in GART init/deinit path
GART static one time initialization was mixed up with GART
enabling/disabling which could happen several time for instance
during suspend/resume cycles. This patch splits all GART
handling into 4 differents function. gart_init is for one
time initialization, gart_deinit is called upon module unload
to free resources allocated by gart_init, gart_enable enable
the GART and is intented to be call after first initialization
and at each resume cycle or reset cycle. Finaly gart_disable
stop the GART and is intended to be call at suspend time or
when unloading the module.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 21f9a437222e92adb3abc68584a5f04801b92739 |
|
11-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: cleanup - remove radeon_share.h
radeon_share.h was begining to give problem with include order in
respect of radeon.h. It's easier and also i think cleaner to move
what was in radeon_share.h into radeon.h. At the same time use the
extern keyword for function shared accross the module.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 9f022ddfb23793b475ff7e57ac08a766dd5d31bd |
|
11-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: convert r4xx to new init path
This convert r4xx to new init path it also fix few bugs.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| c000273ebc830c27b8c9e03d5f4c147d3e310f48 |
|
10-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: R3XX/R4XX AGP asic use PCI GART not PCIE GART
R3XX/R4XX AGP asic use the old PCI GART block, not the new PCIE GART.
Make sure we pick the right GART when disabling AGP.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 3ce0a23d2d253185df24e22e3d5f89800bb3dd1c |
|
08-Sep-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: add r600 KMS support
This adds the r600 KMS + CS support to the Linux kernel.
The r600 TTM support is quite basic and still needs more
work esp around using interrupts, but the polled fencing
should work okay for now.
Also currently TTM is using memcpy to do VRAM moves,
the code is here to use a 3D blit to do this, but
isn't fully debugged yet.
Authors:
Alex Deucher <alexdeucher@gmail.com>
Dave Airlie <airlied@redhat.com>
Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 551ebd837c75fc75df81811a18b7136c39cab487 |
|
01-Sep-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add rn50/r100/r200 CS tracker.
This adds the command stream checker for the RN50, R100 and R200 cards.
It stops any access to 3D registers on RN50, and does checks
on buffer sizes on the r100/r200 cards. It also fixes some texture
sizing checks on r300.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 11670d3c93210793562748d83502ecbef4034765 |
|
07-Sep-2009 |
Dave Airlie <airlied@redhat.com> |
Merge intel drm-intel-next branch
Merge remote branch 'anholt/drm-intel-next' of ../anholt-2.6 into drm-next
Conflicts:
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_sdvo.c
|
| f779b3e513478218cbaaaa0a506d7801cab6fd14 |
|
20-Aug-2009 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon: add GET_PARAM/INFO support for Z pipes
Needed for occlusion queries on rv530 chips.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 50f153036c9d9e4ae1768d5ca9c2ad4184f7a0b7 |
|
21-Aug-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: generate the safe register tables.
Previously we just made these offline and included them,
but no reason we can't generate them at build time.
TODO: add rs690 + r100/r200 when done.
should we do rs480/rs690 no tcl version?
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| de1b28989edff519d0548ebaa3f94fd3d1524cf2 |
|
12-Aug-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: cut down indirects in register accesses.
We really don't want to be doing all these indirects, updating
the GPU gart table is something we do often so the less overhead the
better.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 3f8befec95d5c1bbc6e247e1a5dafa82519530f9 |
|
15-Aug-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add rv530 R300_SU_REG_DEST + reloc for ZPASS_ADDR
These are needed for Occulsion Query support.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| c93bb85b5cba3e3a06f2cad8e9bc5c23d3d10aac |
|
13-Jul-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: fix bandwidth computation on avivo hardware
Fix bandwidth computation and crtc priority in memory controller
so that crtc memory request are fullfill in time to avoid display
artifact.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| e024e11070a0a0dc7163ce1ec2da354a638bdbed |
|
24-Jun-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: add initial colortiling support.
This adds new set/get tiling interfaces where the pitch
and macro/micro tiling enables can be set. Along with
a flag to decide if this object should have a surface when mapped.
The only thing we need to allocate with a mapped surface should be
the frontbuffer. Note rotate scanout shouldn't require one, and
back/depth shouldn't either, though mesa needs some fixes.
It fixes the TTM interfaces along Thomas's suggestions, and I've tested
the surface stealing code with two X servers and not seen any lockdep issues.
I've stopped tiling the fbcon frontbuffer, as I don't see there being
any advantage other than testing, I've left the testing commands in there,
just flip the fb_tiled to true in radeon_fb.c
Open: Can we integrate endian swapping in with this?
Future features:
texture tiling - need to relocate texture registers TXOFFSET* with tiling info.
This also merges Michel's cleanup surfaces regs at init time patch
even though it makes sense on its own, this patch really relies on it.
Some PowerMac firmwares set up a tiling surface at the beginning of VRAM
which messes us up otherwise.
that patch is:
Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 2a0f8918fc34713ecaeb900ffb9afa61df4cb08e |
|
10-Jul-2009 |
Dave Airlie <airlied@linux.ie> |
drm/radeon/kms: fix VRAM sizing like DDX does it.
Doing this like the DDX seems like the most sure fire way to avoid
having to reinvent it slowly and painfully. At the moment we keep
getting things wrong with aper vs vram, so we know the DDX does it right.
booted on PCI r100, PCIE rv370, IGP rs400.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 77bd36f014bc5a3f28507a4e86a81b2b3d2439c3 |
|
10-Jul-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: don't swap PCIEGART PTEs in VRAM.
On powerpc, since we aren't using any hw swappers, this will
get flipped around by default in hw.
tested on a G5 + rv515.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 531369e62649bb8f31217cc0bf33ee6f89f1dff6 |
|
29-Jun-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon: fix support for vline relocations.
Userspace sends us a special relocation type to sync video/exa
to vlines to avoid tearing, this deals with the relocation
in the kernel, it picks the correct crtc and avoids issues
where crtcs are disabled.
This version also parses the wait until to make sure it isn't
trying to do anything evil.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| ed10f95d60d41033d356fdcf88c240d7065bd5b4 |
|
29-Jun-2009 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: fix some GART table entry bugs.
1. rv370 can accept 40-bit addresses - also at 24-bit shift not 4 bits
2. rs480 table can be in 40-bit space. - 4 bit shift for top 8 bits
3. rs480 table entries can be in 40-bit space.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 068a117ca38f27c9641db7642f24fe9270d9424e |
|
17-Jun-2009 |
Jerome Glisse <glisse@freedesktop.org> |
drm/radeon: command stream checker for r3xx-r5xx hardware
For security purpose we want to make sure the userspace process doesn't
access memory beyond buffer it owns. To achieve this we need to check
states the userspace program. For color buffer and zbuffer we check that
the clipping register will discard access beyond buffers set as color
or zbuffer. For vertex buffer we check that no vertex fetch will happen
beyond buffer end. For texture we check various texture states (number
of mipmap level, texture size, texture depth, ...) to compute the amount
of memory the texture fetcher might access.
The command stream checking impact the performances so far quick benchmark
shows an average of 3% decrease in fps of various applications. It can
be optimized a bit more by caching result of checking and thus avoid a
full recheck if no states changed since last check.
Note that this patch is still incomplete on checking side as it doesn't
check 2d rendering states.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
|
| 771fe6b912fca54f03e8a72eb63058b582775362 |
|
05-Jun-2009 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: introduce kernel modesetting for radeon hardware
Add kernel modesetting support to radeon driver, use the ttm memory
manager to manage memory and DRM/GEM to provide userspace API.
In order to avoid backward compatibility issue and to allow clean
design and code the radeon kernel modesetting use different code path
than old radeon/drm driver.
When kernel modesetting is enabled the IOCTL of radeon/drm
driver are considered as invalid and an error message is printed
in the log and they return failure.
KMS enabled userspace will use new API to talk with the radeon/drm
driver. The new API provide functions to create/destroy/share/mmap
buffer object which are then managed by the kernel memory manager
(here TTM). In order to submit command to the GPU the userspace
provide a buffer holding the command stream, along this buffer
userspace have to provide a list of buffer object used by the
command stream. The kernel radeon driver will then place buffer
in GPU accessible memory and will update command stream to reflect
the position of the different buffers.
The kernel will also perform security check on command stream
provided by the user, we want to catch and forbid any illegal use
of the GPU such as DMA into random system memory or into memory
not owned by the process supplying the command stream. This part
of the code is still incomplete and this why we propose that patch
as a staging driver addition, future security might forbid current
experimental userspace to run.
This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX
(radeon up to X1950). Works is underway to provide support for R6XX,
R7XX and newer hardware (radeon from HD2XXX to HD4XXX).
Authors:
Jerome Glisse <jglisse@redhat.com>
Dave Airlie <airlied@redhat.com>
Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/drivers/gpu/drm/radeon/r300.c
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