Searched refs:txqaddr (Results 1 - 2 of 2) sorted by relevance

/drivers/net/ethernet/marvell/
H A Dsky2.c146 static const unsigned txqaddr[] = { Q_XA1, Q_XA2 }; variable
1589 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
1688 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1695 sky2_qset(hw, txqaddr[port]);
1699 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1704 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
1706 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1976 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
2055 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
2059 sky2_write32(hw, Y2_QADDR(txqaddr[por
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H A Dskge.c119 static const int txqaddr[] = { Q_XA1, Q_XA2 }; variable
2595 skge_ramset(hw, txqaddr[port], ram_addr+chunk, chunk);
2596 skge_qset(skge, txqaddr[port], skge->tx_ring.to_use);
2671 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP);
2672 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
2685 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET);
2686 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
2803 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START);
2862 skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_STOP);
3115 skge_write8(skge->hw, Q_ADDR(txqaddr[skg
[all...]

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