1/* 2 * mISDNisar.c ISAR (Siemens PSB 7110) specific functions 3 * 4 * Author Karsten Keil (keil@isdn4linux.de) 5 * 6 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 21 */ 22 23/* define this to enable static debug messages, if you kernel supports 24 * dynamic debugging, you should use debugfs for this 25 */ 26/* #define DEBUG */ 27 28#include <linux/gfp.h> 29#include <linux/delay.h> 30#include <linux/vmalloc.h> 31#include <linux/mISDNhw.h> 32#include <linux/module.h> 33#include "isar.h" 34 35#define ISAR_REV "2.1" 36 37MODULE_AUTHOR("Karsten Keil"); 38MODULE_LICENSE("GPL v2"); 39MODULE_VERSION(ISAR_REV); 40 41#define DEBUG_HW_FIRMWARE_FIFO 0x10000 42 43static const u8 faxmodulation_s[] = "3,24,48,72,73,74,96,97,98,121,122,145,146"; 44static const u8 faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121, 45 122, 145, 146}; 46#define FAXMODCNT 13 47 48static void isar_setup(struct isar_hw *); 49 50static inline int 51waitforHIA(struct isar_hw *isar, int timeout) 52{ 53 int t = timeout; 54 u8 val = isar->read_reg(isar->hw, ISAR_HIA); 55 56 while ((val & 1) && t) { 57 udelay(1); 58 t--; 59 val = isar->read_reg(isar->hw, ISAR_HIA); 60 } 61 pr_debug("%s: HIA after %dus\n", isar->name, timeout - t); 62 return timeout; 63} 64 65/* 66 * send msg to ISAR mailbox 67 * if msg is NULL use isar->buf 68 */ 69static int 70send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg) 71{ 72 if (!waitforHIA(isar, 1000)) 73 return 0; 74 pr_debug("send_mbox(%02x,%02x,%d)\n", his, creg, len); 75 isar->write_reg(isar->hw, ISAR_CTRL_H, creg); 76 isar->write_reg(isar->hw, ISAR_CTRL_L, len); 77 isar->write_reg(isar->hw, ISAR_WADR, 0); 78 if (!msg) 79 msg = isar->buf; 80 if (msg && len) { 81 isar->write_fifo(isar->hw, ISAR_MBOX, msg, len); 82 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { 83 int l = 0; 84 85 while (l < (int)len) { 86 hex_dump_to_buffer(msg + l, len - l, 32, 1, 87 isar->log, 256, 1); 88 pr_debug("%s: %s %02x: %s\n", isar->name, 89 __func__, l, isar->log); 90 l += 32; 91 } 92 } 93 } 94 isar->write_reg(isar->hw, ISAR_HIS, his); 95 waitforHIA(isar, 1000); 96 return 1; 97} 98 99/* 100 * receive message from ISAR mailbox 101 * if msg is NULL use isar->buf 102 */ 103static void 104rcv_mbox(struct isar_hw *isar, u8 *msg) 105{ 106 if (!msg) 107 msg = isar->buf; 108 isar->write_reg(isar->hw, ISAR_RADR, 0); 109 if (msg && isar->clsb) { 110 isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb); 111 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { 112 int l = 0; 113 114 while (l < (int)isar->clsb) { 115 hex_dump_to_buffer(msg + l, isar->clsb - l, 32, 116 1, isar->log, 256, 1); 117 pr_debug("%s: %s %02x: %s\n", isar->name, 118 __func__, l, isar->log); 119 l += 32; 120 } 121 } 122 } 123 isar->write_reg(isar->hw, ISAR_IIA, 0); 124} 125 126static inline void 127get_irq_infos(struct isar_hw *isar) 128{ 129 isar->iis = isar->read_reg(isar->hw, ISAR_IIS); 130 isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H); 131 isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L); 132 pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name, 133 isar->iis, isar->cmsb, isar->clsb); 134} 135 136/* 137 * poll answer message from ISAR mailbox 138 * should be used only with ISAR IRQs disabled before DSP was started 139 * 140 */ 141static int 142poll_mbox(struct isar_hw *isar, int maxdelay) 143{ 144 int t = maxdelay; 145 u8 irq; 146 147 irq = isar->read_reg(isar->hw, ISAR_IRQBIT); 148 while (t && !(irq & ISAR_IRQSTA)) { 149 udelay(1); 150 t--; 151 } 152 if (t) { 153 get_irq_infos(isar); 154 rcv_mbox(isar, NULL); 155 } 156 pr_debug("%s: pulled %d bytes after %d us\n", 157 isar->name, isar->clsb, maxdelay - t); 158 return t; 159} 160 161static int 162ISARVersion(struct isar_hw *isar) 163{ 164 int ver; 165 166 /* disable ISAR IRQ */ 167 isar->write_reg(isar->hw, ISAR_IRQBIT, 0); 168 isar->buf[0] = ISAR_MSG_HWVER; 169 isar->buf[1] = 0; 170 isar->buf[2] = 1; 171 if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL)) 172 return -1; 173 if (!poll_mbox(isar, 1000)) 174 return -2; 175 if (isar->iis == ISAR_IIS_VNR) { 176 if (isar->clsb == 1) { 177 ver = isar->buf[0] & 0xf; 178 return ver; 179 } 180 return -3; 181 } 182 return -4; 183} 184 185static int 186load_firmware(struct isar_hw *isar, const u8 *buf, int size) 187{ 188 u32 saved_debug = isar->ch[0].bch.debug; 189 int ret, cnt; 190 u8 nom, noc; 191 u16 left, val, *sp = (u16 *)buf; 192 u8 *mp; 193 u_long flags; 194 195 struct { 196 u16 sadr; 197 u16 len; 198 u16 d_key; 199 } blk_head; 200 201 if (1 != isar->version) { 202 pr_err("%s: ISAR wrong version %d firmware download aborted\n", 203 isar->name, isar->version); 204 return -EINVAL; 205 } 206 if (!(saved_debug & DEBUG_HW_FIRMWARE_FIFO)) 207 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO; 208 pr_debug("%s: load firmware %d words (%d bytes)\n", 209 isar->name, size/2, size); 210 cnt = 0; 211 size /= 2; 212 /* disable ISAR IRQ */ 213 spin_lock_irqsave(isar->hwlock, flags); 214 isar->write_reg(isar->hw, ISAR_IRQBIT, 0); 215 spin_unlock_irqrestore(isar->hwlock, flags); 216 while (cnt < size) { 217 blk_head.sadr = le16_to_cpu(*sp++); 218 blk_head.len = le16_to_cpu(*sp++); 219 blk_head.d_key = le16_to_cpu(*sp++); 220 cnt += 3; 221 pr_debug("ISAR firmware block (%#x,%d,%#x)\n", 222 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff); 223 left = blk_head.len; 224 if (cnt + left > size) { 225 pr_info("%s: firmware error have %d need %d words\n", 226 isar->name, size, cnt + left); 227 ret = -EINVAL; 228 goto reterrflg; 229 } 230 spin_lock_irqsave(isar->hwlock, flags); 231 if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff, 232 0, NULL)) { 233 pr_info("ISAR send_mbox dkey failed\n"); 234 ret = -ETIME; 235 goto reterror; 236 } 237 if (!poll_mbox(isar, 1000)) { 238 pr_warning("ISAR poll_mbox dkey failed\n"); 239 ret = -ETIME; 240 goto reterror; 241 } 242 spin_unlock_irqrestore(isar->hwlock, flags); 243 if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) { 244 pr_info("ISAR wrong dkey response (%x,%x,%x)\n", 245 isar->iis, isar->cmsb, isar->clsb); 246 ret = 1; 247 goto reterrflg; 248 } 249 while (left > 0) { 250 if (left > 126) 251 noc = 126; 252 else 253 noc = left; 254 nom = (2 * noc) + 3; 255 mp = isar->buf; 256 /* the ISAR is big endian */ 257 *mp++ = blk_head.sadr >> 8; 258 *mp++ = blk_head.sadr & 0xFF; 259 left -= noc; 260 cnt += noc; 261 *mp++ = noc; 262 pr_debug("%s: load %3d words at %04x\n", isar->name, 263 noc, blk_head.sadr); 264 blk_head.sadr += noc; 265 while (noc) { 266 val = le16_to_cpu(*sp++); 267 *mp++ = val >> 8; 268 *mp++ = val & 0xFF; 269 noc--; 270 } 271 spin_lock_irqsave(isar->hwlock, flags); 272 if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) { 273 pr_info("ISAR send_mbox prog failed\n"); 274 ret = -ETIME; 275 goto reterror; 276 } 277 if (!poll_mbox(isar, 1000)) { 278 pr_info("ISAR poll_mbox prog failed\n"); 279 ret = -ETIME; 280 goto reterror; 281 } 282 spin_unlock_irqrestore(isar->hwlock, flags); 283 if ((isar->iis != ISAR_IIS_FIRM) || 284 isar->cmsb || isar->clsb) { 285 pr_info("ISAR wrong prog response (%x,%x,%x)\n", 286 isar->iis, isar->cmsb, isar->clsb); 287 ret = -EIO; 288 goto reterrflg; 289 } 290 } 291 pr_debug("%s: ISAR firmware block %d words loaded\n", 292 isar->name, blk_head.len); 293 } 294 isar->ch[0].bch.debug = saved_debug; 295 /* 10ms delay */ 296 cnt = 10; 297 while (cnt--) 298 mdelay(1); 299 isar->buf[0] = 0xff; 300 isar->buf[1] = 0xfe; 301 isar->bstat = 0; 302 spin_lock_irqsave(isar->hwlock, flags); 303 if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) { 304 pr_info("ISAR send_mbox start dsp failed\n"); 305 ret = -ETIME; 306 goto reterror; 307 } 308 if (!poll_mbox(isar, 1000)) { 309 pr_info("ISAR poll_mbox start dsp failed\n"); 310 ret = -ETIME; 311 goto reterror; 312 } 313 if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) { 314 pr_info("ISAR wrong start dsp response (%x,%x,%x)\n", 315 isar->iis, isar->cmsb, isar->clsb); 316 ret = -EIO; 317 goto reterror; 318 } else 319 pr_debug("%s: ISAR start dsp success\n", isar->name); 320 321 /* NORMAL mode entered */ 322 /* Enable IRQs of ISAR */ 323 isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA); 324 spin_unlock_irqrestore(isar->hwlock, flags); 325 cnt = 1000; /* max 1s */ 326 while ((!isar->bstat) && cnt) { 327 mdelay(1); 328 cnt--; 329 } 330 if (!cnt) { 331 pr_info("ISAR no general status event received\n"); 332 ret = -ETIME; 333 goto reterrflg; 334 } else 335 pr_debug("%s: ISAR general status event %x\n", 336 isar->name, isar->bstat); 337 /* 10ms delay */ 338 cnt = 10; 339 while (cnt--) 340 mdelay(1); 341 isar->iis = 0; 342 spin_lock_irqsave(isar->hwlock, flags); 343 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) { 344 pr_info("ISAR send_mbox self tst failed\n"); 345 ret = -ETIME; 346 goto reterror; 347 } 348 spin_unlock_irqrestore(isar->hwlock, flags); 349 cnt = 10000; /* max 100 ms */ 350 while ((isar->iis != ISAR_IIS_DIAG) && cnt) { 351 udelay(10); 352 cnt--; 353 } 354 mdelay(1); 355 if (!cnt) { 356 pr_info("ISAR no self tst response\n"); 357 ret = -ETIME; 358 goto reterrflg; 359 } 360 if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1) 361 && (isar->buf[0] == 0)) 362 pr_debug("%s: ISAR selftest OK\n", isar->name); 363 else { 364 pr_info("ISAR selftest not OK %x/%x/%x\n", 365 isar->cmsb, isar->clsb, isar->buf[0]); 366 ret = -EIO; 367 goto reterrflg; 368 } 369 spin_lock_irqsave(isar->hwlock, flags); 370 isar->iis = 0; 371 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) { 372 pr_info("ISAR RQST SVN failed\n"); 373 ret = -ETIME; 374 goto reterror; 375 } 376 spin_unlock_irqrestore(isar->hwlock, flags); 377 cnt = 30000; /* max 300 ms */ 378 while ((isar->iis != ISAR_IIS_DIAG) && cnt) { 379 udelay(10); 380 cnt--; 381 } 382 mdelay(1); 383 if (!cnt) { 384 pr_info("ISAR no SVN response\n"); 385 ret = -ETIME; 386 goto reterrflg; 387 } else { 388 if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) { 389 pr_notice("%s: ISAR software version %#x\n", 390 isar->name, isar->buf[0]); 391 } else { 392 pr_info("%s: ISAR wrong swver response (%x,%x)" 393 " cnt(%d)\n", isar->name, isar->cmsb, 394 isar->clsb, cnt); 395 ret = -EIO; 396 goto reterrflg; 397 } 398 } 399 spin_lock_irqsave(isar->hwlock, flags); 400 isar_setup(isar); 401 spin_unlock_irqrestore(isar->hwlock, flags); 402 ret = 0; 403reterrflg: 404 spin_lock_irqsave(isar->hwlock, flags); 405reterror: 406 isar->ch[0].bch.debug = saved_debug; 407 if (ret) 408 /* disable ISAR IRQ */ 409 isar->write_reg(isar->hw, ISAR_IRQBIT, 0); 410 spin_unlock_irqrestore(isar->hwlock, flags); 411 return ret; 412} 413 414static inline void 415deliver_status(struct isar_ch *ch, int status) 416{ 417 pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status); 418 _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC); 419} 420 421static inline void 422isar_rcv_frame(struct isar_ch *ch) 423{ 424 u8 *ptr; 425 426 if (!ch->is->clsb) { 427 pr_debug("%s; ISAR zero len frame\n", ch->is->name); 428 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 429 return; 430 } 431 switch (ch->bch.state) { 432 case ISDN_P_NONE: 433 pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n", 434 ch->is->name, ch->is->iis, ch->is->cmsb, ch->is->clsb); 435 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 436 break; 437 case ISDN_P_B_RAW: 438 case ISDN_P_B_L2DTMF: 439 case ISDN_P_B_MODEM_ASYNC: 440 if (!ch->bch.rx_skb) { 441 ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen, 442 GFP_ATOMIC); 443 if (unlikely(!ch->bch.rx_skb)) { 444 pr_info("%s: B receive out of memory\n", 445 ch->is->name); 446 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 447 break; 448 } 449 } 450 rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb)); 451 recv_Bchannel(&ch->bch, 0); 452 break; 453 case ISDN_P_B_HDLC: 454 if (!ch->bch.rx_skb) { 455 ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen, 456 GFP_ATOMIC); 457 if (unlikely(!ch->bch.rx_skb)) { 458 pr_info("%s: B receive out of memory\n", 459 ch->is->name); 460 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 461 break; 462 } 463 } 464 if ((ch->bch.rx_skb->len + ch->is->clsb) > 465 (ch->bch.maxlen + 2)) { 466 pr_debug("%s: incoming packet too large\n", 467 ch->is->name); 468 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 469 skb_trim(ch->bch.rx_skb, 0); 470 break; 471 } 472 if (ch->is->cmsb & HDLC_ERROR) { 473 pr_debug("%s: ISAR frame error %x len %d\n", 474 ch->is->name, ch->is->cmsb, ch->is->clsb); 475#ifdef ERROR_STATISTIC 476 if (ch->is->cmsb & HDLC_ERR_RER) 477 ch->bch.err_inv++; 478 if (ch->is->cmsb & HDLC_ERR_CER) 479 ch->bch.err_crc++; 480#endif 481 skb_trim(ch->bch.rx_skb, 0); 482 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 483 break; 484 } 485 if (ch->is->cmsb & HDLC_FSD) 486 skb_trim(ch->bch.rx_skb, 0); 487 ptr = skb_put(ch->bch.rx_skb, ch->is->clsb); 488 rcv_mbox(ch->is, ptr); 489 if (ch->is->cmsb & HDLC_FED) { 490 if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */ 491 pr_debug("%s: ISAR frame to short %d\n", 492 ch->is->name, ch->bch.rx_skb->len); 493 skb_trim(ch->bch.rx_skb, 0); 494 break; 495 } 496 skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2); 497 recv_Bchannel(&ch->bch, 0); 498 } 499 break; 500 case ISDN_P_B_T30_FAX: 501 if (ch->state != STFAX_ACTIV) { 502 pr_debug("%s: isar_rcv_frame: not ACTIV\n", 503 ch->is->name); 504 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 505 if (ch->bch.rx_skb) 506 skb_trim(ch->bch.rx_skb, 0); 507 break; 508 } 509 if (!ch->bch.rx_skb) { 510 ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen, 511 GFP_ATOMIC); 512 if (unlikely(!ch->bch.rx_skb)) { 513 pr_info("%s: B receive out of memory\n", 514 __func__); 515 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 516 break; 517 } 518 } 519 if (ch->cmd == PCTRL_CMD_FRM) { 520 rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb)); 521 pr_debug("%s: isar_rcv_frame: %d\n", 522 ch->is->name, ch->bch.rx_skb->len); 523 if (ch->is->cmsb & SART_NMD) { /* ABORT */ 524 pr_debug("%s: isar_rcv_frame: no more data\n", 525 ch->is->name); 526 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 527 send_mbox(ch->is, SET_DPS(ch->dpath) | 528 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 529 0, NULL); 530 ch->state = STFAX_ESCAPE; 531 /* set_skb_flag(skb, DF_NOMOREDATA); */ 532 } 533 recv_Bchannel(&ch->bch, 0); 534 if (ch->is->cmsb & SART_NMD) 535 deliver_status(ch, HW_MOD_NOCARR); 536 break; 537 } 538 if (ch->cmd != PCTRL_CMD_FRH) { 539 pr_debug("%s: isar_rcv_frame: unknown fax mode %x\n", 540 ch->is->name, ch->cmd); 541 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 542 if (ch->bch.rx_skb) 543 skb_trim(ch->bch.rx_skb, 0); 544 break; 545 } 546 /* PCTRL_CMD_FRH */ 547 if ((ch->bch.rx_skb->len + ch->is->clsb) > 548 (ch->bch.maxlen + 2)) { 549 pr_info("%s: %s incoming packet too large\n", 550 ch->is->name, __func__); 551 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 552 skb_trim(ch->bch.rx_skb, 0); 553 break; 554 } else if (ch->is->cmsb & HDLC_ERROR) { 555 pr_info("%s: ISAR frame error %x len %d\n", 556 ch->is->name, ch->is->cmsb, ch->is->clsb); 557 skb_trim(ch->bch.rx_skb, 0); 558 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 559 break; 560 } 561 if (ch->is->cmsb & HDLC_FSD) 562 skb_trim(ch->bch.rx_skb, 0); 563 ptr = skb_put(ch->bch.rx_skb, ch->is->clsb); 564 rcv_mbox(ch->is, ptr); 565 if (ch->is->cmsb & HDLC_FED) { 566 if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */ 567 pr_info("%s: ISAR frame to short %d\n", 568 ch->is->name, ch->bch.rx_skb->len); 569 skb_trim(ch->bch.rx_skb, 0); 570 break; 571 } 572 skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2); 573 recv_Bchannel(&ch->bch, 0); 574 } 575 if (ch->is->cmsb & SART_NMD) { /* ABORT */ 576 pr_debug("%s: isar_rcv_frame: no more data\n", 577 ch->is->name); 578 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 579 if (ch->bch.rx_skb) 580 skb_trim(ch->bch.rx_skb, 0); 581 send_mbox(ch->is, SET_DPS(ch->dpath) | 582 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL); 583 ch->state = STFAX_ESCAPE; 584 deliver_status(ch, HW_MOD_NOCARR); 585 } 586 break; 587 default: 588 pr_info("isar_rcv_frame protocol (%x)error\n", ch->bch.state); 589 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); 590 break; 591 } 592} 593 594static void 595isar_fill_fifo(struct isar_ch *ch) 596{ 597 int count; 598 u8 msb; 599 u8 *ptr; 600 601 pr_debug("%s: ch%d tx_skb %p tx_idx %d\n", 602 ch->is->name, ch->bch.nr, ch->bch.tx_skb, ch->bch.tx_idx); 603 if (!ch->bch.tx_skb) 604 return; 605 count = ch->bch.tx_skb->len - ch->bch.tx_idx; 606 if (count <= 0) 607 return; 608 if (!(ch->is->bstat & 609 (ch->dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2))) 610 return; 611 if (count > ch->mml) { 612 msb = 0; 613 count = ch->mml; 614 } else { 615 msb = HDLC_FED; 616 } 617 ptr = ch->bch.tx_skb->data + ch->bch.tx_idx; 618 if (!ch->bch.tx_idx) { 619 pr_debug("%s: frame start\n", ch->is->name); 620 if ((ch->bch.state == ISDN_P_B_T30_FAX) && 621 (ch->cmd == PCTRL_CMD_FTH)) { 622 if (count > 1) { 623 if ((ptr[0] == 0xff) && (ptr[1] == 0x13)) { 624 /* last frame */ 625 test_and_set_bit(FLG_LASTDATA, 626 &ch->bch.Flags); 627 pr_debug("%s: set LASTDATA\n", 628 ch->is->name); 629 if (msb == HDLC_FED) 630 test_and_set_bit(FLG_DLEETX, 631 &ch->bch.Flags); 632 } 633 } 634 } 635 msb |= HDLC_FST; 636 } 637 ch->bch.tx_idx += count; 638 switch (ch->bch.state) { 639 case ISDN_P_NONE: 640 pr_info("%s: wrong protocol 0\n", __func__); 641 break; 642 case ISDN_P_B_RAW: 643 case ISDN_P_B_L2DTMF: 644 case ISDN_P_B_MODEM_ASYNC: 645 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, 646 0, count, ptr); 647 break; 648 case ISDN_P_B_HDLC: 649 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, 650 msb, count, ptr); 651 break; 652 case ISDN_P_B_T30_FAX: 653 if (ch->state != STFAX_ACTIV) 654 pr_debug("%s: not ACTIV\n", ch->is->name); 655 else if (ch->cmd == PCTRL_CMD_FTH) 656 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, 657 msb, count, ptr); 658 else if (ch->cmd == PCTRL_CMD_FTM) 659 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, 660 0, count, ptr); 661 else 662 pr_debug("%s: not FTH/FTM\n", ch->is->name); 663 break; 664 default: 665 pr_info("%s: protocol(%x) error\n", 666 __func__, ch->bch.state); 667 break; 668 } 669} 670 671static inline struct isar_ch * 672sel_bch_isar(struct isar_hw *isar, u8 dpath) 673{ 674 struct isar_ch *base = &isar->ch[0]; 675 676 if ((!dpath) || (dpath > 2)) 677 return NULL; 678 if (base->dpath == dpath) 679 return base; 680 base++; 681 if (base->dpath == dpath) 682 return base; 683 return NULL; 684} 685 686static void 687send_next(struct isar_ch *ch) 688{ 689 pr_debug("%s: %s ch%d tx_skb %p tx_idx %d\n", 690 ch->is->name, __func__, ch->bch.nr, 691 ch->bch.tx_skb, ch->bch.tx_idx); 692 if (ch->bch.state == ISDN_P_B_T30_FAX) { 693 if (ch->cmd == PCTRL_CMD_FTH) { 694 if (test_bit(FLG_LASTDATA, &ch->bch.Flags)) { 695 pr_debug("set NMD_DATA\n"); 696 test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags); 697 } 698 } else if (ch->cmd == PCTRL_CMD_FTM) { 699 if (test_bit(FLG_DLEETX, &ch->bch.Flags)) { 700 test_and_set_bit(FLG_LASTDATA, &ch->bch.Flags); 701 test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags); 702 } 703 } 704 } 705 if (ch->bch.tx_skb) { 706 /* send confirm, on trans, free on hdlc. */ 707 if (test_bit(FLG_TRANSPARENT, &ch->bch.Flags)) 708 confirm_Bsend(&ch->bch); 709 dev_kfree_skb(ch->bch.tx_skb); 710 } 711 if (get_next_bframe(&ch->bch)) 712 isar_fill_fifo(ch); 713 else { 714 if (test_and_clear_bit(FLG_DLEETX, &ch->bch.Flags)) { 715 if (test_and_clear_bit(FLG_LASTDATA, 716 &ch->bch.Flags)) { 717 if (test_and_clear_bit(FLG_NMD_DATA, 718 &ch->bch.Flags)) { 719 u8 zd = 0; 720 send_mbox(ch->is, SET_DPS(ch->dpath) | 721 ISAR_HIS_SDATA, 0x01, 1, &zd); 722 } 723 test_and_set_bit(FLG_LL_OK, &ch->bch.Flags); 724 } else { 725 deliver_status(ch, HW_MOD_CONNECT); 726 } 727 } 728 } 729} 730 731static void 732check_send(struct isar_hw *isar, u8 rdm) 733{ 734 struct isar_ch *ch; 735 736 pr_debug("%s: rdm %x\n", isar->name, rdm); 737 if (rdm & BSTAT_RDM1) { 738 ch = sel_bch_isar(isar, 1); 739 if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) { 740 if (ch->bch.tx_skb && (ch->bch.tx_skb->len > 741 ch->bch.tx_idx)) 742 isar_fill_fifo(ch); 743 else 744 send_next(ch); 745 } 746 } 747 if (rdm & BSTAT_RDM2) { 748 ch = sel_bch_isar(isar, 2); 749 if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) { 750 if (ch->bch.tx_skb && (ch->bch.tx_skb->len > 751 ch->bch.tx_idx)) 752 isar_fill_fifo(ch); 753 else 754 send_next(ch); 755 } 756 } 757} 758 759const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4", 760 "300", "600", "1200", "2400", "4800", "7200", 761 "9600nt", "9600t", "12000", "14400", "WRONG"}; 762const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21", 763 "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"}; 764 765static void 766isar_pump_status_rsp(struct isar_ch *ch) { 767 u8 ril = ch->is->buf[0]; 768 u8 rim; 769 770 if (!test_and_clear_bit(ISAR_RATE_REQ, &ch->is->Flags)) 771 return; 772 if (ril > 14) { 773 pr_info("%s: wrong pstrsp ril=%d\n", ch->is->name, ril); 774 ril = 15; 775 } 776 switch (ch->is->buf[1]) { 777 case 0: 778 rim = 0; 779 break; 780 case 0x20: 781 rim = 2; 782 break; 783 case 0x40: 784 rim = 3; 785 break; 786 case 0x41: 787 rim = 4; 788 break; 789 case 0x51: 790 rim = 5; 791 break; 792 case 0x61: 793 rim = 6; 794 break; 795 case 0x71: 796 rim = 7; 797 break; 798 case 0x82: 799 rim = 8; 800 break; 801 case 0x92: 802 rim = 9; 803 break; 804 case 0xa2: 805 rim = 10; 806 break; 807 default: 808 rim = 1; 809 break; 810 } 811 sprintf(ch->conmsg, "%s %s", dmril[ril], dmrim[rim]); 812 pr_debug("%s: pump strsp %s\n", ch->is->name, ch->conmsg); 813} 814 815static void 816isar_pump_statev_modem(struct isar_ch *ch, u8 devt) { 817 u8 dps = SET_DPS(ch->dpath); 818 819 switch (devt) { 820 case PSEV_10MS_TIMER: 821 pr_debug("%s: pump stev TIMER\n", ch->is->name); 822 break; 823 case PSEV_CON_ON: 824 pr_debug("%s: pump stev CONNECT\n", ch->is->name); 825 deliver_status(ch, HW_MOD_CONNECT); 826 break; 827 case PSEV_CON_OFF: 828 pr_debug("%s: pump stev NO CONNECT\n", ch->is->name); 829 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 830 deliver_status(ch, HW_MOD_NOCARR); 831 break; 832 case PSEV_V24_OFF: 833 pr_debug("%s: pump stev V24 OFF\n", ch->is->name); 834 break; 835 case PSEV_CTS_ON: 836 pr_debug("%s: pump stev CTS ON\n", ch->is->name); 837 break; 838 case PSEV_CTS_OFF: 839 pr_debug("%s pump stev CTS OFF\n", ch->is->name); 840 break; 841 case PSEV_DCD_ON: 842 pr_debug("%s: pump stev CARRIER ON\n", ch->is->name); 843 test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags); 844 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 845 break; 846 case PSEV_DCD_OFF: 847 pr_debug("%s: pump stev CARRIER OFF\n", ch->is->name); 848 break; 849 case PSEV_DSR_ON: 850 pr_debug("%s: pump stev DSR ON\n", ch->is->name); 851 break; 852 case PSEV_DSR_OFF: 853 pr_debug("%s: pump stev DSR_OFF\n", ch->is->name); 854 break; 855 case PSEV_REM_RET: 856 pr_debug("%s: pump stev REMOTE RETRAIN\n", ch->is->name); 857 break; 858 case PSEV_REM_REN: 859 pr_debug("%s: pump stev REMOTE RENEGOTIATE\n", ch->is->name); 860 break; 861 case PSEV_GSTN_CLR: 862 pr_debug("%s: pump stev GSTN CLEAR\n", ch->is->name); 863 break; 864 default: 865 pr_info("u%s: unknown pump stev %x\n", ch->is->name, devt); 866 break; 867 } 868} 869 870static void 871isar_pump_statev_fax(struct isar_ch *ch, u8 devt) { 872 u8 dps = SET_DPS(ch->dpath); 873 u8 p1; 874 875 switch (devt) { 876 case PSEV_10MS_TIMER: 877 pr_debug("%s: pump stev TIMER\n", ch->is->name); 878 break; 879 case PSEV_RSP_READY: 880 pr_debug("%s: pump stev RSP_READY\n", ch->is->name); 881 ch->state = STFAX_READY; 882 deliver_status(ch, HW_MOD_READY); 883#ifdef AUTOCON 884 if (test_bit(BC_FLG_ORIG, &ch->bch.Flags)) 885 isar_pump_cmd(bch, HW_MOD_FRH, 3); 886 else 887 isar_pump_cmd(bch, HW_MOD_FTH, 3); 888#endif 889 break; 890 case PSEV_LINE_TX_H: 891 if (ch->state == STFAX_LINE) { 892 pr_debug("%s: pump stev LINE_TX_H\n", ch->is->name); 893 ch->state = STFAX_CONT; 894 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 895 PCTRL_CMD_CONT, 0, NULL); 896 } else { 897 pr_debug("%s: pump stev LINE_TX_H wrong st %x\n", 898 ch->is->name, ch->state); 899 } 900 break; 901 case PSEV_LINE_RX_H: 902 if (ch->state == STFAX_LINE) { 903 pr_debug("%s: pump stev LINE_RX_H\n", ch->is->name); 904 ch->state = STFAX_CONT; 905 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 906 PCTRL_CMD_CONT, 0, NULL); 907 } else { 908 pr_debug("%s: pump stev LINE_RX_H wrong st %x\n", 909 ch->is->name, ch->state); 910 } 911 break; 912 case PSEV_LINE_TX_B: 913 if (ch->state == STFAX_LINE) { 914 pr_debug("%s: pump stev LINE_TX_B\n", ch->is->name); 915 ch->state = STFAX_CONT; 916 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 917 PCTRL_CMD_CONT, 0, NULL); 918 } else { 919 pr_debug("%s: pump stev LINE_TX_B wrong st %x\n", 920 ch->is->name, ch->state); 921 } 922 break; 923 case PSEV_LINE_RX_B: 924 if (ch->state == STFAX_LINE) { 925 pr_debug("%s: pump stev LINE_RX_B\n", ch->is->name); 926 ch->state = STFAX_CONT; 927 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 928 PCTRL_CMD_CONT, 0, NULL); 929 } else { 930 pr_debug("%s: pump stev LINE_RX_B wrong st %x\n", 931 ch->is->name, ch->state); 932 } 933 break; 934 case PSEV_RSP_CONN: 935 if (ch->state == STFAX_CONT) { 936 pr_debug("%s: pump stev RSP_CONN\n", ch->is->name); 937 ch->state = STFAX_ACTIV; 938 test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags); 939 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 940 if (ch->cmd == PCTRL_CMD_FTH) { 941 int delay = (ch->mod == 3) ? 1000 : 200; 942 /* 1s (200 ms) Flags before data */ 943 if (test_and_set_bit(FLG_FTI_RUN, 944 &ch->bch.Flags)) 945 del_timer(&ch->ftimer); 946 ch->ftimer.expires = 947 jiffies + ((delay * HZ)/1000); 948 test_and_set_bit(FLG_LL_CONN, 949 &ch->bch.Flags); 950 add_timer(&ch->ftimer); 951 } else { 952 deliver_status(ch, HW_MOD_CONNECT); 953 } 954 } else { 955 pr_debug("%s: pump stev RSP_CONN wrong st %x\n", 956 ch->is->name, ch->state); 957 } 958 break; 959 case PSEV_FLAGS_DET: 960 pr_debug("%s: pump stev FLAGS_DET\n", ch->is->name); 961 break; 962 case PSEV_RSP_DISC: 963 pr_debug("%s: pump stev RSP_DISC state(%d)\n", 964 ch->is->name, ch->state); 965 if (ch->state == STFAX_ESCAPE) { 966 p1 = 5; 967 switch (ch->newcmd) { 968 case 0: 969 ch->state = STFAX_READY; 970 break; 971 case PCTRL_CMD_FTM: 972 p1 = 2; 973 case PCTRL_CMD_FTH: 974 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 975 PCTRL_CMD_SILON, 1, &p1); 976 ch->state = STFAX_SILDET; 977 break; 978 case PCTRL_CMD_FRH: 979 case PCTRL_CMD_FRM: 980 ch->mod = ch->newmod; 981 p1 = ch->newmod; 982 ch->newmod = 0; 983 ch->cmd = ch->newcmd; 984 ch->newcmd = 0; 985 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 986 ch->cmd, 1, &p1); 987 ch->state = STFAX_LINE; 988 ch->try_mod = 3; 989 break; 990 default: 991 pr_debug("%s: RSP_DISC unknown newcmd %x\n", 992 ch->is->name, ch->newcmd); 993 break; 994 } 995 } else if (ch->state == STFAX_ACTIV) { 996 if (test_and_clear_bit(FLG_LL_OK, &ch->bch.Flags)) 997 deliver_status(ch, HW_MOD_OK); 998 else if (ch->cmd == PCTRL_CMD_FRM) 999 deliver_status(ch, HW_MOD_NOCARR); 1000 else 1001 deliver_status(ch, HW_MOD_FCERROR); 1002 ch->state = STFAX_READY; 1003 } else if (ch->state != STFAX_SILDET) { 1004 /* ignore in STFAX_SILDET */ 1005 ch->state = STFAX_READY; 1006 deliver_status(ch, HW_MOD_FCERROR); 1007 } 1008 break; 1009 case PSEV_RSP_SILDET: 1010 pr_debug("%s: pump stev RSP_SILDET\n", ch->is->name); 1011 if (ch->state == STFAX_SILDET) { 1012 ch->mod = ch->newmod; 1013 p1 = ch->newmod; 1014 ch->newmod = 0; 1015 ch->cmd = ch->newcmd; 1016 ch->newcmd = 0; 1017 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 1018 ch->cmd, 1, &p1); 1019 ch->state = STFAX_LINE; 1020 ch->try_mod = 3; 1021 } 1022 break; 1023 case PSEV_RSP_SILOFF: 1024 pr_debug("%s: pump stev RSP_SILOFF\n", ch->is->name); 1025 break; 1026 case PSEV_RSP_FCERR: 1027 if (ch->state == STFAX_LINE) { 1028 pr_debug("%s: pump stev RSP_FCERR try %d\n", 1029 ch->is->name, ch->try_mod); 1030 if (ch->try_mod--) { 1031 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, 1032 ch->cmd, 1, &ch->mod); 1033 break; 1034 } 1035 } 1036 pr_debug("%s: pump stev RSP_FCERR\n", ch->is->name); 1037 ch->state = STFAX_ESCAPE; 1038 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 1039 0, NULL); 1040 deliver_status(ch, HW_MOD_FCERROR); 1041 break; 1042 default: 1043 break; 1044 } 1045} 1046 1047void 1048mISDNisar_irq(struct isar_hw *isar) 1049{ 1050 struct isar_ch *ch; 1051 1052 get_irq_infos(isar); 1053 switch (isar->iis & ISAR_IIS_MSCMSD) { 1054 case ISAR_IIS_RDATA: 1055 ch = sel_bch_isar(isar, isar->iis >> 6); 1056 if (ch) 1057 isar_rcv_frame(ch); 1058 else { 1059 pr_debug("%s: ISAR spurious IIS_RDATA %x/%x/%x\n", 1060 isar->name, isar->iis, isar->cmsb, 1061 isar->clsb); 1062 isar->write_reg(isar->hw, ISAR_IIA, 0); 1063 } 1064 break; 1065 case ISAR_IIS_GSTEV: 1066 isar->write_reg(isar->hw, ISAR_IIA, 0); 1067 isar->bstat |= isar->cmsb; 1068 check_send(isar, isar->cmsb); 1069 break; 1070 case ISAR_IIS_BSTEV: 1071#ifdef ERROR_STATISTIC 1072 ch = sel_bch_isar(isar, isar->iis >> 6); 1073 if (ch) { 1074 if (isar->cmsb == BSTEV_TBO) 1075 ch->bch.err_tx++; 1076 if (isar->cmsb == BSTEV_RBO) 1077 ch->bch.err_rdo++; 1078 } 1079#endif 1080 pr_debug("%s: Buffer STEV dpath%d msb(%x)\n", 1081 isar->name, isar->iis>>6, isar->cmsb); 1082 isar->write_reg(isar->hw, ISAR_IIA, 0); 1083 break; 1084 case ISAR_IIS_PSTEV: 1085 ch = sel_bch_isar(isar, isar->iis >> 6); 1086 if (ch) { 1087 rcv_mbox(isar, NULL); 1088 if (ch->bch.state == ISDN_P_B_MODEM_ASYNC) 1089 isar_pump_statev_modem(ch, isar->cmsb); 1090 else if (ch->bch.state == ISDN_P_B_T30_FAX) 1091 isar_pump_statev_fax(ch, isar->cmsb); 1092 else if (ch->bch.state == ISDN_P_B_RAW) { 1093 int tt; 1094 tt = isar->cmsb | 0x30; 1095 if (tt == 0x3e) 1096 tt = '*'; 1097 else if (tt == 0x3f) 1098 tt = '#'; 1099 else if (tt > '9') 1100 tt += 7; 1101 tt |= DTMF_TONE_VAL; 1102 _queue_data(&ch->bch.ch, PH_CONTROL_IND, 1103 MISDN_ID_ANY, sizeof(tt), &tt, 1104 GFP_ATOMIC); 1105 } else 1106 pr_debug("%s: ISAR IIS_PSTEV pm %d sta %x\n", 1107 isar->name, ch->bch.state, 1108 isar->cmsb); 1109 } else { 1110 pr_debug("%s: ISAR spurious IIS_PSTEV %x/%x/%x\n", 1111 isar->name, isar->iis, isar->cmsb, 1112 isar->clsb); 1113 isar->write_reg(isar->hw, ISAR_IIA, 0); 1114 } 1115 break; 1116 case ISAR_IIS_PSTRSP: 1117 ch = sel_bch_isar(isar, isar->iis >> 6); 1118 if (ch) { 1119 rcv_mbox(isar, NULL); 1120 isar_pump_status_rsp(ch); 1121 } else { 1122 pr_debug("%s: ISAR spurious IIS_PSTRSP %x/%x/%x\n", 1123 isar->name, isar->iis, isar->cmsb, 1124 isar->clsb); 1125 isar->write_reg(isar->hw, ISAR_IIA, 0); 1126 } 1127 break; 1128 case ISAR_IIS_DIAG: 1129 case ISAR_IIS_BSTRSP: 1130 case ISAR_IIS_IOM2RSP: 1131 rcv_mbox(isar, NULL); 1132 break; 1133 case ISAR_IIS_INVMSG: 1134 rcv_mbox(isar, NULL); 1135 pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb); 1136 break; 1137 default: 1138 rcv_mbox(isar, NULL); 1139 pr_debug("%s: unhandled msg iis(%x) ctrl(%x/%x)\n", 1140 isar->name, isar->iis, isar->cmsb, isar->clsb); 1141 break; 1142 } 1143} 1144EXPORT_SYMBOL(mISDNisar_irq); 1145 1146static void 1147ftimer_handler(unsigned long data) 1148{ 1149 struct isar_ch *ch = (struct isar_ch *)data; 1150 1151 pr_debug("%s: ftimer flags %lx\n", ch->is->name, ch->bch.Flags); 1152 test_and_clear_bit(FLG_FTI_RUN, &ch->bch.Flags); 1153 if (test_and_clear_bit(FLG_LL_CONN, &ch->bch.Flags)) 1154 deliver_status(ch, HW_MOD_CONNECT); 1155} 1156 1157static void 1158setup_pump(struct isar_ch *ch) { 1159 u8 dps = SET_DPS(ch->dpath); 1160 u8 ctrl, param[6]; 1161 1162 switch (ch->bch.state) { 1163 case ISDN_P_NONE: 1164 case ISDN_P_B_RAW: 1165 case ISDN_P_B_HDLC: 1166 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL); 1167 break; 1168 case ISDN_P_B_L2DTMF: 1169 if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) { 1170 param[0] = 5; /* TOA 5 db */ 1171 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, 1172 PMOD_DTMF_TRANS, 1, param); 1173 } else { 1174 param[0] = 40; /* REL -46 dbm */ 1175 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, 1176 PMOD_DTMF, 1, param); 1177 } 1178 case ISDN_P_B_MODEM_ASYNC: 1179 ctrl = PMOD_DATAMODEM; 1180 if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) { 1181 ctrl |= PCTRL_ORIG; 1182 param[5] = PV32P6_CTN; 1183 } else { 1184 param[5] = PV32P6_ATN; 1185 } 1186 param[0] = 6; /* 6 db */ 1187 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B | 1188 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL; 1189 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B; 1190 param[3] = PV32P4_UT144; 1191 param[4] = PV32P5_UT144; 1192 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param); 1193 break; 1194 case ISDN_P_B_T30_FAX: 1195 ctrl = PMOD_FAX; 1196 if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) { 1197 ctrl |= PCTRL_ORIG; 1198 param[1] = PFAXP2_CTN; 1199 } else { 1200 param[1] = PFAXP2_ATN; 1201 } 1202 param[0] = 6; /* 6 db */ 1203 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param); 1204 ch->state = STFAX_NULL; 1205 ch->newcmd = 0; 1206 ch->newmod = 0; 1207 test_and_set_bit(FLG_FTI_RUN, &ch->bch.Flags); 1208 break; 1209 } 1210 udelay(1000); 1211 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 1212 udelay(1000); 1213} 1214 1215static void 1216setup_sart(struct isar_ch *ch) { 1217 u8 dps = SET_DPS(ch->dpath); 1218 u8 ctrl, param[2] = {0, 0}; 1219 1220 switch (ch->bch.state) { 1221 case ISDN_P_NONE: 1222 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, 1223 0, NULL); 1224 break; 1225 case ISDN_P_B_RAW: 1226 case ISDN_P_B_L2DTMF: 1227 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, 1228 2, param); 1229 break; 1230 case ISDN_P_B_HDLC: 1231 case ISDN_P_B_T30_FAX: 1232 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, 1233 1, param); 1234 break; 1235 case ISDN_P_B_MODEM_ASYNC: 1236 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH; 1237 param[0] = S_P1_CHS_8; 1238 param[1] = S_P2_BFT_DEF; 1239 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, ctrl, 2, param); 1240 break; 1241 } 1242 udelay(1000); 1243 send_mbox(ch->is, dps | ISAR_HIS_BSTREQ, 0, 0, NULL); 1244 udelay(1000); 1245} 1246 1247static void 1248setup_iom2(struct isar_ch *ch) { 1249 u8 dps = SET_DPS(ch->dpath); 1250 u8 cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0}; 1251 1252 if (ch->bch.nr == 2) { 1253 msg[1] = 1; 1254 msg[3] = 1; 1255 } 1256 switch (ch->bch.state) { 1257 case ISDN_P_NONE: 1258 cmsb = 0; 1259 /* dummy slot */ 1260 msg[1] = ch->dpath + 2; 1261 msg[3] = ch->dpath + 2; 1262 break; 1263 case ISDN_P_B_RAW: 1264 case ISDN_P_B_HDLC: 1265 break; 1266 case ISDN_P_B_MODEM_ASYNC: 1267 case ISDN_P_B_T30_FAX: 1268 cmsb |= IOM_CTRL_RCV; 1269 case ISDN_P_B_L2DTMF: 1270 if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) 1271 cmsb |= IOM_CTRL_RCV; 1272 cmsb |= IOM_CTRL_ALAW; 1273 break; 1274 } 1275 send_mbox(ch->is, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg); 1276 udelay(1000); 1277 send_mbox(ch->is, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL); 1278 udelay(1000); 1279} 1280 1281static int 1282modeisar(struct isar_ch *ch, u32 bprotocol) 1283{ 1284 /* Here we are selecting the best datapath for requested protocol */ 1285 if (ch->bch.state == ISDN_P_NONE) { /* New Setup */ 1286 switch (bprotocol) { 1287 case ISDN_P_NONE: /* init */ 1288 if (!ch->dpath) 1289 /* no init for dpath 0 */ 1290 return 0; 1291 test_and_clear_bit(FLG_HDLC, &ch->bch.Flags); 1292 test_and_clear_bit(FLG_TRANSPARENT, &ch->bch.Flags); 1293 break; 1294 case ISDN_P_B_RAW: 1295 case ISDN_P_B_HDLC: 1296 /* best is datapath 2 */ 1297 if (!test_and_set_bit(ISAR_DP2_USE, &ch->is->Flags)) 1298 ch->dpath = 2; 1299 else if (!test_and_set_bit(ISAR_DP1_USE, 1300 &ch->is->Flags)) 1301 ch->dpath = 1; 1302 else { 1303 pr_info("modeisar both pathes in use\n"); 1304 return -EBUSY; 1305 } 1306 if (bprotocol == ISDN_P_B_HDLC) 1307 test_and_set_bit(FLG_HDLC, &ch->bch.Flags); 1308 else 1309 test_and_set_bit(FLG_TRANSPARENT, 1310 &ch->bch.Flags); 1311 break; 1312 case ISDN_P_B_MODEM_ASYNC: 1313 case ISDN_P_B_T30_FAX: 1314 case ISDN_P_B_L2DTMF: 1315 /* only datapath 1 */ 1316 if (!test_and_set_bit(ISAR_DP1_USE, &ch->is->Flags)) 1317 ch->dpath = 1; 1318 else { 1319 pr_info("%s: ISAR modeisar analog functions" 1320 "only with DP1\n", ch->is->name); 1321 return -EBUSY; 1322 } 1323 break; 1324 default: 1325 pr_info("%s: protocol not known %x\n", ch->is->name, 1326 bprotocol); 1327 return -ENOPROTOOPT; 1328 } 1329 } 1330 pr_debug("%s: ISAR ch%d dp%d protocol %x->%x\n", ch->is->name, 1331 ch->bch.nr, ch->dpath, ch->bch.state, bprotocol); 1332 ch->bch.state = bprotocol; 1333 setup_pump(ch); 1334 setup_iom2(ch); 1335 setup_sart(ch); 1336 if (ch->bch.state == ISDN_P_NONE) { 1337 /* Clear resources */ 1338 if (ch->dpath == 1) 1339 test_and_clear_bit(ISAR_DP1_USE, &ch->is->Flags); 1340 else if (ch->dpath == 2) 1341 test_and_clear_bit(ISAR_DP2_USE, &ch->is->Flags); 1342 ch->dpath = 0; 1343 ch->is->ctrl(ch->is->hw, HW_DEACT_IND, ch->bch.nr); 1344 } else 1345 ch->is->ctrl(ch->is->hw, HW_ACTIVATE_IND, ch->bch.nr); 1346 return 0; 1347} 1348 1349static void 1350isar_pump_cmd(struct isar_ch *ch, u32 cmd, u8 para) 1351{ 1352 u8 dps = SET_DPS(ch->dpath); 1353 u8 ctrl = 0, nom = 0, p1 = 0; 1354 1355 pr_debug("%s: isar_pump_cmd %x/%x state(%x)\n", 1356 ch->is->name, cmd, para, ch->bch.state); 1357 switch (cmd) { 1358 case HW_MOD_FTM: 1359 if (ch->state == STFAX_READY) { 1360 p1 = para; 1361 ctrl = PCTRL_CMD_FTM; 1362 nom = 1; 1363 ch->state = STFAX_LINE; 1364 ch->cmd = ctrl; 1365 ch->mod = para; 1366 ch->newmod = 0; 1367 ch->newcmd = 0; 1368 ch->try_mod = 3; 1369 } else if ((ch->state == STFAX_ACTIV) && 1370 (ch->cmd == PCTRL_CMD_FTM) && (ch->mod == para)) 1371 deliver_status(ch, HW_MOD_CONNECT); 1372 else { 1373 ch->newmod = para; 1374 ch->newcmd = PCTRL_CMD_FTM; 1375 nom = 0; 1376 ctrl = PCTRL_CMD_ESC; 1377 ch->state = STFAX_ESCAPE; 1378 } 1379 break; 1380 case HW_MOD_FTH: 1381 if (ch->state == STFAX_READY) { 1382 p1 = para; 1383 ctrl = PCTRL_CMD_FTH; 1384 nom = 1; 1385 ch->state = STFAX_LINE; 1386 ch->cmd = ctrl; 1387 ch->mod = para; 1388 ch->newmod = 0; 1389 ch->newcmd = 0; 1390 ch->try_mod = 3; 1391 } else if ((ch->state == STFAX_ACTIV) && 1392 (ch->cmd == PCTRL_CMD_FTH) && (ch->mod == para)) 1393 deliver_status(ch, HW_MOD_CONNECT); 1394 else { 1395 ch->newmod = para; 1396 ch->newcmd = PCTRL_CMD_FTH; 1397 nom = 0; 1398 ctrl = PCTRL_CMD_ESC; 1399 ch->state = STFAX_ESCAPE; 1400 } 1401 break; 1402 case HW_MOD_FRM: 1403 if (ch->state == STFAX_READY) { 1404 p1 = para; 1405 ctrl = PCTRL_CMD_FRM; 1406 nom = 1; 1407 ch->state = STFAX_LINE; 1408 ch->cmd = ctrl; 1409 ch->mod = para; 1410 ch->newmod = 0; 1411 ch->newcmd = 0; 1412 ch->try_mod = 3; 1413 } else if ((ch->state == STFAX_ACTIV) && 1414 (ch->cmd == PCTRL_CMD_FRM) && (ch->mod == para)) 1415 deliver_status(ch, HW_MOD_CONNECT); 1416 else { 1417 ch->newmod = para; 1418 ch->newcmd = PCTRL_CMD_FRM; 1419 nom = 0; 1420 ctrl = PCTRL_CMD_ESC; 1421 ch->state = STFAX_ESCAPE; 1422 } 1423 break; 1424 case HW_MOD_FRH: 1425 if (ch->state == STFAX_READY) { 1426 p1 = para; 1427 ctrl = PCTRL_CMD_FRH; 1428 nom = 1; 1429 ch->state = STFAX_LINE; 1430 ch->cmd = ctrl; 1431 ch->mod = para; 1432 ch->newmod = 0; 1433 ch->newcmd = 0; 1434 ch->try_mod = 3; 1435 } else if ((ch->state == STFAX_ACTIV) && 1436 (ch->cmd == PCTRL_CMD_FRH) && (ch->mod == para)) 1437 deliver_status(ch, HW_MOD_CONNECT); 1438 else { 1439 ch->newmod = para; 1440 ch->newcmd = PCTRL_CMD_FRH; 1441 nom = 0; 1442 ctrl = PCTRL_CMD_ESC; 1443 ch->state = STFAX_ESCAPE; 1444 } 1445 break; 1446 case PCTRL_CMD_TDTMF: 1447 p1 = para; 1448 nom = 1; 1449 ctrl = PCTRL_CMD_TDTMF; 1450 break; 1451 } 1452 if (ctrl) 1453 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1); 1454} 1455 1456static void 1457isar_setup(struct isar_hw *isar) 1458{ 1459 u8 msg; 1460 int i; 1461 1462 /* Dpath 1, 2 */ 1463 msg = 61; 1464 for (i = 0; i < 2; i++) { 1465 /* Buffer Config */ 1466 send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) | 1467 ISAR_HIS_P12CFG, 4, 1, &msg); 1468 isar->ch[i].mml = msg; 1469 isar->ch[i].bch.state = 0; 1470 isar->ch[i].dpath = i + 1; 1471 modeisar(&isar->ch[i], ISDN_P_NONE); 1472 } 1473} 1474 1475static int 1476isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb) 1477{ 1478 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1479 struct isar_ch *ich = container_of(bch, struct isar_ch, bch); 1480 int ret = -EINVAL; 1481 struct mISDNhead *hh = mISDN_HEAD_P(skb); 1482 u32 id, *val; 1483 u_long flags; 1484 1485 switch (hh->prim) { 1486 case PH_DATA_REQ: 1487 spin_lock_irqsave(ich->is->hwlock, flags); 1488 ret = bchannel_senddata(bch, skb); 1489 if (ret > 0) { /* direct TX */ 1490 id = hh->id; /* skb can be freed */ 1491 ret = 0; 1492 isar_fill_fifo(ich); 1493 spin_unlock_irqrestore(ich->is->hwlock, flags); 1494 if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) 1495 queue_ch_frame(ch, PH_DATA_CNF, id, NULL); 1496 } else 1497 spin_unlock_irqrestore(ich->is->hwlock, flags); 1498 return ret; 1499 case PH_ACTIVATE_REQ: 1500 spin_lock_irqsave(ich->is->hwlock, flags); 1501 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) 1502 ret = modeisar(ich, ch->protocol); 1503 else 1504 ret = 0; 1505 spin_unlock_irqrestore(ich->is->hwlock, flags); 1506 if (!ret) 1507 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, 1508 NULL, GFP_KERNEL); 1509 break; 1510 case PH_DEACTIVATE_REQ: 1511 spin_lock_irqsave(ich->is->hwlock, flags); 1512 mISDN_clear_bchannel(bch); 1513 modeisar(ich, ISDN_P_NONE); 1514 spin_unlock_irqrestore(ich->is->hwlock, flags); 1515 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, 1516 NULL, GFP_KERNEL); 1517 ret = 0; 1518 break; 1519 case PH_CONTROL_REQ: 1520 val = (u32 *)skb->data; 1521 pr_debug("%s: PH_CONTROL | REQUEST %x/%x\n", ich->is->name, 1522 hh->id, *val); 1523 if ((hh->id == 0) && ((*val & ~DTMF_TONE_MASK) == 1524 DTMF_TONE_VAL)) { 1525 if (bch->state == ISDN_P_B_L2DTMF) { 1526 char tt = *val & DTMF_TONE_MASK; 1527 1528 if (tt == '*') 1529 tt = 0x1e; 1530 else if (tt == '#') 1531 tt = 0x1f; 1532 else if (tt > '9') 1533 tt -= 7; 1534 tt &= 0x1f; 1535 spin_lock_irqsave(ich->is->hwlock, flags); 1536 isar_pump_cmd(ich, PCTRL_CMD_TDTMF, tt); 1537 spin_unlock_irqrestore(ich->is->hwlock, flags); 1538 } else { 1539 pr_info("%s: DTMF send wrong protocol %x\n", 1540 __func__, bch->state); 1541 return -EINVAL; 1542 } 1543 } else if ((hh->id == HW_MOD_FRM) || (hh->id == HW_MOD_FRH) || 1544 (hh->id == HW_MOD_FTM) || (hh->id == HW_MOD_FTH)) { 1545 for (id = 0; id < FAXMODCNT; id++) 1546 if (faxmodulation[id] == *val) 1547 break; 1548 if ((FAXMODCNT > id) && 1549 test_bit(FLG_INITIALIZED, &bch->Flags)) { 1550 pr_debug("%s: isar: new mod\n", ich->is->name); 1551 isar_pump_cmd(ich, hh->id, *val); 1552 ret = 0; 1553 } else { 1554 pr_info("%s: wrong modulation\n", 1555 ich->is->name); 1556 ret = -EINVAL; 1557 } 1558 } else if (hh->id == HW_MOD_LASTDATA) 1559 test_and_set_bit(FLG_DLEETX, &bch->Flags); 1560 else { 1561 pr_info("%s: unknown PH_CONTROL_REQ %x\n", 1562 ich->is->name, hh->id); 1563 ret = -EINVAL; 1564 } 1565 default: 1566 pr_info("%s: %s unknown prim(%x,%x)\n", 1567 ich->is->name, __func__, hh->prim, hh->id); 1568 ret = -EINVAL; 1569 } 1570 if (!ret) 1571 dev_kfree_skb(skb); 1572 return ret; 1573} 1574 1575static int 1576channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) 1577{ 1578 int ret = 0; 1579 1580 switch (cq->op) { 1581 case MISDN_CTRL_GETOP: 1582 cq->op = 0; 1583 break; 1584 /* Nothing implemented yet */ 1585 case MISDN_CTRL_FILL_EMPTY: 1586 default: 1587 pr_info("%s: unknown Op %x\n", __func__, cq->op); 1588 ret = -EINVAL; 1589 break; 1590 } 1591 return ret; 1592} 1593 1594static int 1595isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) 1596{ 1597 struct bchannel *bch = container_of(ch, struct bchannel, ch); 1598 struct isar_ch *ich = container_of(bch, struct isar_ch, bch); 1599 int ret = -EINVAL; 1600 u_long flags; 1601 1602 pr_debug("%s: %s cmd:%x %p\n", ich->is->name, __func__, cmd, arg); 1603 switch (cmd) { 1604 case CLOSE_CHANNEL: 1605 test_and_clear_bit(FLG_OPEN, &bch->Flags); 1606 if (test_bit(FLG_ACTIVE, &bch->Flags)) { 1607 spin_lock_irqsave(ich->is->hwlock, flags); 1608 mISDN_freebchannel(bch); 1609 modeisar(ich, ISDN_P_NONE); 1610 spin_unlock_irqrestore(ich->is->hwlock, flags); 1611 } else { 1612 skb_queue_purge(&bch->rqueue); 1613 bch->rcount = 0; 1614 } 1615 ch->protocol = ISDN_P_NONE; 1616 ch->peer = NULL; 1617 module_put(ich->is->owner); 1618 ret = 0; 1619 break; 1620 case CONTROL_CHANNEL: 1621 ret = channel_bctrl(bch, arg); 1622 break; 1623 default: 1624 pr_info("%s: %s unknown prim(%x)\n", 1625 ich->is->name, __func__, cmd); 1626 } 1627 return ret; 1628} 1629 1630static void 1631free_isar(struct isar_hw *isar) 1632{ 1633 modeisar(&isar->ch[0], ISDN_P_NONE); 1634 modeisar(&isar->ch[1], ISDN_P_NONE); 1635 del_timer(&isar->ch[0].ftimer); 1636 del_timer(&isar->ch[1].ftimer); 1637 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags); 1638 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags); 1639} 1640 1641static int 1642init_isar(struct isar_hw *isar) 1643{ 1644 int cnt = 3; 1645 1646 while (cnt--) { 1647 isar->version = ISARVersion(isar); 1648 if (isar->ch[0].bch.debug & DEBUG_HW) 1649 pr_notice("%s: Testing version %d (%d time)\n", 1650 isar->name, isar->version, 3 - cnt); 1651 if (isar->version == 1) 1652 break; 1653 isar->ctrl(isar->hw, HW_RESET_REQ, 0); 1654 } 1655 if (isar->version != 1) 1656 return -EINVAL; 1657 isar->ch[0].ftimer.function = &ftimer_handler; 1658 isar->ch[0].ftimer.data = (long)&isar->ch[0]; 1659 init_timer(&isar->ch[0].ftimer); 1660 test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags); 1661 isar->ch[1].ftimer.function = &ftimer_handler; 1662 isar->ch[1].ftimer.data = (long)&isar->ch[1]; 1663 init_timer(&isar->ch[1].ftimer); 1664 test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags); 1665 return 0; 1666} 1667 1668static int 1669isar_open(struct isar_hw *isar, struct channel_req *rq) 1670{ 1671 struct bchannel *bch; 1672 1673 if (rq->adr.channel > 2) 1674 return -EINVAL; 1675 if (rq->protocol == ISDN_P_NONE) 1676 return -EINVAL; 1677 bch = &isar->ch[rq->adr.channel - 1].bch; 1678 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) 1679 return -EBUSY; /* b-channel can be only open once */ 1680 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); 1681 bch->ch.protocol = rq->protocol; 1682 rq->ch = &bch->ch; 1683 return 0; 1684} 1685 1686u32 1687mISDNisar_init(struct isar_hw *isar, void *hw) 1688{ 1689 u32 ret, i; 1690 1691 isar->hw = hw; 1692 for (i = 0; i < 2; i++) { 1693 isar->ch[i].bch.nr = i + 1; 1694 mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM); 1695 isar->ch[i].bch.ch.nr = i + 1; 1696 isar->ch[i].bch.ch.send = &isar_l2l1; 1697 isar->ch[i].bch.ch.ctrl = isar_bctrl; 1698 isar->ch[i].bch.hw = hw; 1699 isar->ch[i].is = isar; 1700 } 1701 1702 isar->init = &init_isar; 1703 isar->release = &free_isar; 1704 isar->firmware = &load_firmware; 1705 isar->open = &isar_open; 1706 1707 ret = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | 1708 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)) | 1709 (1 << (ISDN_P_B_L2DTMF & ISDN_P_B_MASK)) | 1710 (1 << (ISDN_P_B_MODEM_ASYNC & ISDN_P_B_MASK)) | 1711 (1 << (ISDN_P_B_T30_FAX & ISDN_P_B_MASK)); 1712 1713 return ret; 1714} 1715EXPORT_SYMBOL(mISDNisar_init); 1716 1717static int __init isar_mod_init(void) 1718{ 1719 pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV); 1720 return 0; 1721} 1722 1723static void __exit isar_mod_cleanup(void) 1724{ 1725 pr_notice("mISDN: ISAR module unloaded\n"); 1726} 1727module_init(isar_mod_init); 1728module_exit(isar_mod_cleanup); 1729