1/* 2 * The Marvell camera core. This device appears in a number of settings, 3 * so it needs platform-specific support outside of the core. 4 * 5 * Copyright 2011 Jonathan Corbet corbet@lwn.net 6 */ 7#include <linux/kernel.h> 8#include <linux/module.h> 9#include <linux/fs.h> 10#include <linux/mm.h> 11#include <linux/i2c.h> 12#include <linux/interrupt.h> 13#include <linux/spinlock.h> 14#include <linux/slab.h> 15#include <linux/device.h> 16#include <linux/wait.h> 17#include <linux/list.h> 18#include <linux/dma-mapping.h> 19#include <linux/delay.h> 20#include <linux/vmalloc.h> 21#include <linux/io.h> 22#include <linux/videodev2.h> 23#include <media/v4l2-device.h> 24#include <media/v4l2-ioctl.h> 25#include <media/v4l2-chip-ident.h> 26#include <media/ov7670.h> 27#include <media/videobuf2-vmalloc.h> 28#include <media/videobuf2-dma-contig.h> 29#include <media/videobuf2-dma-sg.h> 30 31#include "mcam-core.h" 32 33/* 34 * Basic frame stats - to be deleted shortly 35 */ 36static int frames; 37static int singles; 38static int delivered; 39 40#ifdef MCAM_MODE_VMALLOC 41/* 42 * Internal DMA buffer management. Since the controller cannot do S/G I/O, 43 * we must have physically contiguous buffers to bring frames into. 44 * These parameters control how many buffers we use, whether we 45 * allocate them at load time (better chance of success, but nails down 46 * memory) or when somebody tries to use the camera (riskier), and, 47 * for load-time allocation, how big they should be. 48 * 49 * The controller can cycle through three buffers. We could use 50 * more by flipping pointers around, but it probably makes little 51 * sense. 52 */ 53 54static bool alloc_bufs_at_read; 55module_param(alloc_bufs_at_read, bool, 0444); 56MODULE_PARM_DESC(alloc_bufs_at_read, 57 "Non-zero value causes DMA buffers to be allocated when the " 58 "video capture device is read, rather than at module load " 59 "time. This saves memory, but decreases the chances of " 60 "successfully getting those buffers. This parameter is " 61 "only used in the vmalloc buffer mode"); 62 63static int n_dma_bufs = 3; 64module_param(n_dma_bufs, uint, 0644); 65MODULE_PARM_DESC(n_dma_bufs, 66 "The number of DMA buffers to allocate. Can be either two " 67 "(saves memory, makes timing tighter) or three."); 68 69static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ 70module_param(dma_buf_size, uint, 0444); 71MODULE_PARM_DESC(dma_buf_size, 72 "The size of the allocated DMA buffers. If actual operating " 73 "parameters require larger buffers, an attempt to reallocate " 74 "will be made."); 75#else /* MCAM_MODE_VMALLOC */ 76static const bool alloc_bufs_at_read = 0; 77static const int n_dma_bufs = 3; /* Used by S/G_PARM */ 78#endif /* MCAM_MODE_VMALLOC */ 79 80static bool flip; 81module_param(flip, bool, 0444); 82MODULE_PARM_DESC(flip, 83 "If set, the sensor will be instructed to flip the image " 84 "vertically."); 85 86static int buffer_mode = -1; 87module_param(buffer_mode, int, 0444); 88MODULE_PARM_DESC(buffer_mode, 89 "Set the buffer mode to be used; default is to go with what " 90 "the platform driver asks for. Set to 0 for vmalloc, 1 for " 91 "DMA contiguous."); 92 93/* 94 * Status flags. Always manipulated with bit operations. 95 */ 96#define CF_BUF0_VALID 0 /* Buffers valid - first three */ 97#define CF_BUF1_VALID 1 98#define CF_BUF2_VALID 2 99#define CF_DMA_ACTIVE 3 /* A frame is incoming */ 100#define CF_CONFIG_NEEDED 4 /* Must configure hardware */ 101#define CF_SINGLE_BUFFER 5 /* Running with a single buffer */ 102#define CF_SG_RESTART 6 /* SG restart needed */ 103 104#define sensor_call(cam, o, f, args...) \ 105 v4l2_subdev_call(cam->sensor, o, f, ##args) 106 107static struct mcam_format_struct { 108 __u8 *desc; 109 __u32 pixelformat; 110 int bpp; /* Bytes per pixel */ 111 enum v4l2_mbus_pixelcode mbus_code; 112} mcam_formats[] = { 113 { 114 .desc = "YUYV 4:2:2", 115 .pixelformat = V4L2_PIX_FMT_YUYV, 116 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 117 .bpp = 2, 118 }, 119 { 120 .desc = "RGB 444", 121 .pixelformat = V4L2_PIX_FMT_RGB444, 122 .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, 123 .bpp = 2, 124 }, 125 { 126 .desc = "RGB 565", 127 .pixelformat = V4L2_PIX_FMT_RGB565, 128 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, 129 .bpp = 2, 130 }, 131 { 132 .desc = "Raw RGB Bayer", 133 .pixelformat = V4L2_PIX_FMT_SBGGR8, 134 .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, 135 .bpp = 1 136 }, 137}; 138#define N_MCAM_FMTS ARRAY_SIZE(mcam_formats) 139 140static struct mcam_format_struct *mcam_find_format(u32 pixelformat) 141{ 142 unsigned i; 143 144 for (i = 0; i < N_MCAM_FMTS; i++) 145 if (mcam_formats[i].pixelformat == pixelformat) 146 return mcam_formats + i; 147 /* Not found? Then return the first format. */ 148 return mcam_formats; 149} 150 151/* 152 * The default format we use until somebody says otherwise. 153 */ 154static const struct v4l2_pix_format mcam_def_pix_format = { 155 .width = VGA_WIDTH, 156 .height = VGA_HEIGHT, 157 .pixelformat = V4L2_PIX_FMT_YUYV, 158 .field = V4L2_FIELD_NONE, 159 .bytesperline = VGA_WIDTH*2, 160 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, 161}; 162 163static const enum v4l2_mbus_pixelcode mcam_def_mbus_code = 164 V4L2_MBUS_FMT_YUYV8_2X8; 165 166 167/* 168 * The two-word DMA descriptor format used by the Armada 610 and like. There 169 * Is a three-word format as well (set C1_DESC_3WORD) where the third 170 * word is a pointer to the next descriptor, but we don't use it. Two-word 171 * descriptors have to be contiguous in memory. 172 */ 173struct mcam_dma_desc { 174 u32 dma_addr; 175 u32 segment_len; 176}; 177 178/* 179 * Our buffer type for working with videobuf2. Note that the vb2 180 * developers have decreed that struct vb2_buffer must be at the 181 * beginning of this structure. 182 */ 183struct mcam_vb_buffer { 184 struct vb2_buffer vb_buf; 185 struct list_head queue; 186 struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */ 187 dma_addr_t dma_desc_pa; /* Descriptor physical address */ 188 int dma_desc_nent; /* Number of mapped descriptors */ 189}; 190 191static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb) 192{ 193 return container_of(vb, struct mcam_vb_buffer, vb_buf); 194} 195 196/* 197 * Hand a completed buffer back to user space. 198 */ 199static void mcam_buffer_done(struct mcam_camera *cam, int frame, 200 struct vb2_buffer *vbuf) 201{ 202 vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage; 203 vbuf->v4l2_buf.sequence = cam->buf_seq[frame]; 204 vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage); 205 vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE); 206} 207 208 209 210/* 211 * Debugging and related. 212 */ 213#define cam_err(cam, fmt, arg...) \ 214 dev_err((cam)->dev, fmt, ##arg); 215#define cam_warn(cam, fmt, arg...) \ 216 dev_warn((cam)->dev, fmt, ##arg); 217#define cam_dbg(cam, fmt, arg...) \ 218 dev_dbg((cam)->dev, fmt, ##arg); 219 220 221/* 222 * Flag manipulation helpers 223 */ 224static void mcam_reset_buffers(struct mcam_camera *cam) 225{ 226 int i; 227 228 cam->next_buf = -1; 229 for (i = 0; i < cam->nbufs; i++) 230 clear_bit(i, &cam->flags); 231} 232 233static inline int mcam_needs_config(struct mcam_camera *cam) 234{ 235 return test_bit(CF_CONFIG_NEEDED, &cam->flags); 236} 237 238static void mcam_set_config_needed(struct mcam_camera *cam, int needed) 239{ 240 if (needed) 241 set_bit(CF_CONFIG_NEEDED, &cam->flags); 242 else 243 clear_bit(CF_CONFIG_NEEDED, &cam->flags); 244} 245 246/* ------------------------------------------------------------------- */ 247/* 248 * Make the controller start grabbing images. Everything must 249 * be set up before doing this. 250 */ 251static void mcam_ctlr_start(struct mcam_camera *cam) 252{ 253 /* set_bit performs a read, so no other barrier should be 254 needed here */ 255 mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); 256} 257 258static void mcam_ctlr_stop(struct mcam_camera *cam) 259{ 260 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 261} 262 263/* ------------------------------------------------------------------- */ 264 265#ifdef MCAM_MODE_VMALLOC 266/* 267 * Code specific to the vmalloc buffer mode. 268 */ 269 270/* 271 * Allocate in-kernel DMA buffers for vmalloc mode. 272 */ 273static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) 274{ 275 int i; 276 277 mcam_set_config_needed(cam, 1); 278 if (loadtime) 279 cam->dma_buf_size = dma_buf_size; 280 else 281 cam->dma_buf_size = cam->pix_format.sizeimage; 282 if (n_dma_bufs > 3) 283 n_dma_bufs = 3; 284 285 cam->nbufs = 0; 286 for (i = 0; i < n_dma_bufs; i++) { 287 cam->dma_bufs[i] = dma_alloc_coherent(cam->dev, 288 cam->dma_buf_size, cam->dma_handles + i, 289 GFP_KERNEL); 290 if (cam->dma_bufs[i] == NULL) { 291 cam_warn(cam, "Failed to allocate DMA buffer\n"); 292 break; 293 } 294 (cam->nbufs)++; 295 } 296 297 switch (cam->nbufs) { 298 case 1: 299 dma_free_coherent(cam->dev, cam->dma_buf_size, 300 cam->dma_bufs[0], cam->dma_handles[0]); 301 cam->nbufs = 0; 302 case 0: 303 cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); 304 return -ENOMEM; 305 306 case 2: 307 if (n_dma_bufs > 2) 308 cam_warn(cam, "Will limp along with only 2 buffers\n"); 309 break; 310 } 311 return 0; 312} 313 314static void mcam_free_dma_bufs(struct mcam_camera *cam) 315{ 316 int i; 317 318 for (i = 0; i < cam->nbufs; i++) { 319 dma_free_coherent(cam->dev, cam->dma_buf_size, 320 cam->dma_bufs[i], cam->dma_handles[i]); 321 cam->dma_bufs[i] = NULL; 322 } 323 cam->nbufs = 0; 324} 325 326 327/* 328 * Set up DMA buffers when operating in vmalloc mode 329 */ 330static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam) 331{ 332 /* 333 * Store the first two Y buffers (we aren't supporting 334 * planar formats for now, so no UV bufs). Then either 335 * set the third if it exists, or tell the controller 336 * to just use two. 337 */ 338 mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); 339 mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); 340 if (cam->nbufs > 2) { 341 mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); 342 mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); 343 } else 344 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); 345 if (cam->chip_id == V4L2_IDENT_CAFE) 346 mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */ 347} 348 349/* 350 * Copy data out to user space in the vmalloc case 351 */ 352static void mcam_frame_tasklet(unsigned long data) 353{ 354 struct mcam_camera *cam = (struct mcam_camera *) data; 355 int i; 356 unsigned long flags; 357 struct mcam_vb_buffer *buf; 358 359 spin_lock_irqsave(&cam->dev_lock, flags); 360 for (i = 0; i < cam->nbufs; i++) { 361 int bufno = cam->next_buf; 362 363 if (cam->state != S_STREAMING || bufno < 0) 364 break; /* I/O got stopped */ 365 if (++(cam->next_buf) >= cam->nbufs) 366 cam->next_buf = 0; 367 if (!test_bit(bufno, &cam->flags)) 368 continue; 369 if (list_empty(&cam->buffers)) { 370 singles++; 371 break; /* Leave it valid, hope for better later */ 372 } 373 delivered++; 374 clear_bit(bufno, &cam->flags); 375 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, 376 queue); 377 list_del_init(&buf->queue); 378 /* 379 * Drop the lock during the big copy. This *should* be safe... 380 */ 381 spin_unlock_irqrestore(&cam->dev_lock, flags); 382 memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno], 383 cam->pix_format.sizeimage); 384 mcam_buffer_done(cam, bufno, &buf->vb_buf); 385 spin_lock_irqsave(&cam->dev_lock, flags); 386 } 387 spin_unlock_irqrestore(&cam->dev_lock, flags); 388} 389 390 391/* 392 * Make sure our allocated buffers are up to the task. 393 */ 394static int mcam_check_dma_buffers(struct mcam_camera *cam) 395{ 396 if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage) 397 mcam_free_dma_bufs(cam); 398 if (cam->nbufs == 0) 399 return mcam_alloc_dma_bufs(cam, 0); 400 return 0; 401} 402 403static void mcam_vmalloc_done(struct mcam_camera *cam, int frame) 404{ 405 tasklet_schedule(&cam->s_tasklet); 406} 407 408#else /* MCAM_MODE_VMALLOC */ 409 410static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) 411{ 412 return 0; 413} 414 415static inline void mcam_free_dma_bufs(struct mcam_camera *cam) 416{ 417 return; 418} 419 420static inline int mcam_check_dma_buffers(struct mcam_camera *cam) 421{ 422 return 0; 423} 424 425 426 427#endif /* MCAM_MODE_VMALLOC */ 428 429 430#ifdef MCAM_MODE_DMA_CONTIG 431/* ---------------------------------------------------------------------- */ 432/* 433 * DMA-contiguous code. 434 */ 435/* 436 * Set up a contiguous buffer for the given frame. Here also is where 437 * the underrun strategy is set: if there is no buffer available, reuse 438 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to 439 * keep the interrupt handler from giving that buffer back to user 440 * space. In this way, we always have a buffer to DMA to and don't 441 * have to try to play games stopping and restarting the controller. 442 */ 443static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame) 444{ 445 struct mcam_vb_buffer *buf; 446 /* 447 * If there are no available buffers, go into single mode 448 */ 449 if (list_empty(&cam->buffers)) { 450 buf = cam->vb_bufs[frame ^ 0x1]; 451 cam->vb_bufs[frame] = buf; 452 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, 453 vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0)); 454 set_bit(CF_SINGLE_BUFFER, &cam->flags); 455 singles++; 456 return; 457 } 458 /* 459 * OK, we have a buffer we can use. 460 */ 461 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue); 462 list_del_init(&buf->queue); 463 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, 464 vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0)); 465 cam->vb_bufs[frame] = buf; 466 clear_bit(CF_SINGLE_BUFFER, &cam->flags); 467} 468 469/* 470 * Initial B_DMA_contig setup. 471 */ 472static void mcam_ctlr_dma_contig(struct mcam_camera *cam) 473{ 474 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); 475 cam->nbufs = 2; 476 mcam_set_contig_buffer(cam, 0); 477 mcam_set_contig_buffer(cam, 1); 478} 479 480/* 481 * Frame completion handling. 482 */ 483static void mcam_dma_contig_done(struct mcam_camera *cam, int frame) 484{ 485 struct mcam_vb_buffer *buf = cam->vb_bufs[frame]; 486 487 if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) { 488 delivered++; 489 mcam_buffer_done(cam, frame, &buf->vb_buf); 490 } 491 mcam_set_contig_buffer(cam, frame); 492} 493 494#endif /* MCAM_MODE_DMA_CONTIG */ 495 496#ifdef MCAM_MODE_DMA_SG 497/* ---------------------------------------------------------------------- */ 498/* 499 * Scatter/gather-specific code. 500 */ 501 502/* 503 * Set up the next buffer for S/G I/O; caller should be sure that 504 * the controller is stopped and a buffer is available. 505 */ 506static void mcam_sg_next_buffer(struct mcam_camera *cam) 507{ 508 struct mcam_vb_buffer *buf; 509 510 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue); 511 list_del_init(&buf->queue); 512 mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa); 513 mcam_reg_write(cam, REG_DESC_LEN_Y, 514 buf->dma_desc_nent*sizeof(struct mcam_dma_desc)); 515 mcam_reg_write(cam, REG_DESC_LEN_U, 0); 516 mcam_reg_write(cam, REG_DESC_LEN_V, 0); 517 cam->vb_bufs[0] = buf; 518} 519 520/* 521 * Initial B_DMA_sg setup 522 */ 523static void mcam_ctlr_dma_sg(struct mcam_camera *cam) 524{ 525 /* 526 * The list-empty condition can hit us at resume time 527 * if the buffer list was empty when the system was suspended. 528 */ 529 if (list_empty(&cam->buffers)) { 530 set_bit(CF_SG_RESTART, &cam->flags); 531 return; 532 } 533 534 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD); 535 mcam_sg_next_buffer(cam); 536 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA); 537 cam->nbufs = 3; 538} 539 540 541/* 542 * Frame completion with S/G is trickier. We can't muck with 543 * a descriptor chain on the fly, since the controller buffers it 544 * internally. So we have to actually stop and restart; Marvell 545 * says this is the way to do it. 546 * 547 * Of course, stopping is easier said than done; experience shows 548 * that the controller can start a frame *after* C0_ENABLE has been 549 * cleared. So when running in S/G mode, the controller is "stopped" 550 * on receipt of the start-of-frame interrupt. That means we can 551 * safely change the DMA descriptor array here and restart things 552 * (assuming there's another buffer waiting to go). 553 */ 554static void mcam_dma_sg_done(struct mcam_camera *cam, int frame) 555{ 556 struct mcam_vb_buffer *buf = cam->vb_bufs[0]; 557 558 /* 559 * Very Bad Not Good Things happen if you don't clear 560 * C1_DESC_ENA before making any descriptor changes. 561 */ 562 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA); 563 /* 564 * If we have another buffer available, put it in and 565 * restart the engine. 566 */ 567 if (!list_empty(&cam->buffers)) { 568 mcam_sg_next_buffer(cam); 569 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA); 570 mcam_ctlr_start(cam); 571 /* 572 * Otherwise set CF_SG_RESTART and the controller will 573 * be restarted once another buffer shows up. 574 */ 575 } else { 576 set_bit(CF_SG_RESTART, &cam->flags); 577 singles++; 578 cam->vb_bufs[0] = NULL; 579 } 580 /* 581 * Now we can give the completed frame back to user space. 582 */ 583 delivered++; 584 mcam_buffer_done(cam, frame, &buf->vb_buf); 585} 586 587 588/* 589 * Scatter/gather mode requires stopping the controller between 590 * frames so we can put in a new DMA descriptor array. If no new 591 * buffer exists at frame completion, the controller is left stopped; 592 * this function is charged with gettig things going again. 593 */ 594static void mcam_sg_restart(struct mcam_camera *cam) 595{ 596 mcam_ctlr_dma_sg(cam); 597 mcam_ctlr_start(cam); 598 clear_bit(CF_SG_RESTART, &cam->flags); 599} 600 601#else /* MCAM_MODE_DMA_SG */ 602 603static inline void mcam_sg_restart(struct mcam_camera *cam) 604{ 605 return; 606} 607 608#endif /* MCAM_MODE_DMA_SG */ 609 610/* ---------------------------------------------------------------------- */ 611/* 612 * Buffer-mode-independent controller code. 613 */ 614 615/* 616 * Image format setup 617 */ 618static void mcam_ctlr_image(struct mcam_camera *cam) 619{ 620 int imgsz; 621 struct v4l2_pix_format *fmt = &cam->pix_format; 622 623 imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | 624 (fmt->bytesperline & IMGSZ_H_MASK); 625 mcam_reg_write(cam, REG_IMGSIZE, imgsz); 626 mcam_reg_write(cam, REG_IMGOFFSET, 0); 627 /* YPITCH just drops the last two bits */ 628 mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, 629 IMGP_YP_MASK); 630 /* 631 * Tell the controller about the image format we are using. 632 */ 633 switch (cam->pix_format.pixelformat) { 634 case V4L2_PIX_FMT_YUYV: 635 mcam_reg_write_mask(cam, REG_CTRL0, 636 C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, 637 C0_DF_MASK); 638 break; 639 640 case V4L2_PIX_FMT_RGB444: 641 mcam_reg_write_mask(cam, REG_CTRL0, 642 C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, 643 C0_DF_MASK); 644 /* Alpha value? */ 645 break; 646 647 case V4L2_PIX_FMT_RGB565: 648 mcam_reg_write_mask(cam, REG_CTRL0, 649 C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, 650 C0_DF_MASK); 651 break; 652 653 default: 654 cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); 655 break; 656 } 657 /* 658 * Make sure it knows we want to use hsync/vsync. 659 */ 660 mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, 661 C0_SIFM_MASK); 662} 663 664 665/* 666 * Configure the controller for operation; caller holds the 667 * device mutex. 668 */ 669static int mcam_ctlr_configure(struct mcam_camera *cam) 670{ 671 unsigned long flags; 672 673 spin_lock_irqsave(&cam->dev_lock, flags); 674 clear_bit(CF_SG_RESTART, &cam->flags); 675 cam->dma_setup(cam); 676 mcam_ctlr_image(cam); 677 mcam_set_config_needed(cam, 0); 678 spin_unlock_irqrestore(&cam->dev_lock, flags); 679 return 0; 680} 681 682static void mcam_ctlr_irq_enable(struct mcam_camera *cam) 683{ 684 /* 685 * Clear any pending interrupts, since we do not 686 * expect to have I/O active prior to enabling. 687 */ 688 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); 689 mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); 690} 691 692static void mcam_ctlr_irq_disable(struct mcam_camera *cam) 693{ 694 mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); 695} 696 697 698 699static void mcam_ctlr_init(struct mcam_camera *cam) 700{ 701 unsigned long flags; 702 703 spin_lock_irqsave(&cam->dev_lock, flags); 704 /* 705 * Make sure it's not powered down. 706 */ 707 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 708 /* 709 * Turn off the enable bit. It sure should be off anyway, 710 * but it's good to be sure. 711 */ 712 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 713 /* 714 * Clock the sensor appropriately. Controller clock should 715 * be 48MHz, sensor "typical" value is half that. 716 */ 717 mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); 718 spin_unlock_irqrestore(&cam->dev_lock, flags); 719} 720 721 722/* 723 * Stop the controller, and don't return until we're really sure that no 724 * further DMA is going on. 725 */ 726static void mcam_ctlr_stop_dma(struct mcam_camera *cam) 727{ 728 unsigned long flags; 729 730 /* 731 * Theory: stop the camera controller (whether it is operating 732 * or not). Delay briefly just in case we race with the SOF 733 * interrupt, then wait until no DMA is active. 734 */ 735 spin_lock_irqsave(&cam->dev_lock, flags); 736 clear_bit(CF_SG_RESTART, &cam->flags); 737 mcam_ctlr_stop(cam); 738 cam->state = S_IDLE; 739 spin_unlock_irqrestore(&cam->dev_lock, flags); 740 msleep(40); 741 if (test_bit(CF_DMA_ACTIVE, &cam->flags)) 742 cam_err(cam, "Timeout waiting for DMA to end\n"); 743 /* This would be bad news - what now? */ 744 spin_lock_irqsave(&cam->dev_lock, flags); 745 mcam_ctlr_irq_disable(cam); 746 spin_unlock_irqrestore(&cam->dev_lock, flags); 747} 748 749/* 750 * Power up and down. 751 */ 752static void mcam_ctlr_power_up(struct mcam_camera *cam) 753{ 754 unsigned long flags; 755 756 spin_lock_irqsave(&cam->dev_lock, flags); 757 cam->plat_power_up(cam); 758 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 759 spin_unlock_irqrestore(&cam->dev_lock, flags); 760 msleep(5); /* Just to be sure */ 761} 762 763static void mcam_ctlr_power_down(struct mcam_camera *cam) 764{ 765 unsigned long flags; 766 767 spin_lock_irqsave(&cam->dev_lock, flags); 768 /* 769 * School of hard knocks department: be sure we do any register 770 * twiddling on the controller *before* calling the platform 771 * power down routine. 772 */ 773 mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); 774 cam->plat_power_down(cam); 775 spin_unlock_irqrestore(&cam->dev_lock, flags); 776} 777 778/* -------------------------------------------------------------------- */ 779/* 780 * Communications with the sensor. 781 */ 782 783static int __mcam_cam_reset(struct mcam_camera *cam) 784{ 785 return sensor_call(cam, core, reset, 0); 786} 787 788/* 789 * We have found the sensor on the i2c. Let's try to have a 790 * conversation. 791 */ 792static int mcam_cam_init(struct mcam_camera *cam) 793{ 794 struct v4l2_dbg_chip_ident chip; 795 int ret; 796 797 mutex_lock(&cam->s_mutex); 798 if (cam->state != S_NOTREADY) 799 cam_warn(cam, "Cam init with device in funky state %d", 800 cam->state); 801 ret = __mcam_cam_reset(cam); 802 if (ret) 803 goto out; 804 chip.ident = V4L2_IDENT_NONE; 805 chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; 806 chip.match.addr = cam->sensor_addr; 807 ret = sensor_call(cam, core, g_chip_ident, &chip); 808 if (ret) 809 goto out; 810 cam->sensor_type = chip.ident; 811 if (cam->sensor_type != V4L2_IDENT_OV7670) { 812 cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); 813 ret = -EINVAL; 814 goto out; 815 } 816/* Get/set parameters? */ 817 ret = 0; 818 cam->state = S_IDLE; 819out: 820 mcam_ctlr_power_down(cam); 821 mutex_unlock(&cam->s_mutex); 822 return ret; 823} 824 825/* 826 * Configure the sensor to match the parameters we have. Caller should 827 * hold s_mutex 828 */ 829static int mcam_cam_set_flip(struct mcam_camera *cam) 830{ 831 struct v4l2_control ctrl; 832 833 memset(&ctrl, 0, sizeof(ctrl)); 834 ctrl.id = V4L2_CID_VFLIP; 835 ctrl.value = flip; 836 return sensor_call(cam, core, s_ctrl, &ctrl); 837} 838 839 840static int mcam_cam_configure(struct mcam_camera *cam) 841{ 842 struct v4l2_mbus_framefmt mbus_fmt; 843 int ret; 844 845 v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); 846 ret = sensor_call(cam, core, init, 0); 847 if (ret == 0) 848 ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); 849 /* 850 * OV7670 does weird things if flip is set *before* format... 851 */ 852 ret += mcam_cam_set_flip(cam); 853 return ret; 854} 855 856/* 857 * Get everything ready, and start grabbing frames. 858 */ 859static int mcam_read_setup(struct mcam_camera *cam) 860{ 861 int ret; 862 unsigned long flags; 863 864 /* 865 * Configuration. If we still don't have DMA buffers, 866 * make one last, desperate attempt. 867 */ 868 if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 && 869 mcam_alloc_dma_bufs(cam, 0)) 870 return -ENOMEM; 871 872 if (mcam_needs_config(cam)) { 873 mcam_cam_configure(cam); 874 ret = mcam_ctlr_configure(cam); 875 if (ret) 876 return ret; 877 } 878 879 /* 880 * Turn it loose. 881 */ 882 spin_lock_irqsave(&cam->dev_lock, flags); 883 mcam_reset_buffers(cam); 884 mcam_ctlr_irq_enable(cam); 885 cam->state = S_STREAMING; 886 if (!test_bit(CF_SG_RESTART, &cam->flags)) 887 mcam_ctlr_start(cam); 888 spin_unlock_irqrestore(&cam->dev_lock, flags); 889 return 0; 890} 891 892/* ----------------------------------------------------------------------- */ 893/* 894 * Videobuf2 interface code. 895 */ 896 897static int mcam_vb_queue_setup(struct vb2_queue *vq, 898 const struct v4l2_format *fmt, unsigned int *nbufs, 899 unsigned int *num_planes, unsigned int sizes[], 900 void *alloc_ctxs[]) 901{ 902 struct mcam_camera *cam = vb2_get_drv_priv(vq); 903 int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2; 904 905 sizes[0] = cam->pix_format.sizeimage; 906 *num_planes = 1; /* Someday we have to support planar formats... */ 907 if (*nbufs < minbufs) 908 *nbufs = minbufs; 909 if (cam->buffer_mode == B_DMA_contig) 910 alloc_ctxs[0] = cam->vb_alloc_ctx; 911 return 0; 912} 913 914 915static void mcam_vb_buf_queue(struct vb2_buffer *vb) 916{ 917 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 918 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 919 unsigned long flags; 920 int start; 921 922 spin_lock_irqsave(&cam->dev_lock, flags); 923 start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers); 924 list_add(&mvb->queue, &cam->buffers); 925 if (test_bit(CF_SG_RESTART, &cam->flags)) 926 mcam_sg_restart(cam); 927 spin_unlock_irqrestore(&cam->dev_lock, flags); 928 if (start) 929 mcam_read_setup(cam); 930} 931 932 933/* 934 * vb2 uses these to release the mutex when waiting in dqbuf. I'm 935 * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs 936 * to be called with the mutex held), but better safe than sorry. 937 */ 938static void mcam_vb_wait_prepare(struct vb2_queue *vq) 939{ 940 struct mcam_camera *cam = vb2_get_drv_priv(vq); 941 942 mutex_unlock(&cam->s_mutex); 943} 944 945static void mcam_vb_wait_finish(struct vb2_queue *vq) 946{ 947 struct mcam_camera *cam = vb2_get_drv_priv(vq); 948 949 mutex_lock(&cam->s_mutex); 950} 951 952/* 953 * These need to be called with the mutex held from vb2 954 */ 955static int mcam_vb_start_streaming(struct vb2_queue *vq, unsigned int count) 956{ 957 struct mcam_camera *cam = vb2_get_drv_priv(vq); 958 959 if (cam->state != S_IDLE) { 960 INIT_LIST_HEAD(&cam->buffers); 961 return -EINVAL; 962 } 963 cam->sequence = 0; 964 /* 965 * Videobuf2 sneakily hoards all the buffers and won't 966 * give them to us until *after* streaming starts. But 967 * we can't actually start streaming until we have a 968 * destination. So go into a wait state and hope they 969 * give us buffers soon. 970 */ 971 if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) { 972 cam->state = S_BUFWAIT; 973 return 0; 974 } 975 return mcam_read_setup(cam); 976} 977 978static int mcam_vb_stop_streaming(struct vb2_queue *vq) 979{ 980 struct mcam_camera *cam = vb2_get_drv_priv(vq); 981 unsigned long flags; 982 983 if (cam->state == S_BUFWAIT) { 984 /* They never gave us buffers */ 985 cam->state = S_IDLE; 986 return 0; 987 } 988 if (cam->state != S_STREAMING) 989 return -EINVAL; 990 mcam_ctlr_stop_dma(cam); 991 /* 992 * VB2 reclaims the buffers, so we need to forget 993 * about them. 994 */ 995 spin_lock_irqsave(&cam->dev_lock, flags); 996 INIT_LIST_HEAD(&cam->buffers); 997 spin_unlock_irqrestore(&cam->dev_lock, flags); 998 return 0; 999} 1000 1001 1002static const struct vb2_ops mcam_vb2_ops = { 1003 .queue_setup = mcam_vb_queue_setup, 1004 .buf_queue = mcam_vb_buf_queue, 1005 .start_streaming = mcam_vb_start_streaming, 1006 .stop_streaming = mcam_vb_stop_streaming, 1007 .wait_prepare = mcam_vb_wait_prepare, 1008 .wait_finish = mcam_vb_wait_finish, 1009}; 1010 1011 1012#ifdef MCAM_MODE_DMA_SG 1013/* 1014 * Scatter/gather mode uses all of the above functions plus a 1015 * few extras to deal with DMA mapping. 1016 */ 1017static int mcam_vb_sg_buf_init(struct vb2_buffer *vb) 1018{ 1019 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 1020 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1021 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1; 1022 1023 mvb->dma_desc = dma_alloc_coherent(cam->dev, 1024 ndesc * sizeof(struct mcam_dma_desc), 1025 &mvb->dma_desc_pa, GFP_KERNEL); 1026 if (mvb->dma_desc == NULL) { 1027 cam_err(cam, "Unable to get DMA descriptor array\n"); 1028 return -ENOMEM; 1029 } 1030 return 0; 1031} 1032 1033static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb) 1034{ 1035 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 1036 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1037 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0); 1038 struct mcam_dma_desc *desc = mvb->dma_desc; 1039 struct scatterlist *sg; 1040 int i; 1041 1042 mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages, 1043 DMA_FROM_DEVICE); 1044 if (mvb->dma_desc_nent <= 0) 1045 return -EIO; /* Not sure what's right here */ 1046 for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) { 1047 desc->dma_addr = sg_dma_address(sg); 1048 desc->segment_len = sg_dma_len(sg); 1049 desc++; 1050 } 1051 return 0; 1052} 1053 1054static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb) 1055{ 1056 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1057 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0); 1058 1059 dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE); 1060 return 0; 1061} 1062 1063static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb) 1064{ 1065 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); 1066 struct mcam_vb_buffer *mvb = vb_to_mvb(vb); 1067 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1; 1068 1069 dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc), 1070 mvb->dma_desc, mvb->dma_desc_pa); 1071} 1072 1073 1074static const struct vb2_ops mcam_vb2_sg_ops = { 1075 .queue_setup = mcam_vb_queue_setup, 1076 .buf_init = mcam_vb_sg_buf_init, 1077 .buf_prepare = mcam_vb_sg_buf_prepare, 1078 .buf_queue = mcam_vb_buf_queue, 1079 .buf_finish = mcam_vb_sg_buf_finish, 1080 .buf_cleanup = mcam_vb_sg_buf_cleanup, 1081 .start_streaming = mcam_vb_start_streaming, 1082 .stop_streaming = mcam_vb_stop_streaming, 1083 .wait_prepare = mcam_vb_wait_prepare, 1084 .wait_finish = mcam_vb_wait_finish, 1085}; 1086 1087#endif /* MCAM_MODE_DMA_SG */ 1088 1089static int mcam_setup_vb2(struct mcam_camera *cam) 1090{ 1091 struct vb2_queue *vq = &cam->vb_queue; 1092 1093 memset(vq, 0, sizeof(*vq)); 1094 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1095 vq->drv_priv = cam; 1096 INIT_LIST_HEAD(&cam->buffers); 1097 switch (cam->buffer_mode) { 1098 case B_DMA_contig: 1099#ifdef MCAM_MODE_DMA_CONTIG 1100 vq->ops = &mcam_vb2_ops; 1101 vq->mem_ops = &vb2_dma_contig_memops; 1102 cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev); 1103 vq->io_modes = VB2_MMAP | VB2_USERPTR; 1104 cam->dma_setup = mcam_ctlr_dma_contig; 1105 cam->frame_complete = mcam_dma_contig_done; 1106#endif 1107 break; 1108 case B_DMA_sg: 1109#ifdef MCAM_MODE_DMA_SG 1110 vq->ops = &mcam_vb2_sg_ops; 1111 vq->mem_ops = &vb2_dma_sg_memops; 1112 vq->io_modes = VB2_MMAP | VB2_USERPTR; 1113 cam->dma_setup = mcam_ctlr_dma_sg; 1114 cam->frame_complete = mcam_dma_sg_done; 1115#endif 1116 break; 1117 case B_vmalloc: 1118#ifdef MCAM_MODE_VMALLOC 1119 tasklet_init(&cam->s_tasklet, mcam_frame_tasklet, 1120 (unsigned long) cam); 1121 vq->ops = &mcam_vb2_ops; 1122 vq->mem_ops = &vb2_vmalloc_memops; 1123 vq->buf_struct_size = sizeof(struct mcam_vb_buffer); 1124 vq->io_modes = VB2_MMAP; 1125 cam->dma_setup = mcam_ctlr_dma_vmalloc; 1126 cam->frame_complete = mcam_vmalloc_done; 1127#endif 1128 break; 1129 } 1130 return vb2_queue_init(vq); 1131} 1132 1133static void mcam_cleanup_vb2(struct mcam_camera *cam) 1134{ 1135 vb2_queue_release(&cam->vb_queue); 1136#ifdef MCAM_MODE_DMA_CONTIG 1137 if (cam->buffer_mode == B_DMA_contig) 1138 vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx); 1139#endif 1140} 1141 1142 1143/* ---------------------------------------------------------------------- */ 1144/* 1145 * The long list of V4L2 ioctl() operations. 1146 */ 1147 1148static int mcam_vidioc_streamon(struct file *filp, void *priv, 1149 enum v4l2_buf_type type) 1150{ 1151 struct mcam_camera *cam = filp->private_data; 1152 int ret; 1153 1154 mutex_lock(&cam->s_mutex); 1155 ret = vb2_streamon(&cam->vb_queue, type); 1156 mutex_unlock(&cam->s_mutex); 1157 return ret; 1158} 1159 1160 1161static int mcam_vidioc_streamoff(struct file *filp, void *priv, 1162 enum v4l2_buf_type type) 1163{ 1164 struct mcam_camera *cam = filp->private_data; 1165 int ret; 1166 1167 mutex_lock(&cam->s_mutex); 1168 ret = vb2_streamoff(&cam->vb_queue, type); 1169 mutex_unlock(&cam->s_mutex); 1170 return ret; 1171} 1172 1173 1174static int mcam_vidioc_reqbufs(struct file *filp, void *priv, 1175 struct v4l2_requestbuffers *req) 1176{ 1177 struct mcam_camera *cam = filp->private_data; 1178 int ret; 1179 1180 mutex_lock(&cam->s_mutex); 1181 ret = vb2_reqbufs(&cam->vb_queue, req); 1182 mutex_unlock(&cam->s_mutex); 1183 return ret; 1184} 1185 1186 1187static int mcam_vidioc_querybuf(struct file *filp, void *priv, 1188 struct v4l2_buffer *buf) 1189{ 1190 struct mcam_camera *cam = filp->private_data; 1191 int ret; 1192 1193 mutex_lock(&cam->s_mutex); 1194 ret = vb2_querybuf(&cam->vb_queue, buf); 1195 mutex_unlock(&cam->s_mutex); 1196 return ret; 1197} 1198 1199static int mcam_vidioc_qbuf(struct file *filp, void *priv, 1200 struct v4l2_buffer *buf) 1201{ 1202 struct mcam_camera *cam = filp->private_data; 1203 int ret; 1204 1205 mutex_lock(&cam->s_mutex); 1206 ret = vb2_qbuf(&cam->vb_queue, buf); 1207 mutex_unlock(&cam->s_mutex); 1208 return ret; 1209} 1210 1211static int mcam_vidioc_dqbuf(struct file *filp, void *priv, 1212 struct v4l2_buffer *buf) 1213{ 1214 struct mcam_camera *cam = filp->private_data; 1215 int ret; 1216 1217 mutex_lock(&cam->s_mutex); 1218 ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK); 1219 mutex_unlock(&cam->s_mutex); 1220 return ret; 1221} 1222 1223 1224 1225static int mcam_vidioc_queryctrl(struct file *filp, void *priv, 1226 struct v4l2_queryctrl *qc) 1227{ 1228 struct mcam_camera *cam = priv; 1229 int ret; 1230 1231 mutex_lock(&cam->s_mutex); 1232 ret = sensor_call(cam, core, queryctrl, qc); 1233 mutex_unlock(&cam->s_mutex); 1234 return ret; 1235} 1236 1237 1238static int mcam_vidioc_g_ctrl(struct file *filp, void *priv, 1239 struct v4l2_control *ctrl) 1240{ 1241 struct mcam_camera *cam = priv; 1242 int ret; 1243 1244 mutex_lock(&cam->s_mutex); 1245 ret = sensor_call(cam, core, g_ctrl, ctrl); 1246 mutex_unlock(&cam->s_mutex); 1247 return ret; 1248} 1249 1250 1251static int mcam_vidioc_s_ctrl(struct file *filp, void *priv, 1252 struct v4l2_control *ctrl) 1253{ 1254 struct mcam_camera *cam = priv; 1255 int ret; 1256 1257 mutex_lock(&cam->s_mutex); 1258 ret = sensor_call(cam, core, s_ctrl, ctrl); 1259 mutex_unlock(&cam->s_mutex); 1260 return ret; 1261} 1262 1263 1264static int mcam_vidioc_querycap(struct file *file, void *priv, 1265 struct v4l2_capability *cap) 1266{ 1267 strcpy(cap->driver, "marvell_ccic"); 1268 strcpy(cap->card, "marvell_ccic"); 1269 cap->version = 1; 1270 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 1271 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; 1272 return 0; 1273} 1274 1275 1276static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp, 1277 void *priv, struct v4l2_fmtdesc *fmt) 1278{ 1279 if (fmt->index >= N_MCAM_FMTS) 1280 return -EINVAL; 1281 strlcpy(fmt->description, mcam_formats[fmt->index].desc, 1282 sizeof(fmt->description)); 1283 fmt->pixelformat = mcam_formats[fmt->index].pixelformat; 1284 return 0; 1285} 1286 1287static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, 1288 struct v4l2_format *fmt) 1289{ 1290 struct mcam_camera *cam = priv; 1291 struct mcam_format_struct *f; 1292 struct v4l2_pix_format *pix = &fmt->fmt.pix; 1293 struct v4l2_mbus_framefmt mbus_fmt; 1294 int ret; 1295 1296 f = mcam_find_format(pix->pixelformat); 1297 pix->pixelformat = f->pixelformat; 1298 v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); 1299 mutex_lock(&cam->s_mutex); 1300 ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); 1301 mutex_unlock(&cam->s_mutex); 1302 v4l2_fill_pix_format(pix, &mbus_fmt); 1303 pix->bytesperline = pix->width * f->bpp; 1304 pix->sizeimage = pix->height * pix->bytesperline; 1305 return ret; 1306} 1307 1308static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, 1309 struct v4l2_format *fmt) 1310{ 1311 struct mcam_camera *cam = priv; 1312 struct mcam_format_struct *f; 1313 int ret; 1314 1315 /* 1316 * Can't do anything if the device is not idle 1317 * Also can't if there are streaming buffers in place. 1318 */ 1319 if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0) 1320 return -EBUSY; 1321 1322 f = mcam_find_format(fmt->fmt.pix.pixelformat); 1323 1324 /* 1325 * See if the formatting works in principle. 1326 */ 1327 ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt); 1328 if (ret) 1329 return ret; 1330 /* 1331 * Now we start to change things for real, so let's do it 1332 * under lock. 1333 */ 1334 mutex_lock(&cam->s_mutex); 1335 cam->pix_format = fmt->fmt.pix; 1336 cam->mbus_code = f->mbus_code; 1337 1338 /* 1339 * Make sure we have appropriate DMA buffers. 1340 */ 1341 if (cam->buffer_mode == B_vmalloc) { 1342 ret = mcam_check_dma_buffers(cam); 1343 if (ret) 1344 goto out; 1345 } 1346 mcam_set_config_needed(cam, 1); 1347 ret = 0; 1348out: 1349 mutex_unlock(&cam->s_mutex); 1350 return ret; 1351} 1352 1353/* 1354 * Return our stored notion of how the camera is/should be configured. 1355 * The V4l2 spec wants us to be smarter, and actually get this from 1356 * the camera (and not mess with it at open time). Someday. 1357 */ 1358static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, 1359 struct v4l2_format *f) 1360{ 1361 struct mcam_camera *cam = priv; 1362 1363 f->fmt.pix = cam->pix_format; 1364 return 0; 1365} 1366 1367/* 1368 * We only have one input - the sensor - so minimize the nonsense here. 1369 */ 1370static int mcam_vidioc_enum_input(struct file *filp, void *priv, 1371 struct v4l2_input *input) 1372{ 1373 if (input->index != 0) 1374 return -EINVAL; 1375 1376 input->type = V4L2_INPUT_TYPE_CAMERA; 1377 input->std = V4L2_STD_ALL; /* Not sure what should go here */ 1378 strcpy(input->name, "Camera"); 1379 return 0; 1380} 1381 1382static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) 1383{ 1384 *i = 0; 1385 return 0; 1386} 1387 1388static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i) 1389{ 1390 if (i != 0) 1391 return -EINVAL; 1392 return 0; 1393} 1394 1395/* from vivi.c */ 1396static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) 1397{ 1398 return 0; 1399} 1400 1401/* 1402 * G/S_PARM. Most of this is done by the sensor, but we are 1403 * the level which controls the number of read buffers. 1404 */ 1405static int mcam_vidioc_g_parm(struct file *filp, void *priv, 1406 struct v4l2_streamparm *parms) 1407{ 1408 struct mcam_camera *cam = priv; 1409 int ret; 1410 1411 mutex_lock(&cam->s_mutex); 1412 ret = sensor_call(cam, video, g_parm, parms); 1413 mutex_unlock(&cam->s_mutex); 1414 parms->parm.capture.readbuffers = n_dma_bufs; 1415 return ret; 1416} 1417 1418static int mcam_vidioc_s_parm(struct file *filp, void *priv, 1419 struct v4l2_streamparm *parms) 1420{ 1421 struct mcam_camera *cam = priv; 1422 int ret; 1423 1424 mutex_lock(&cam->s_mutex); 1425 ret = sensor_call(cam, video, s_parm, parms); 1426 mutex_unlock(&cam->s_mutex); 1427 parms->parm.capture.readbuffers = n_dma_bufs; 1428 return ret; 1429} 1430 1431static int mcam_vidioc_g_chip_ident(struct file *file, void *priv, 1432 struct v4l2_dbg_chip_ident *chip) 1433{ 1434 struct mcam_camera *cam = priv; 1435 1436 chip->ident = V4L2_IDENT_NONE; 1437 chip->revision = 0; 1438 if (v4l2_chip_match_host(&chip->match)) { 1439 chip->ident = cam->chip_id; 1440 return 0; 1441 } 1442 return sensor_call(cam, core, g_chip_ident, chip); 1443} 1444 1445static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv, 1446 struct v4l2_frmsizeenum *sizes) 1447{ 1448 struct mcam_camera *cam = priv; 1449 int ret; 1450 1451 mutex_lock(&cam->s_mutex); 1452 ret = sensor_call(cam, video, enum_framesizes, sizes); 1453 mutex_unlock(&cam->s_mutex); 1454 return ret; 1455} 1456 1457static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv, 1458 struct v4l2_frmivalenum *interval) 1459{ 1460 struct mcam_camera *cam = priv; 1461 int ret; 1462 1463 mutex_lock(&cam->s_mutex); 1464 ret = sensor_call(cam, video, enum_frameintervals, interval); 1465 mutex_unlock(&cam->s_mutex); 1466 return ret; 1467} 1468 1469#ifdef CONFIG_VIDEO_ADV_DEBUG 1470static int mcam_vidioc_g_register(struct file *file, void *priv, 1471 struct v4l2_dbg_register *reg) 1472{ 1473 struct mcam_camera *cam = priv; 1474 1475 if (v4l2_chip_match_host(®->match)) { 1476 reg->val = mcam_reg_read(cam, reg->reg); 1477 reg->size = 4; 1478 return 0; 1479 } 1480 return sensor_call(cam, core, g_register, reg); 1481} 1482 1483static int mcam_vidioc_s_register(struct file *file, void *priv, 1484 struct v4l2_dbg_register *reg) 1485{ 1486 struct mcam_camera *cam = priv; 1487 1488 if (v4l2_chip_match_host(®->match)) { 1489 mcam_reg_write(cam, reg->reg, reg->val); 1490 return 0; 1491 } 1492 return sensor_call(cam, core, s_register, reg); 1493} 1494#endif 1495 1496static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = { 1497 .vidioc_querycap = mcam_vidioc_querycap, 1498 .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap, 1499 .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap, 1500 .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap, 1501 .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap, 1502 .vidioc_enum_input = mcam_vidioc_enum_input, 1503 .vidioc_g_input = mcam_vidioc_g_input, 1504 .vidioc_s_input = mcam_vidioc_s_input, 1505 .vidioc_s_std = mcam_vidioc_s_std, 1506 .vidioc_reqbufs = mcam_vidioc_reqbufs, 1507 .vidioc_querybuf = mcam_vidioc_querybuf, 1508 .vidioc_qbuf = mcam_vidioc_qbuf, 1509 .vidioc_dqbuf = mcam_vidioc_dqbuf, 1510 .vidioc_streamon = mcam_vidioc_streamon, 1511 .vidioc_streamoff = mcam_vidioc_streamoff, 1512 .vidioc_queryctrl = mcam_vidioc_queryctrl, 1513 .vidioc_g_ctrl = mcam_vidioc_g_ctrl, 1514 .vidioc_s_ctrl = mcam_vidioc_s_ctrl, 1515 .vidioc_g_parm = mcam_vidioc_g_parm, 1516 .vidioc_s_parm = mcam_vidioc_s_parm, 1517 .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes, 1518 .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals, 1519 .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident, 1520#ifdef CONFIG_VIDEO_ADV_DEBUG 1521 .vidioc_g_register = mcam_vidioc_g_register, 1522 .vidioc_s_register = mcam_vidioc_s_register, 1523#endif 1524}; 1525 1526/* ---------------------------------------------------------------------- */ 1527/* 1528 * Our various file operations. 1529 */ 1530static int mcam_v4l_open(struct file *filp) 1531{ 1532 struct mcam_camera *cam = video_drvdata(filp); 1533 int ret = 0; 1534 1535 filp->private_data = cam; 1536 1537 frames = singles = delivered = 0; 1538 mutex_lock(&cam->s_mutex); 1539 if (cam->users == 0) { 1540 ret = mcam_setup_vb2(cam); 1541 if (ret) 1542 goto out; 1543 mcam_ctlr_power_up(cam); 1544 __mcam_cam_reset(cam); 1545 mcam_set_config_needed(cam, 1); 1546 } 1547 (cam->users)++; 1548out: 1549 mutex_unlock(&cam->s_mutex); 1550 return ret; 1551} 1552 1553 1554static int mcam_v4l_release(struct file *filp) 1555{ 1556 struct mcam_camera *cam = filp->private_data; 1557 1558 cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames, 1559 singles, delivered); 1560 mutex_lock(&cam->s_mutex); 1561 (cam->users)--; 1562 if (filp == cam->owner) { 1563 mcam_ctlr_stop_dma(cam); 1564 cam->owner = NULL; 1565 } 1566 if (cam->users == 0) { 1567 mcam_cleanup_vb2(cam); 1568 mcam_ctlr_power_down(cam); 1569 if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read) 1570 mcam_free_dma_bufs(cam); 1571 } 1572 mutex_unlock(&cam->s_mutex); 1573 return 0; 1574} 1575 1576static ssize_t mcam_v4l_read(struct file *filp, 1577 char __user *buffer, size_t len, loff_t *pos) 1578{ 1579 struct mcam_camera *cam = filp->private_data; 1580 int ret; 1581 1582 mutex_lock(&cam->s_mutex); 1583 ret = vb2_read(&cam->vb_queue, buffer, len, pos, 1584 filp->f_flags & O_NONBLOCK); 1585 mutex_unlock(&cam->s_mutex); 1586 return ret; 1587} 1588 1589 1590 1591static unsigned int mcam_v4l_poll(struct file *filp, 1592 struct poll_table_struct *pt) 1593{ 1594 struct mcam_camera *cam = filp->private_data; 1595 int ret; 1596 1597 mutex_lock(&cam->s_mutex); 1598 ret = vb2_poll(&cam->vb_queue, filp, pt); 1599 mutex_unlock(&cam->s_mutex); 1600 return ret; 1601} 1602 1603 1604static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma) 1605{ 1606 struct mcam_camera *cam = filp->private_data; 1607 int ret; 1608 1609 mutex_lock(&cam->s_mutex); 1610 ret = vb2_mmap(&cam->vb_queue, vma); 1611 mutex_unlock(&cam->s_mutex); 1612 return ret; 1613} 1614 1615 1616 1617static const struct v4l2_file_operations mcam_v4l_fops = { 1618 .owner = THIS_MODULE, 1619 .open = mcam_v4l_open, 1620 .release = mcam_v4l_release, 1621 .read = mcam_v4l_read, 1622 .poll = mcam_v4l_poll, 1623 .mmap = mcam_v4l_mmap, 1624 .unlocked_ioctl = video_ioctl2, 1625}; 1626 1627 1628/* 1629 * This template device holds all of those v4l2 methods; we 1630 * clone it for specific real devices. 1631 */ 1632static struct video_device mcam_v4l_template = { 1633 .name = "mcam", 1634 .tvnorms = V4L2_STD_NTSC_M, 1635 .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ 1636 1637 .fops = &mcam_v4l_fops, 1638 .ioctl_ops = &mcam_v4l_ioctl_ops, 1639 .release = video_device_release_empty, 1640}; 1641 1642/* ---------------------------------------------------------------------- */ 1643/* 1644 * Interrupt handler stuff 1645 */ 1646static void mcam_frame_complete(struct mcam_camera *cam, int frame) 1647{ 1648 /* 1649 * Basic frame housekeeping. 1650 */ 1651 set_bit(frame, &cam->flags); 1652 clear_bit(CF_DMA_ACTIVE, &cam->flags); 1653 cam->next_buf = frame; 1654 cam->buf_seq[frame] = ++(cam->sequence); 1655 frames++; 1656 /* 1657 * "This should never happen" 1658 */ 1659 if (cam->state != S_STREAMING) 1660 return; 1661 /* 1662 * Process the frame and set up the next one. 1663 */ 1664 cam->frame_complete(cam, frame); 1665} 1666 1667 1668/* 1669 * The interrupt handler; this needs to be called from the 1670 * platform irq handler with the lock held. 1671 */ 1672int mccic_irq(struct mcam_camera *cam, unsigned int irqs) 1673{ 1674 unsigned int frame, handled = 0; 1675 1676 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ 1677 /* 1678 * Handle any frame completions. There really should 1679 * not be more than one of these, or we have fallen 1680 * far behind. 1681 * 1682 * When running in S/G mode, the frame number lacks any 1683 * real meaning - there's only one descriptor array - but 1684 * the controller still picks a different one to signal 1685 * each time. 1686 */ 1687 for (frame = 0; frame < cam->nbufs; frame++) 1688 if (irqs & (IRQ_EOF0 << frame)) { 1689 mcam_frame_complete(cam, frame); 1690 handled = 1; 1691 } 1692 /* 1693 * If a frame starts, note that we have DMA active. This 1694 * code assumes that we won't get multiple frame interrupts 1695 * at once; may want to rethink that. 1696 */ 1697 if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) { 1698 set_bit(CF_DMA_ACTIVE, &cam->flags); 1699 handled = 1; 1700 if (cam->buffer_mode == B_DMA_sg) 1701 mcam_ctlr_stop(cam); 1702 } 1703 return handled; 1704} 1705 1706/* ---------------------------------------------------------------------- */ 1707/* 1708 * Registration and such. 1709 */ 1710static struct ov7670_config sensor_cfg = { 1711 /* 1712 * Exclude QCIF mode, because it only captures a tiny portion 1713 * of the sensor FOV 1714 */ 1715 .min_width = 320, 1716 .min_height = 240, 1717}; 1718 1719 1720int mccic_register(struct mcam_camera *cam) 1721{ 1722 struct i2c_board_info ov7670_info = { 1723 .type = "ov7670", 1724 .addr = 0x42 >> 1, 1725 .platform_data = &sensor_cfg, 1726 }; 1727 int ret; 1728 1729 /* 1730 * Validate the requested buffer mode. 1731 */ 1732 if (buffer_mode >= 0) 1733 cam->buffer_mode = buffer_mode; 1734 if (cam->buffer_mode == B_DMA_sg && 1735 cam->chip_id == V4L2_IDENT_CAFE) { 1736 printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, " 1737 "attempting vmalloc mode instead\n"); 1738 cam->buffer_mode = B_vmalloc; 1739 } 1740 if (!mcam_buffer_mode_supported(cam->buffer_mode)) { 1741 printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n", 1742 cam->buffer_mode); 1743 return -EINVAL; 1744 } 1745 /* 1746 * Register with V4L 1747 */ 1748 ret = v4l2_device_register(cam->dev, &cam->v4l2_dev); 1749 if (ret) 1750 return ret; 1751 1752 mutex_init(&cam->s_mutex); 1753 cam->state = S_NOTREADY; 1754 mcam_set_config_needed(cam, 1); 1755 cam->pix_format = mcam_def_pix_format; 1756 cam->mbus_code = mcam_def_mbus_code; 1757 INIT_LIST_HEAD(&cam->buffers); 1758 mcam_ctlr_init(cam); 1759 1760 /* 1761 * Try to find the sensor. 1762 */ 1763 sensor_cfg.clock_speed = cam->clock_speed; 1764 sensor_cfg.use_smbus = cam->use_smbus; 1765 cam->sensor_addr = ov7670_info.addr; 1766 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, 1767 cam->i2c_adapter, &ov7670_info, NULL); 1768 if (cam->sensor == NULL) { 1769 ret = -ENODEV; 1770 goto out_unregister; 1771 } 1772 1773 ret = mcam_cam_init(cam); 1774 if (ret) 1775 goto out_unregister; 1776 /* 1777 * Get the v4l2 setup done. 1778 */ 1779 mutex_lock(&cam->s_mutex); 1780 cam->vdev = mcam_v4l_template; 1781 cam->vdev.debug = 0; 1782 cam->vdev.v4l2_dev = &cam->v4l2_dev; 1783 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); 1784 if (ret) 1785 goto out; 1786 video_set_drvdata(&cam->vdev, cam); 1787 1788 /* 1789 * If so requested, try to get our DMA buffers now. 1790 */ 1791 if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) { 1792 if (mcam_alloc_dma_bufs(cam, 1)) 1793 cam_warn(cam, "Unable to alloc DMA buffers at load" 1794 " will try again later."); 1795 } 1796 1797out: 1798 mutex_unlock(&cam->s_mutex); 1799 return ret; 1800out_unregister: 1801 v4l2_device_unregister(&cam->v4l2_dev); 1802 return ret; 1803} 1804 1805 1806void mccic_shutdown(struct mcam_camera *cam) 1807{ 1808 /* 1809 * If we have no users (and we really, really should have no 1810 * users) the device will already be powered down. Trying to 1811 * take it down again will wedge the machine, which is frowned 1812 * upon. 1813 */ 1814 if (cam->users > 0) { 1815 cam_warn(cam, "Removing a device with users!\n"); 1816 mcam_ctlr_power_down(cam); 1817 } 1818 vb2_queue_release(&cam->vb_queue); 1819 if (cam->buffer_mode == B_vmalloc) 1820 mcam_free_dma_bufs(cam); 1821 video_unregister_device(&cam->vdev); 1822 v4l2_device_unregister(&cam->v4l2_dev); 1823} 1824 1825/* 1826 * Power management 1827 */ 1828#ifdef CONFIG_PM 1829 1830void mccic_suspend(struct mcam_camera *cam) 1831{ 1832 mutex_lock(&cam->s_mutex); 1833 if (cam->users > 0) { 1834 enum mcam_state cstate = cam->state; 1835 1836 mcam_ctlr_stop_dma(cam); 1837 mcam_ctlr_power_down(cam); 1838 cam->state = cstate; 1839 } 1840 mutex_unlock(&cam->s_mutex); 1841} 1842 1843int mccic_resume(struct mcam_camera *cam) 1844{ 1845 int ret = 0; 1846 1847 mutex_lock(&cam->s_mutex); 1848 if (cam->users > 0) { 1849 mcam_ctlr_power_up(cam); 1850 __mcam_cam_reset(cam); 1851 } else { 1852 mcam_ctlr_power_down(cam); 1853 } 1854 mutex_unlock(&cam->s_mutex); 1855 1856 set_bit(CF_CONFIG_NEEDED, &cam->flags); 1857 if (cam->state == S_STREAMING) { 1858 /* 1859 * If there was a buffer in the DMA engine at suspend 1860 * time, put it back on the queue or we'll forget about it. 1861 */ 1862 if (cam->buffer_mode == B_DMA_sg && cam->vb_bufs[0]) 1863 list_add(&cam->vb_bufs[0]->queue, &cam->buffers); 1864 ret = mcam_read_setup(cam); 1865 } 1866 return ret; 1867} 1868#endif /* CONFIG_PM */ 1869