1/* 2 * pcicfg.h: PCI configuration constants and structures. 3 * 4 * Copyright (C) 1999-2012, Broadcom Corporation 5 * 6 * Unless you and Broadcom execute a separate written software license 7 * agreement governing use of this software, this software is licensed to you 8 * under the terms of the GNU General Public License version 2 (the "GPL"), 9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10 * following added to such license: 11 * 12 * As a special exception, the copyright holders of this software give you 13 * permission to link this software with independent modules, and to copy and 14 * distribute the resulting executable under terms of your choice, provided that 15 * you also meet, for each linked independent module, the terms and conditions of 16 * the license of that module. An independent module is a module which is not 17 * derived from this software. The special exception does not apply to any 18 * modifications of the software. 19 * 20 * Notwithstanding the above, under no circumstances may you combine this 21 * software in any way with any other Broadcom software provided under a license 22 * other than the GPL, without Broadcom's express prior written consent. 23 * 24 * $Id: pcicfg.h 309193 2012-01-19 00:03:57Z $ 25 */ 26 27#ifndef _h_pcicfg_ 28#define _h_pcicfg_ 29 30 31#define PCI_CFG_VID 0 32#define PCI_CFG_DID 2 33#define PCI_CFG_CMD 4 34#define PCI_CFG_STAT 6 35#define PCI_CFG_REV 8 36#define PCI_CFG_PROGIF 9 37#define PCI_CFG_SUBCL 0xa 38#define PCI_CFG_BASECL 0xb 39#define PCI_CFG_CLSZ 0xc 40#define PCI_CFG_LATTIM 0xd 41#define PCI_CFG_HDR 0xe 42#define PCI_CFG_BIST 0xf 43#define PCI_CFG_BAR0 0x10 44#define PCI_CFG_BAR1 0x14 45#define PCI_CFG_BAR2 0x18 46#define PCI_CFG_BAR3 0x1c 47#define PCI_CFG_BAR4 0x20 48#define PCI_CFG_BAR5 0x24 49#define PCI_CFG_CIS 0x28 50#define PCI_CFG_SVID 0x2c 51#define PCI_CFG_SSID 0x2e 52#define PCI_CFG_ROMBAR 0x30 53#define PCI_CFG_CAPPTR 0x34 54#define PCI_CFG_INT 0x3c 55#define PCI_CFG_PIN 0x3d 56#define PCI_CFG_MINGNT 0x3e 57#define PCI_CFG_MAXLAT 0x3f 58#define PCI_BAR0_WIN 0x80 59#define PCI_BAR1_WIN 0x84 60#define PCI_SPROM_CONTROL 0x88 61#define PCI_BAR1_CONTROL 0x8c 62#define PCI_INT_STATUS 0x90 63#define PCI_INT_MASK 0x94 64#define PCI_TO_SB_MB 0x98 65#define PCI_BACKPLANE_ADDR 0xa0 66#define PCI_BACKPLANE_DATA 0xa4 67#define PCI_CLK_CTL_ST 0xa8 68#define PCI_BAR0_WIN2 0xac 69#define PCI_GPIO_IN 0xb0 70#define PCI_GPIO_OUT 0xb4 71#define PCI_GPIO_OUTEN 0xb8 72 73#define PCI_BAR0_SHADOW_OFFSET (2 * 1024) 74#define PCI_BAR0_SPROM_OFFSET (4 * 1024) 75#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) 76#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) 77 78#define PCIE2_BAR0_WIN2 0x70 79#define PCIE2_BAR0_CORE2_WIN 0x74 80#define PCIE2_BAR0_CORE2_WIN2 0x78 81 82#define PCI_BAR0_WINSZ (16 * 1024) 83 84#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) 85#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) 86#define PCI_16KBB0_WINSZ (16 * 1024) 87 88 89#define PCI_CONFIG_SPACE_SIZE 256 90#endif 91