1/* 2 * linux/drivers/s390/cio/qdio.h 3 * 4 * Copyright 2000,2009 IBM Corp. 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 6 * Jan Glauber <jang@linux.vnet.ibm.com> 7 */ 8#ifndef _CIO_QDIO_H 9#define _CIO_QDIO_H 10 11#include <asm/page.h> 12#include <asm/schid.h> 13#include <asm/debug.h> 14#include "chsc.h" 15 16#define QDIO_BUSY_BIT_PATIENCE (100 << 12) /* 100 microseconds */ 17#define QDIO_BUSY_BIT_RETRY_DELAY 10 /* 10 milliseconds */ 18#define QDIO_BUSY_BIT_RETRIES 1000 /* = 10s retry time */ 19#define QDIO_INPUT_THRESHOLD (500 << 12) /* 500 microseconds */ 20 21enum qdio_irq_states { 22 QDIO_IRQ_STATE_INACTIVE, 23 QDIO_IRQ_STATE_ESTABLISHED, 24 QDIO_IRQ_STATE_ACTIVE, 25 QDIO_IRQ_STATE_STOPPED, 26 QDIO_IRQ_STATE_CLEANUP, 27 QDIO_IRQ_STATE_ERR, 28 NR_QDIO_IRQ_STATES, 29}; 30 31/* used as intparm in do_IO */ 32#define QDIO_DOING_ESTABLISH 1 33#define QDIO_DOING_ACTIVATE 2 34#define QDIO_DOING_CLEANUP 3 35 36#define SLSB_STATE_NOT_INIT 0x0 37#define SLSB_STATE_EMPTY 0x1 38#define SLSB_STATE_PRIMED 0x2 39#define SLSB_STATE_PENDING 0x3 40#define SLSB_STATE_HALTED 0xe 41#define SLSB_STATE_ERROR 0xf 42#define SLSB_TYPE_INPUT 0x0 43#define SLSB_TYPE_OUTPUT 0x20 44#define SLSB_OWNER_PROG 0x80 45#define SLSB_OWNER_CU 0x40 46 47#define SLSB_P_INPUT_NOT_INIT \ 48 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT) /* 0x80 */ 49#define SLSB_P_INPUT_ACK \ 50 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x81 */ 51#define SLSB_CU_INPUT_EMPTY \ 52 (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x41 */ 53#define SLSB_P_INPUT_PRIMED \ 54 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED) /* 0x82 */ 55#define SLSB_P_INPUT_HALTED \ 56 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED) /* 0x8e */ 57#define SLSB_P_INPUT_ERROR \ 58 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR) /* 0x8f */ 59#define SLSB_P_OUTPUT_NOT_INIT \ 60 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */ 61#define SLSB_P_OUTPUT_EMPTY \ 62 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY) /* 0xa1 */ 63#define SLSB_P_OUTPUT_PENDING \ 64 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING) /* 0xa3 */ 65#define SLSB_CU_OUTPUT_PRIMED \ 66 (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED) /* 0x62 */ 67#define SLSB_P_OUTPUT_HALTED \ 68 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED) /* 0xae */ 69#define SLSB_P_OUTPUT_ERROR \ 70 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR) /* 0xaf */ 71 72#define SLSB_ERROR_DURING_LOOKUP 0xff 73 74/* additional CIWs returned by extended Sense-ID */ 75#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */ 76#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */ 77 78/* flags for st qdio sch data */ 79#define CHSC_FLAG_QDIO_CAPABILITY 0x80 80#define CHSC_FLAG_VALIDITY 0x40 81 82/* SIGA flags */ 83#define QDIO_SIGA_WRITE 0x00 84#define QDIO_SIGA_READ 0x01 85#define QDIO_SIGA_SYNC 0x02 86#define QDIO_SIGA_WRITEQ 0x04 87#define QDIO_SIGA_QEBSM_FLAG 0x80 88 89#ifdef CONFIG_64BIT 90static inline int do_sqbs(u64 token, unsigned char state, int queue, 91 int *start, int *count) 92{ 93 register unsigned long _ccq asm ("0") = *count; 94 register unsigned long _token asm ("1") = token; 95 unsigned long _queuestart = ((unsigned long)queue << 32) | *start; 96 97 asm volatile( 98 " .insn rsy,0xeb000000008A,%1,0,0(%2)" 99 : "+d" (_ccq), "+d" (_queuestart) 100 : "d" ((unsigned long)state), "d" (_token) 101 : "memory", "cc"); 102 *count = _ccq & 0xff; 103 *start = _queuestart & 0xff; 104 105 return (_ccq >> 32) & 0xff; 106} 107 108static inline int do_eqbs(u64 token, unsigned char *state, int queue, 109 int *start, int *count, int ack) 110{ 111 register unsigned long _ccq asm ("0") = *count; 112 register unsigned long _token asm ("1") = token; 113 unsigned long _queuestart = ((unsigned long)queue << 32) | *start; 114 unsigned long _state = (unsigned long)ack << 63; 115 116 asm volatile( 117 " .insn rrf,0xB99c0000,%1,%2,0,0" 118 : "+d" (_ccq), "+d" (_queuestart), "+d" (_state) 119 : "d" (_token) 120 : "memory", "cc"); 121 *count = _ccq & 0xff; 122 *start = _queuestart & 0xff; 123 *state = _state & 0xff; 124 125 return (_ccq >> 32) & 0xff; 126} 127#else 128static inline int do_sqbs(u64 token, unsigned char state, int queue, 129 int *start, int *count) { return 0; } 130static inline int do_eqbs(u64 token, unsigned char *state, int queue, 131 int *start, int *count, int ack) { return 0; } 132#endif /* CONFIG_64BIT */ 133 134struct qdio_irq; 135 136struct siga_flag { 137 u8 input:1; 138 u8 output:1; 139 u8 sync:1; 140 u8 sync_after_ai:1; 141 u8 sync_out_after_pci:1; 142 u8:3; 143} __attribute__ ((packed)); 144 145struct chsc_ssqd_area { 146 struct chsc_header request; 147 u16:10; 148 u8 ssid:2; 149 u8 fmt:4; 150 u16 first_sch; 151 u16:16; 152 u16 last_sch; 153 u32:32; 154 struct chsc_header response; 155 u32:32; 156 struct qdio_ssqd_desc qdio_ssqd; 157} __attribute__ ((packed)); 158 159struct scssc_area { 160 struct chsc_header request; 161 u16 operation_code; 162 u16:16; 163 u32:32; 164 u32:32; 165 u64 summary_indicator_addr; 166 u64 subchannel_indicator_addr; 167 u32 ks:4; 168 u32 kc:4; 169 u32:21; 170 u32 isc:3; 171 u32 word_with_d_bit; 172 u32:32; 173 struct subchannel_id schid; 174 u32 reserved[1004]; 175 struct chsc_header response; 176 u32:32; 177} __attribute__ ((packed)); 178 179struct qdio_dev_perf_stat { 180 unsigned int adapter_int; 181 unsigned int qdio_int; 182 unsigned int pci_request_int; 183 184 unsigned int tasklet_inbound; 185 unsigned int tasklet_inbound_resched; 186 unsigned int tasklet_inbound_resched2; 187 unsigned int tasklet_outbound; 188 189 unsigned int siga_read; 190 unsigned int siga_write; 191 unsigned int siga_sync; 192 193 unsigned int inbound_call; 194 unsigned int inbound_handler; 195 unsigned int stop_polling; 196 unsigned int inbound_queue_full; 197 unsigned int outbound_call; 198 unsigned int outbound_handler; 199 unsigned int outbound_queue_full; 200 unsigned int fast_requeue; 201 unsigned int target_full; 202 unsigned int eqbs; 203 unsigned int eqbs_partial; 204 unsigned int sqbs; 205 unsigned int sqbs_partial; 206 unsigned int int_discarded; 207} ____cacheline_aligned; 208 209struct qdio_queue_perf_stat { 210 /* 211 * Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128. 212 * Since max. 127 SBALs are scanned reuse entry for 128 as queue full 213 * aka 127 SBALs found. 214 */ 215 unsigned int nr_sbals[8]; 216 unsigned int nr_sbal_error; 217 unsigned int nr_sbal_nop; 218 unsigned int nr_sbal_total; 219}; 220 221enum qdio_queue_irq_states { 222 QDIO_QUEUE_IRQS_DISABLED, 223}; 224 225struct qdio_input_q { 226 /* input buffer acknowledgement flag */ 227 int polling; 228 /* first ACK'ed buffer */ 229 int ack_start; 230 /* how much sbals are acknowledged with qebsm */ 231 int ack_count; 232 /* last time of noticing incoming data */ 233 u64 timestamp; 234 /* upper-layer polling flag */ 235 unsigned long queue_irq_state; 236 /* callback to start upper-layer polling */ 237 void (*queue_start_poll) (struct ccw_device *, int, unsigned long); 238}; 239 240struct qdio_output_q { 241 /* PCIs are enabled for the queue */ 242 int pci_out_enabled; 243 /* cq: use asynchronous output buffers */ 244 int use_cq; 245 /* cq: aobs used for particual SBAL */ 246 struct qaob **aobs; 247 /* cq: sbal state related to asynchronous operation */ 248 struct qdio_outbuf_state *sbal_state; 249 /* timer to check for more outbound work */ 250 struct timer_list timer; 251 /* used SBALs before tasklet schedule */ 252 int scan_threshold; 253}; 254 255/* 256 * Note on cache alignment: grouped slsb and write mostly data at the beginning 257 * sbal[] is read-only and starts on a new cacheline followed by read mostly. 258 */ 259struct qdio_q { 260 struct slsb slsb; 261 262 union { 263 struct qdio_input_q in; 264 struct qdio_output_q out; 265 } u; 266 267 /* 268 * inbound: next buffer the program should check for 269 * outbound: next buffer to check if adapter processed it 270 */ 271 int first_to_check; 272 273 /* first_to_check of the last time */ 274 int last_move; 275 276 /* beginning position for calling the program */ 277 int first_to_kick; 278 279 /* number of buffers in use by the adapter */ 280 atomic_t nr_buf_used; 281 282 /* error condition during a data transfer */ 283 unsigned int qdio_error; 284 285 /* last scan of the queue */ 286 u64 timestamp; 287 288 struct tasklet_struct tasklet; 289 struct qdio_queue_perf_stat q_stats; 290 291 struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned; 292 293 /* queue number */ 294 int nr; 295 296 /* bitmask of queue number */ 297 int mask; 298 299 /* input or output queue */ 300 int is_input_q; 301 302 /* list of thinint input queues */ 303 struct list_head entry; 304 305 /* upper-layer program handler */ 306 qdio_handler_t (*handler); 307 308 struct dentry *debugfs_q; 309 struct qdio_irq *irq_ptr; 310 struct sl *sl; 311 /* 312 * A page is allocated under this pointer and used for slib and sl. 313 * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2. 314 */ 315 struct slib *slib; 316} __attribute__ ((aligned(256))); 317 318struct qdio_irq { 319 struct qib qib; 320 u32 *dsci; /* address of device state change indicator */ 321 struct ccw_device *cdev; 322 struct dentry *debugfs_dev; 323 struct dentry *debugfs_perf; 324 325 unsigned long int_parm; 326 struct subchannel_id schid; 327 unsigned long sch_token; /* QEBSM facility */ 328 329 enum qdio_irq_states state; 330 331 struct siga_flag siga_flag; /* siga sync information from qdioac */ 332 333 int nr_input_qs; 334 int nr_output_qs; 335 336 struct ccw1 ccw; 337 struct ciw equeue; 338 struct ciw aqueue; 339 340 struct qdio_ssqd_desc ssqd_desc; 341 void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *); 342 343 int perf_stat_enabled; 344 345 struct qdr *qdr; 346 unsigned long chsc_page; 347 348 struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ]; 349 struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ]; 350 351 debug_info_t *debug_area; 352 struct mutex setup_mutex; 353 struct qdio_dev_perf_stat perf_stat; 354}; 355 356/* helper functions */ 357#define queue_type(q) q->irq_ptr->qib.qfmt 358#define SCH_NO(q) (q->irq_ptr->schid.sch_no) 359 360#define is_thinint_irq(irq) \ 361 (irq->qib.qfmt == QDIO_IQDIO_QFMT || \ 362 css_general_characteristics.aif_osa) 363 364#define qperf(__qdev, __attr) ((__qdev)->perf_stat.(__attr)) 365 366#define qperf_inc(__q, __attr) \ 367({ \ 368 struct qdio_irq *qdev = (__q)->irq_ptr; \ 369 if (qdev->perf_stat_enabled) \ 370 (qdev->perf_stat.__attr)++; \ 371}) 372 373static inline void account_sbals_error(struct qdio_q *q, int count) 374{ 375 q->q_stats.nr_sbal_error += count; 376 q->q_stats.nr_sbal_total += count; 377} 378 379/* the highest iqdio queue is used for multicast */ 380static inline int multicast_outbound(struct qdio_q *q) 381{ 382 return (q->irq_ptr->nr_output_qs > 1) && 383 (q->nr == q->irq_ptr->nr_output_qs - 1); 384} 385 386#define pci_out_supported(q) \ 387 (q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) 388#define is_qebsm(q) (q->irq_ptr->sch_token != 0) 389 390#define need_siga_in(q) (q->irq_ptr->siga_flag.input) 391#define need_siga_out(q) (q->irq_ptr->siga_flag.output) 392#define need_siga_sync(q) (unlikely(q->irq_ptr->siga_flag.sync)) 393#define need_siga_sync_after_ai(q) \ 394 (unlikely(q->irq_ptr->siga_flag.sync_after_ai)) 395#define need_siga_sync_out_after_pci(q) \ 396 (unlikely(q->irq_ptr->siga_flag.sync_out_after_pci)) 397 398#define for_each_input_queue(irq_ptr, q, i) \ 399 for (i = 0, q = irq_ptr->input_qs[0]; \ 400 i < irq_ptr->nr_input_qs; \ 401 q = irq_ptr->input_qs[++i]) 402#define for_each_output_queue(irq_ptr, q, i) \ 403 for (i = 0, q = irq_ptr->output_qs[0]; \ 404 i < irq_ptr->nr_output_qs; \ 405 q = irq_ptr->output_qs[++i]) 406 407#define prev_buf(bufnr) \ 408 ((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK) 409#define next_buf(bufnr) \ 410 ((bufnr + 1) & QDIO_MAX_BUFFERS_MASK) 411#define add_buf(bufnr, inc) \ 412 ((bufnr + inc) & QDIO_MAX_BUFFERS_MASK) 413#define sub_buf(bufnr, dec) \ 414 ((bufnr - dec) & QDIO_MAX_BUFFERS_MASK) 415 416#define queue_irqs_enabled(q) \ 417 (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) == 0) 418#define queue_irqs_disabled(q) \ 419 (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) != 0) 420 421extern u64 last_ai_time; 422 423/* prototypes for thin interrupt */ 424void qdio_setup_thinint(struct qdio_irq *irq_ptr); 425int qdio_establish_thinint(struct qdio_irq *irq_ptr); 426void qdio_shutdown_thinint(struct qdio_irq *irq_ptr); 427void tiqdio_add_input_queues(struct qdio_irq *irq_ptr); 428void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr); 429void tiqdio_inbound_processing(unsigned long q); 430int tiqdio_allocate_memory(void); 431void tiqdio_free_memory(void); 432int tiqdio_register_thinints(void); 433void tiqdio_unregister_thinints(void); 434void clear_nonshared_ind(struct qdio_irq *); 435int test_nonshared_ind(struct qdio_irq *); 436 437/* prototypes for setup */ 438void qdio_inbound_processing(unsigned long data); 439void qdio_outbound_processing(unsigned long data); 440void qdio_outbound_timer(unsigned long data); 441void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, 442 struct irb *irb); 443int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, 444 int nr_output_qs); 445void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr); 446int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr, 447 struct subchannel_id *schid, 448 struct qdio_ssqd_desc *data); 449int qdio_setup_irq(struct qdio_initialize *init_data); 450void qdio_print_subchannel_info(struct qdio_irq *irq_ptr, 451 struct ccw_device *cdev); 452void qdio_release_memory(struct qdio_irq *irq_ptr); 453int qdio_setup_create_sysfs(struct ccw_device *cdev); 454void qdio_setup_destroy_sysfs(struct ccw_device *cdev); 455int qdio_setup_init(void); 456void qdio_setup_exit(void); 457int qdio_enable_async_operation(struct qdio_output_q *q); 458void qdio_disable_async_operation(struct qdio_output_q *q); 459struct qaob *qdio_allocate_aob(void); 460 461int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, 462 unsigned char *state); 463#endif /* _CIO_QDIO_H */ 464