1/* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2011 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7#include "qla_def.h" 8 9#include <linux/moduleparam.h> 10#include <linux/vmalloc.h> 11#include <linux/delay.h> 12#include <linux/kthread.h> 13#include <linux/mutex.h> 14#include <linux/kobject.h> 15#include <linux/slab.h> 16 17#include <scsi/scsi_tcq.h> 18#include <scsi/scsicam.h> 19#include <scsi/scsi_transport.h> 20#include <scsi/scsi_transport_fc.h> 21 22/* 23 * Driver version 24 */ 25char qla2x00_version_str[40]; 26 27static int apidev_major; 28 29/* 30 * SRB allocation cache 31 */ 32static struct kmem_cache *srb_cachep; 33 34/* 35 * CT6 CTX allocation cache 36 */ 37static struct kmem_cache *ctx_cachep; 38/* 39 * error level for logging 40 */ 41int ql_errlev = ql_log_all; 42 43int ql2xlogintimeout = 20; 44module_param(ql2xlogintimeout, int, S_IRUGO); 45MODULE_PARM_DESC(ql2xlogintimeout, 46 "Login timeout value in seconds."); 47 48int qlport_down_retry; 49module_param(qlport_down_retry, int, S_IRUGO); 50MODULE_PARM_DESC(qlport_down_retry, 51 "Maximum number of command retries to a port that returns " 52 "a PORT-DOWN status."); 53 54int ql2xplogiabsentdevice; 55module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR); 56MODULE_PARM_DESC(ql2xplogiabsentdevice, 57 "Option to enable PLOGI to devices that are not present after " 58 "a Fabric scan. This is needed for several broken switches. " 59 "Default is 0 - no PLOGI. 1 - perfom PLOGI."); 60 61int ql2xloginretrycount = 0; 62module_param(ql2xloginretrycount, int, S_IRUGO); 63MODULE_PARM_DESC(ql2xloginretrycount, 64 "Specify an alternate value for the NVRAM login retry count."); 65 66int ql2xallocfwdump = 1; 67module_param(ql2xallocfwdump, int, S_IRUGO); 68MODULE_PARM_DESC(ql2xallocfwdump, 69 "Option to enable allocation of memory for a firmware dump " 70 "during HBA initialization. Memory allocation requirements " 71 "vary by ISP type. Default is 1 - allocate memory."); 72 73int ql2xextended_error_logging; 74module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR); 75MODULE_PARM_DESC(ql2xextended_error_logging, 76 "Option to enable extended error logging,\n" 77 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n" 78 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n" 79 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n" 80 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n" 81 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n" 82 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n" 83 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n" 84 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n" 85 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n" 86 "\t\t0x1e400000 - Preferred value for capturing essential " 87 "debug information (equivalent to old " 88 "ql2xextended_error_logging=1).\n" 89 "\t\tDo LOGICAL OR of the value to enable more than one level"); 90 91int ql2xshiftctondsd = 6; 92module_param(ql2xshiftctondsd, int, S_IRUGO); 93MODULE_PARM_DESC(ql2xshiftctondsd, 94 "Set to control shifting of command type processing " 95 "based on total number of SG elements."); 96 97static void qla2x00_free_device(scsi_qla_host_t *); 98 99int ql2xfdmienable=1; 100module_param(ql2xfdmienable, int, S_IRUGO); 101MODULE_PARM_DESC(ql2xfdmienable, 102 "Enables FDMI registrations. " 103 "0 - no FDMI. Default is 1 - perform FDMI."); 104 105#define MAX_Q_DEPTH 32 106static int ql2xmaxqdepth = MAX_Q_DEPTH; 107module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR); 108MODULE_PARM_DESC(ql2xmaxqdepth, 109 "Maximum queue depth to report for target devices."); 110 111/* Do not change the value of this after module load */ 112int ql2xenabledif = 0; 113module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR); 114MODULE_PARM_DESC(ql2xenabledif, 115 " Enable T10-CRC-DIF " 116 " Default is 0 - No DIF Support. 1 - Enable it" 117 ", 2 - Enable DIF for all types, except Type 0."); 118 119int ql2xenablehba_err_chk = 2; 120module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR); 121MODULE_PARM_DESC(ql2xenablehba_err_chk, 122 " Enable T10-CRC-DIF Error isolation by HBA:\n" 123 " Default is 1.\n" 124 " 0 -- Error isolation disabled\n" 125 " 1 -- Error isolation enabled only for DIX Type 0\n" 126 " 2 -- Error isolation enabled for all Types\n"); 127 128int ql2xiidmaenable=1; 129module_param(ql2xiidmaenable, int, S_IRUGO); 130MODULE_PARM_DESC(ql2xiidmaenable, 131 "Enables iIDMA settings " 132 "Default is 1 - perform iIDMA. 0 - no iIDMA."); 133 134int ql2xmaxqueues = 1; 135module_param(ql2xmaxqueues, int, S_IRUGO); 136MODULE_PARM_DESC(ql2xmaxqueues, 137 "Enables MQ settings " 138 "Default is 1 for single queue. Set it to number " 139 "of queues in MQ mode."); 140 141int ql2xmultique_tag; 142module_param(ql2xmultique_tag, int, S_IRUGO); 143MODULE_PARM_DESC(ql2xmultique_tag, 144 "Enables CPU affinity settings for the driver " 145 "Default is 0 for no affinity of request and response IO. " 146 "Set it to 1 to turn on the cpu affinity."); 147 148int ql2xfwloadbin; 149module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR); 150MODULE_PARM_DESC(ql2xfwloadbin, 151 "Option to specify location from which to load ISP firmware:.\n" 152 " 2 -- load firmware via the request_firmware() (hotplug).\n" 153 " interface.\n" 154 " 1 -- load firmware from flash.\n" 155 " 0 -- use default semantics.\n"); 156 157int ql2xetsenable; 158module_param(ql2xetsenable, int, S_IRUGO); 159MODULE_PARM_DESC(ql2xetsenable, 160 "Enables firmware ETS burst." 161 "Default is 0 - skip ETS enablement."); 162 163int ql2xdbwr = 1; 164module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR); 165MODULE_PARM_DESC(ql2xdbwr, 166 "Option to specify scheme for request queue posting.\n" 167 " 0 -- Regular doorbell.\n" 168 " 1 -- CAMRAM doorbell (faster).\n"); 169 170int ql2xtargetreset = 1; 171module_param(ql2xtargetreset, int, S_IRUGO); 172MODULE_PARM_DESC(ql2xtargetreset, 173 "Enable target reset." 174 "Default is 1 - use hw defaults."); 175 176int ql2xgffidenable; 177module_param(ql2xgffidenable, int, S_IRUGO); 178MODULE_PARM_DESC(ql2xgffidenable, 179 "Enables GFF_ID checks of port type. " 180 "Default is 0 - Do not use GFF_ID information."); 181 182int ql2xasynctmfenable; 183module_param(ql2xasynctmfenable, int, S_IRUGO); 184MODULE_PARM_DESC(ql2xasynctmfenable, 185 "Enables issue of TM IOCBs asynchronously via IOCB mechanism" 186 "Default is 0 - Issue TM IOCBs via mailbox mechanism."); 187 188int ql2xdontresethba; 189module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR); 190MODULE_PARM_DESC(ql2xdontresethba, 191 "Option to specify reset behaviour.\n" 192 " 0 (Default) -- Reset on failure.\n" 193 " 1 -- Do not reset on failure.\n"); 194 195uint ql2xmaxlun = MAX_LUNS; 196module_param(ql2xmaxlun, uint, S_IRUGO); 197MODULE_PARM_DESC(ql2xmaxlun, 198 "Defines the maximum LU number to register with the SCSI " 199 "midlayer. Default is 65535."); 200 201int ql2xmdcapmask = 0x1F; 202module_param(ql2xmdcapmask, int, S_IRUGO); 203MODULE_PARM_DESC(ql2xmdcapmask, 204 "Set the Minidump driver capture mask level. " 205 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F."); 206 207int ql2xmdenable = 1; 208module_param(ql2xmdenable, int, S_IRUGO); 209MODULE_PARM_DESC(ql2xmdenable, 210 "Enable/disable MiniDump. " 211 "0 - MiniDump disabled. " 212 "1 (Default) - MiniDump enabled."); 213 214/* 215 * SCSI host template entry points 216 */ 217static int qla2xxx_slave_configure(struct scsi_device * device); 218static int qla2xxx_slave_alloc(struct scsi_device *); 219static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time); 220static void qla2xxx_scan_start(struct Scsi_Host *); 221static void qla2xxx_slave_destroy(struct scsi_device *); 222static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd); 223static int qla2xxx_eh_abort(struct scsi_cmnd *); 224static int qla2xxx_eh_device_reset(struct scsi_cmnd *); 225static int qla2xxx_eh_target_reset(struct scsi_cmnd *); 226static int qla2xxx_eh_bus_reset(struct scsi_cmnd *); 227static int qla2xxx_eh_host_reset(struct scsi_cmnd *); 228 229static int qla2x00_change_queue_depth(struct scsi_device *, int, int); 230static int qla2x00_change_queue_type(struct scsi_device *, int); 231 232struct scsi_host_template qla2xxx_driver_template = { 233 .module = THIS_MODULE, 234 .name = QLA2XXX_DRIVER_NAME, 235 .queuecommand = qla2xxx_queuecommand, 236 237 .eh_abort_handler = qla2xxx_eh_abort, 238 .eh_device_reset_handler = qla2xxx_eh_device_reset, 239 .eh_target_reset_handler = qla2xxx_eh_target_reset, 240 .eh_bus_reset_handler = qla2xxx_eh_bus_reset, 241 .eh_host_reset_handler = qla2xxx_eh_host_reset, 242 243 .slave_configure = qla2xxx_slave_configure, 244 245 .slave_alloc = qla2xxx_slave_alloc, 246 .slave_destroy = qla2xxx_slave_destroy, 247 .scan_finished = qla2xxx_scan_finished, 248 .scan_start = qla2xxx_scan_start, 249 .change_queue_depth = qla2x00_change_queue_depth, 250 .change_queue_type = qla2x00_change_queue_type, 251 .this_id = -1, 252 .cmd_per_lun = 3, 253 .use_clustering = ENABLE_CLUSTERING, 254 .sg_tablesize = SG_ALL, 255 256 .max_sectors = 0xFFFF, 257 .shost_attrs = qla2x00_host_attrs, 258}; 259 260static struct scsi_transport_template *qla2xxx_transport_template = NULL; 261struct scsi_transport_template *qla2xxx_transport_vport_template = NULL; 262 263/* TODO Convert to inlines 264 * 265 * Timer routines 266 */ 267 268__inline__ void 269qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval) 270{ 271 init_timer(&vha->timer); 272 vha->timer.expires = jiffies + interval * HZ; 273 vha->timer.data = (unsigned long)vha; 274 vha->timer.function = (void (*)(unsigned long))func; 275 add_timer(&vha->timer); 276 vha->timer_active = 1; 277} 278 279static inline void 280qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval) 281{ 282 /* Currently used for 82XX only. */ 283 if (vha->device_flags & DFLG_DEV_FAILED) { 284 ql_dbg(ql_dbg_timer, vha, 0x600d, 285 "Device in a failed state, returning.\n"); 286 return; 287 } 288 289 mod_timer(&vha->timer, jiffies + interval * HZ); 290} 291 292static __inline__ void 293qla2x00_stop_timer(scsi_qla_host_t *vha) 294{ 295 del_timer_sync(&vha->timer); 296 vha->timer_active = 0; 297} 298 299static int qla2x00_do_dpc(void *data); 300 301static void qla2x00_rst_aen(scsi_qla_host_t *); 302 303static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t, 304 struct req_que **, struct rsp_que **); 305static void qla2x00_free_fw_dump(struct qla_hw_data *); 306static void qla2x00_mem_free(struct qla_hw_data *); 307static void qla2x00_sp_free_dma(srb_t *); 308 309/* -------------------------------------------------------------------------- */ 310static int qla2x00_alloc_queues(struct qla_hw_data *ha) 311{ 312 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 313 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues, 314 GFP_KERNEL); 315 if (!ha->req_q_map) { 316 ql_log(ql_log_fatal, vha, 0x003b, 317 "Unable to allocate memory for request queue ptrs.\n"); 318 goto fail_req_map; 319 } 320 321 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues, 322 GFP_KERNEL); 323 if (!ha->rsp_q_map) { 324 ql_log(ql_log_fatal, vha, 0x003c, 325 "Unable to allocate memory for response queue ptrs.\n"); 326 goto fail_rsp_map; 327 } 328 set_bit(0, ha->rsp_qid_map); 329 set_bit(0, ha->req_qid_map); 330 return 1; 331 332fail_rsp_map: 333 kfree(ha->req_q_map); 334 ha->req_q_map = NULL; 335fail_req_map: 336 return -ENOMEM; 337} 338 339static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req) 340{ 341 if (req && req->ring) 342 dma_free_coherent(&ha->pdev->dev, 343 (req->length + 1) * sizeof(request_t), 344 req->ring, req->dma); 345 346 kfree(req); 347 req = NULL; 348} 349 350static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp) 351{ 352 if (rsp && rsp->ring) 353 dma_free_coherent(&ha->pdev->dev, 354 (rsp->length + 1) * sizeof(response_t), 355 rsp->ring, rsp->dma); 356 357 kfree(rsp); 358 rsp = NULL; 359} 360 361static void qla2x00_free_queues(struct qla_hw_data *ha) 362{ 363 struct req_que *req; 364 struct rsp_que *rsp; 365 int cnt; 366 367 for (cnt = 0; cnt < ha->max_req_queues; cnt++) { 368 req = ha->req_q_map[cnt]; 369 qla2x00_free_req_que(ha, req); 370 } 371 kfree(ha->req_q_map); 372 ha->req_q_map = NULL; 373 374 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) { 375 rsp = ha->rsp_q_map[cnt]; 376 qla2x00_free_rsp_que(ha, rsp); 377 } 378 kfree(ha->rsp_q_map); 379 ha->rsp_q_map = NULL; 380} 381 382static int qla25xx_setup_mode(struct scsi_qla_host *vha) 383{ 384 uint16_t options = 0; 385 int ques, req, ret; 386 struct qla_hw_data *ha = vha->hw; 387 388 if (!(ha->fw_attributes & BIT_6)) { 389 ql_log(ql_log_warn, vha, 0x00d8, 390 "Firmware is not multi-queue capable.\n"); 391 goto fail; 392 } 393 if (ql2xmultique_tag) { 394 /* create a request queue for IO */ 395 options |= BIT_7; 396 req = qla25xx_create_req_que(ha, options, 0, 0, -1, 397 QLA_DEFAULT_QUE_QOS); 398 if (!req) { 399 ql_log(ql_log_warn, vha, 0x00e0, 400 "Failed to create request queue.\n"); 401 goto fail; 402 } 403 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1); 404 vha->req = ha->req_q_map[req]; 405 options |= BIT_1; 406 for (ques = 1; ques < ha->max_rsp_queues; ques++) { 407 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req); 408 if (!ret) { 409 ql_log(ql_log_warn, vha, 0x00e8, 410 "Failed to create response queue.\n"); 411 goto fail2; 412 } 413 } 414 ha->flags.cpu_affinity_enabled = 1; 415 ql_dbg(ql_dbg_multiq, vha, 0xc007, 416 "CPU affinity mode enalbed, " 417 "no. of response queues:%d no. of request queues:%d.\n", 418 ha->max_rsp_queues, ha->max_req_queues); 419 ql_dbg(ql_dbg_init, vha, 0x00e9, 420 "CPU affinity mode enalbed, " 421 "no. of response queues:%d no. of request queues:%d.\n", 422 ha->max_rsp_queues, ha->max_req_queues); 423 } 424 return 0; 425fail2: 426 qla25xx_delete_queues(vha); 427 destroy_workqueue(ha->wq); 428 ha->wq = NULL; 429 vha->req = ha->req_q_map[0]; 430fail: 431 ha->mqenable = 0; 432 kfree(ha->req_q_map); 433 kfree(ha->rsp_q_map); 434 ha->max_req_queues = ha->max_rsp_queues = 1; 435 return 1; 436} 437 438static char * 439qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str) 440{ 441 struct qla_hw_data *ha = vha->hw; 442 static char *pci_bus_modes[] = { 443 "33", "66", "100", "133", 444 }; 445 uint16_t pci_bus; 446 447 strcpy(str, "PCI"); 448 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; 449 if (pci_bus) { 450 strcat(str, "-X ("); 451 strcat(str, pci_bus_modes[pci_bus]); 452 } else { 453 pci_bus = (ha->pci_attr & BIT_8) >> 8; 454 strcat(str, " ("); 455 strcat(str, pci_bus_modes[pci_bus]); 456 } 457 strcat(str, " MHz)"); 458 459 return (str); 460} 461 462static char * 463qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str) 464{ 465 static char *pci_bus_modes[] = { "33", "66", "100", "133", }; 466 struct qla_hw_data *ha = vha->hw; 467 uint32_t pci_bus; 468 int pcie_reg; 469 470 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP); 471 if (pcie_reg) { 472 char lwstr[6]; 473 uint16_t pcie_lstat, lspeed, lwidth; 474 475 pcie_reg += 0x12; 476 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat); 477 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3); 478 lwidth = (pcie_lstat & 479 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4; 480 481 strcpy(str, "PCIe ("); 482 if (lspeed == 1) 483 strcat(str, "2.5GT/s "); 484 else if (lspeed == 2) 485 strcat(str, "5.0GT/s "); 486 else 487 strcat(str, "<unknown> "); 488 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth); 489 strcat(str, lwstr); 490 491 return str; 492 } 493 494 strcpy(str, "PCI"); 495 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; 496 if (pci_bus == 0 || pci_bus == 8) { 497 strcat(str, " ("); 498 strcat(str, pci_bus_modes[pci_bus >> 3]); 499 } else { 500 strcat(str, "-X "); 501 if (pci_bus & BIT_2) 502 strcat(str, "Mode 2"); 503 else 504 strcat(str, "Mode 1"); 505 strcat(str, " ("); 506 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]); 507 } 508 strcat(str, " MHz)"); 509 510 return str; 511} 512 513static char * 514qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str) 515{ 516 char un_str[10]; 517 struct qla_hw_data *ha = vha->hw; 518 519 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version, 520 ha->fw_minor_version, 521 ha->fw_subminor_version); 522 523 if (ha->fw_attributes & BIT_9) { 524 strcat(str, "FLX"); 525 return (str); 526 } 527 528 switch (ha->fw_attributes & 0xFF) { 529 case 0x7: 530 strcat(str, "EF"); 531 break; 532 case 0x17: 533 strcat(str, "TP"); 534 break; 535 case 0x37: 536 strcat(str, "IP"); 537 break; 538 case 0x77: 539 strcat(str, "VI"); 540 break; 541 default: 542 sprintf(un_str, "(%x)", ha->fw_attributes); 543 strcat(str, un_str); 544 break; 545 } 546 if (ha->fw_attributes & 0x100) 547 strcat(str, "X"); 548 549 return (str); 550} 551 552static char * 553qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str) 554{ 555 struct qla_hw_data *ha = vha->hw; 556 557 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version, 558 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); 559 return str; 560} 561 562static inline srb_t * 563qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport, 564 struct scsi_cmnd *cmd) 565{ 566 srb_t *sp; 567 struct qla_hw_data *ha = vha->hw; 568 569 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC); 570 if (!sp) { 571 ql_log(ql_log_warn, vha, 0x3006, 572 "Memory allocation failed for sp.\n"); 573 return sp; 574 } 575 576 atomic_set(&sp->ref_count, 1); 577 sp->fcport = fcport; 578 sp->cmd = cmd; 579 sp->flags = 0; 580 CMD_SP(cmd) = (void *)sp; 581 sp->ctx = NULL; 582 583 return sp; 584} 585 586static int 587qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd) 588{ 589 scsi_qla_host_t *vha = shost_priv(host); 590 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; 591 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device)); 592 struct qla_hw_data *ha = vha->hw; 593 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 594 srb_t *sp; 595 int rval; 596 597 if (ha->flags.eeh_busy) { 598 if (ha->flags.pci_channel_io_perm_failure) { 599 ql_dbg(ql_dbg_io, vha, 0x3001, 600 "PCI Channel IO permanent failure, exiting " 601 "cmd=%p.\n", cmd); 602 cmd->result = DID_NO_CONNECT << 16; 603 } else { 604 ql_dbg(ql_dbg_io, vha, 0x3002, 605 "EEH_Busy, Requeuing the cmd=%p.\n", cmd); 606 cmd->result = DID_REQUEUE << 16; 607 } 608 goto qc24_fail_command; 609 } 610 611 rval = fc_remote_port_chkready(rport); 612 if (rval) { 613 cmd->result = rval; 614 ql_dbg(ql_dbg_io, vha, 0x3003, 615 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n", 616 cmd, rval); 617 goto qc24_fail_command; 618 } 619 620 if (!vha->flags.difdix_supported && 621 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) { 622 ql_dbg(ql_dbg_io, vha, 0x3004, 623 "DIF Cap not reg, fail DIF capable cmd's:%p.\n", 624 cmd); 625 cmd->result = DID_NO_CONNECT << 16; 626 goto qc24_fail_command; 627 } 628 629 if (!fcport) { 630 cmd->result = DID_NO_CONNECT << 16; 631 goto qc24_fail_command; 632 } 633 634 if (atomic_read(&fcport->state) != FCS_ONLINE) { 635 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD || 636 atomic_read(&base_vha->loop_state) == LOOP_DEAD) { 637 ql_dbg(ql_dbg_io, vha, 0x3005, 638 "Returning DNC, fcport_state=%d loop_state=%d.\n", 639 atomic_read(&fcport->state), 640 atomic_read(&base_vha->loop_state)); 641 cmd->result = DID_NO_CONNECT << 16; 642 goto qc24_fail_command; 643 } 644 goto qc24_target_busy; 645 } 646 647 sp = qla2x00_get_new_sp(base_vha, fcport, cmd); 648 if (!sp) 649 goto qc24_host_busy; 650 651 rval = ha->isp_ops->start_scsi(sp); 652 if (rval != QLA_SUCCESS) { 653 ql_dbg(ql_dbg_io, vha, 0x3013, 654 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd); 655 goto qc24_host_busy_free_sp; 656 } 657 658 return 0; 659 660qc24_host_busy_free_sp: 661 qla2x00_sp_free_dma(sp); 662 mempool_free(sp, ha->srb_mempool); 663 664qc24_host_busy: 665 return SCSI_MLQUEUE_HOST_BUSY; 666 667qc24_target_busy: 668 return SCSI_MLQUEUE_TARGET_BUSY; 669 670qc24_fail_command: 671 cmd->scsi_done(cmd); 672 673 return 0; 674} 675 676/* 677 * qla2x00_eh_wait_on_command 678 * Waits for the command to be returned by the Firmware for some 679 * max time. 680 * 681 * Input: 682 * cmd = Scsi Command to wait on. 683 * 684 * Return: 685 * Not Found : 0 686 * Found : 1 687 */ 688static int 689qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd) 690{ 691#define ABORT_POLLING_PERIOD 1000 692#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD)) 693 unsigned long wait_iter = ABORT_WAIT_ITER; 694 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 695 struct qla_hw_data *ha = vha->hw; 696 int ret = QLA_SUCCESS; 697 698 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) { 699 ql_dbg(ql_dbg_taskm, vha, 0x8005, 700 "Return:eh_wait.\n"); 701 return ret; 702 } 703 704 while (CMD_SP(cmd) && wait_iter--) { 705 msleep(ABORT_POLLING_PERIOD); 706 } 707 if (CMD_SP(cmd)) 708 ret = QLA_FUNCTION_FAILED; 709 710 return ret; 711} 712 713/* 714 * qla2x00_wait_for_hba_online 715 * Wait till the HBA is online after going through 716 * <= MAX_RETRIES_OF_ISP_ABORT or 717 * finally HBA is disabled ie marked offline 718 * 719 * Input: 720 * ha - pointer to host adapter structure 721 * 722 * Note: 723 * Does context switching-Release SPIN_LOCK 724 * (if any) before calling this routine. 725 * 726 * Return: 727 * Success (Adapter is online) : 0 728 * Failed (Adapter is offline/disabled) : 1 729 */ 730int 731qla2x00_wait_for_hba_online(scsi_qla_host_t *vha) 732{ 733 int return_status; 734 unsigned long wait_online; 735 struct qla_hw_data *ha = vha->hw; 736 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 737 738 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ); 739 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || 740 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || 741 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || 742 ha->dpc_active) && time_before(jiffies, wait_online)) { 743 744 msleep(1000); 745 } 746 if (base_vha->flags.online) 747 return_status = QLA_SUCCESS; 748 else 749 return_status = QLA_FUNCTION_FAILED; 750 751 return (return_status); 752} 753 754/* 755 * qla2x00_wait_for_reset_ready 756 * Wait till the HBA is online after going through 757 * <= MAX_RETRIES_OF_ISP_ABORT or 758 * finally HBA is disabled ie marked offline or flash 759 * operations are in progress. 760 * 761 * Input: 762 * ha - pointer to host adapter structure 763 * 764 * Note: 765 * Does context switching-Release SPIN_LOCK 766 * (if any) before calling this routine. 767 * 768 * Return: 769 * Success (Adapter is online/no flash ops) : 0 770 * Failed (Adapter is offline/disabled/flash ops in progress) : 1 771 */ 772static int 773qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha) 774{ 775 int return_status; 776 unsigned long wait_online; 777 struct qla_hw_data *ha = vha->hw; 778 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 779 780 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ); 781 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || 782 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || 783 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || 784 ha->optrom_state != QLA_SWAITING || 785 ha->dpc_active) && time_before(jiffies, wait_online)) 786 msleep(1000); 787 788 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING) 789 return_status = QLA_SUCCESS; 790 else 791 return_status = QLA_FUNCTION_FAILED; 792 793 ql_dbg(ql_dbg_taskm, vha, 0x8019, 794 "%s return status=%d.\n", __func__, return_status); 795 796 return return_status; 797} 798 799int 800qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha) 801{ 802 int return_status; 803 unsigned long wait_reset; 804 struct qla_hw_data *ha = vha->hw; 805 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 806 807 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ); 808 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || 809 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || 810 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || 811 ha->dpc_active) && time_before(jiffies, wait_reset)) { 812 813 msleep(1000); 814 815 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) && 816 ha->flags.chip_reset_done) 817 break; 818 } 819 if (ha->flags.chip_reset_done) 820 return_status = QLA_SUCCESS; 821 else 822 return_status = QLA_FUNCTION_FAILED; 823 824 return return_status; 825} 826 827static void 828sp_get(struct srb *sp) 829{ 830 atomic_inc(&sp->ref_count); 831} 832 833/************************************************************************** 834* qla2xxx_eh_abort 835* 836* Description: 837* The abort function will abort the specified command. 838* 839* Input: 840* cmd = Linux SCSI command packet to be aborted. 841* 842* Returns: 843* Either SUCCESS or FAILED. 844* 845* Note: 846* Only return FAILED if command not returned by firmware. 847**************************************************************************/ 848static int 849qla2xxx_eh_abort(struct scsi_cmnd *cmd) 850{ 851 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 852 srb_t *sp; 853 int ret; 854 unsigned int id, lun; 855 unsigned long flags; 856 int wait = 0; 857 struct qla_hw_data *ha = vha->hw; 858 859 if (!CMD_SP(cmd)) 860 return SUCCESS; 861 862 ret = fc_block_scsi_eh(cmd); 863 if (ret != 0) 864 return ret; 865 ret = SUCCESS; 866 867 id = cmd->device->id; 868 lun = cmd->device->lun; 869 870 spin_lock_irqsave(&ha->hardware_lock, flags); 871 sp = (srb_t *) CMD_SP(cmd); 872 if (!sp) { 873 spin_unlock_irqrestore(&ha->hardware_lock, flags); 874 return SUCCESS; 875 } 876 877 ql_dbg(ql_dbg_taskm, vha, 0x8002, 878 "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n", 879 vha->host_no, id, lun, sp, cmd); 880 881 /* Get a reference to the sp and drop the lock.*/ 882 sp_get(sp); 883 884 spin_unlock_irqrestore(&ha->hardware_lock, flags); 885 if (ha->isp_ops->abort_command(sp)) { 886 ret = FAILED; 887 ql_dbg(ql_dbg_taskm, vha, 0x8003, 888 "Abort command mbx failed cmd=%p.\n", cmd); 889 } else { 890 ql_dbg(ql_dbg_taskm, vha, 0x8004, 891 "Abort command mbx success cmd=%p.\n", cmd); 892 wait = 1; 893 } 894 895 spin_lock_irqsave(&ha->hardware_lock, flags); 896 qla2x00_sp_compl(ha, sp); 897 spin_unlock_irqrestore(&ha->hardware_lock, flags); 898 899 /* Did the command return during mailbox execution? */ 900 if (ret == FAILED && !CMD_SP(cmd)) 901 ret = SUCCESS; 902 903 /* Wait for the command to be returned. */ 904 if (wait) { 905 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) { 906 ql_log(ql_log_warn, vha, 0x8006, 907 "Abort handler timed out cmd=%p.\n", cmd); 908 ret = FAILED; 909 } 910 } 911 912 ql_log(ql_log_info, vha, 0x801c, 913 "Abort command issued nexus=%ld:%d:%d -- %d %x.\n", 914 vha->host_no, id, lun, wait, ret); 915 916 return ret; 917} 918 919int 920qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t, 921 unsigned int l, enum nexus_wait_type type) 922{ 923 int cnt, match, status; 924 unsigned long flags; 925 struct qla_hw_data *ha = vha->hw; 926 struct req_que *req; 927 srb_t *sp; 928 929 status = QLA_SUCCESS; 930 931 spin_lock_irqsave(&ha->hardware_lock, flags); 932 req = vha->req; 933 for (cnt = 1; status == QLA_SUCCESS && 934 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { 935 sp = req->outstanding_cmds[cnt]; 936 if (!sp) 937 continue; 938 if ((sp->ctx) && !IS_PROT_IO(sp)) 939 continue; 940 if (vha->vp_idx != sp->fcport->vha->vp_idx) 941 continue; 942 match = 0; 943 switch (type) { 944 case WAIT_HOST: 945 match = 1; 946 break; 947 case WAIT_TARGET: 948 match = sp->cmd->device->id == t; 949 break; 950 case WAIT_LUN: 951 match = (sp->cmd->device->id == t && 952 sp->cmd->device->lun == l); 953 break; 954 } 955 if (!match) 956 continue; 957 958 spin_unlock_irqrestore(&ha->hardware_lock, flags); 959 status = qla2x00_eh_wait_on_command(sp->cmd); 960 spin_lock_irqsave(&ha->hardware_lock, flags); 961 } 962 spin_unlock_irqrestore(&ha->hardware_lock, flags); 963 964 return status; 965} 966 967static char *reset_errors[] = { 968 "HBA not online", 969 "HBA not ready", 970 "Task management failed", 971 "Waiting for command completions", 972}; 973 974static int 975__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type, 976 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int)) 977{ 978 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 979 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; 980 int err; 981 982 if (!fcport) { 983 return FAILED; 984 } 985 986 err = fc_block_scsi_eh(cmd); 987 if (err != 0) 988 return err; 989 990 ql_log(ql_log_info, vha, 0x8009, 991 "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no, 992 cmd->device->id, cmd->device->lun, cmd); 993 994 err = 0; 995 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { 996 ql_log(ql_log_warn, vha, 0x800a, 997 "Wait for hba online failed for cmd=%p.\n", cmd); 998 goto eh_reset_failed; 999 } 1000 err = 2; 1001 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1) 1002 != QLA_SUCCESS) { 1003 ql_log(ql_log_warn, vha, 0x800c, 1004 "do_reset failed for cmd=%p.\n", cmd); 1005 goto eh_reset_failed; 1006 } 1007 err = 3; 1008 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id, 1009 cmd->device->lun, type) != QLA_SUCCESS) { 1010 ql_log(ql_log_warn, vha, 0x800d, 1011 "wait for peding cmds failed for cmd=%p.\n", cmd); 1012 goto eh_reset_failed; 1013 } 1014 1015 ql_log(ql_log_info, vha, 0x800e, 1016 "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name, 1017 vha->host_no, cmd->device->id, cmd->device->lun, cmd); 1018 1019 return SUCCESS; 1020 1021eh_reset_failed: 1022 ql_log(ql_log_info, vha, 0x800f, 1023 "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name, 1024 reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun, 1025 cmd); 1026 return FAILED; 1027} 1028 1029static int 1030qla2xxx_eh_device_reset(struct scsi_cmnd *cmd) 1031{ 1032 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1033 struct qla_hw_data *ha = vha->hw; 1034 1035 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd, 1036 ha->isp_ops->lun_reset); 1037} 1038 1039static int 1040qla2xxx_eh_target_reset(struct scsi_cmnd *cmd) 1041{ 1042 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1043 struct qla_hw_data *ha = vha->hw; 1044 1045 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd, 1046 ha->isp_ops->target_reset); 1047} 1048 1049/************************************************************************** 1050* qla2xxx_eh_bus_reset 1051* 1052* Description: 1053* The bus reset function will reset the bus and abort any executing 1054* commands. 1055* 1056* Input: 1057* cmd = Linux SCSI command packet of the command that cause the 1058* bus reset. 1059* 1060* Returns: 1061* SUCCESS/FAILURE (defined as macro in scsi.h). 1062* 1063**************************************************************************/ 1064static int 1065qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd) 1066{ 1067 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1068 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; 1069 int ret = FAILED; 1070 unsigned int id, lun; 1071 1072 id = cmd->device->id; 1073 lun = cmd->device->lun; 1074 1075 if (!fcport) { 1076 return ret; 1077 } 1078 1079 ret = fc_block_scsi_eh(cmd); 1080 if (ret != 0) 1081 return ret; 1082 ret = FAILED; 1083 1084 ql_log(ql_log_info, vha, 0x8012, 1085 "BUS RESET ISSUED nexus=%ld:%d%d.\n", vha->host_no, id, lun); 1086 1087 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { 1088 ql_log(ql_log_fatal, vha, 0x8013, 1089 "Wait for hba online failed board disabled.\n"); 1090 goto eh_bus_reset_done; 1091 } 1092 1093 if (qla2x00_loop_reset(vha) == QLA_SUCCESS) 1094 ret = SUCCESS; 1095 1096 if (ret == FAILED) 1097 goto eh_bus_reset_done; 1098 1099 /* Flush outstanding commands. */ 1100 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) != 1101 QLA_SUCCESS) { 1102 ql_log(ql_log_warn, vha, 0x8014, 1103 "Wait for pending commands failed.\n"); 1104 ret = FAILED; 1105 } 1106 1107eh_bus_reset_done: 1108 ql_log(ql_log_warn, vha, 0x802b, 1109 "BUS RESET %s nexus=%ld:%d:%d.\n", 1110 (ret == FAILED) ? "FAILED" : "SUCCEDED", vha->host_no, id, lun); 1111 1112 return ret; 1113} 1114 1115/************************************************************************** 1116* qla2xxx_eh_host_reset 1117* 1118* Description: 1119* The reset function will reset the Adapter. 1120* 1121* Input: 1122* cmd = Linux SCSI command packet of the command that cause the 1123* adapter reset. 1124* 1125* Returns: 1126* Either SUCCESS or FAILED. 1127* 1128* Note: 1129**************************************************************************/ 1130static int 1131qla2xxx_eh_host_reset(struct scsi_cmnd *cmd) 1132{ 1133 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1134 struct qla_hw_data *ha = vha->hw; 1135 int ret = FAILED; 1136 unsigned int id, lun; 1137 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 1138 1139 id = cmd->device->id; 1140 lun = cmd->device->lun; 1141 1142 ql_log(ql_log_info, vha, 0x8018, 1143 "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun); 1144 1145 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS) 1146 goto eh_host_reset_lock; 1147 1148 if (vha != base_vha) { 1149 if (qla2x00_vp_abort_isp(vha)) 1150 goto eh_host_reset_lock; 1151 } else { 1152 if (IS_QLA82XX(vha->hw)) { 1153 if (!qla82xx_fcoe_ctx_reset(vha)) { 1154 /* Ctx reset success */ 1155 ret = SUCCESS; 1156 goto eh_host_reset_lock; 1157 } 1158 /* fall thru if ctx reset failed */ 1159 } 1160 if (ha->wq) 1161 flush_workqueue(ha->wq); 1162 1163 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 1164 if (ha->isp_ops->abort_isp(base_vha)) { 1165 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 1166 /* failed. schedule dpc to try */ 1167 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); 1168 1169 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { 1170 ql_log(ql_log_warn, vha, 0x802a, 1171 "wait for hba online failed.\n"); 1172 goto eh_host_reset_lock; 1173 } 1174 } 1175 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 1176 } 1177 1178 /* Waiting for command to be returned to OS.*/ 1179 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) == 1180 QLA_SUCCESS) 1181 ret = SUCCESS; 1182 1183eh_host_reset_lock: 1184 ql_log(ql_log_info, vha, 0x8017, 1185 "ADAPTER RESET %s nexus=%ld:%d:%d.\n", 1186 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun); 1187 1188 return ret; 1189} 1190 1191/* 1192* qla2x00_loop_reset 1193* Issue loop reset. 1194* 1195* Input: 1196* ha = adapter block pointer. 1197* 1198* Returns: 1199* 0 = success 1200*/ 1201int 1202qla2x00_loop_reset(scsi_qla_host_t *vha) 1203{ 1204 int ret; 1205 struct fc_port *fcport; 1206 struct qla_hw_data *ha = vha->hw; 1207 1208 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) { 1209 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1210 if (fcport->port_type != FCT_TARGET) 1211 continue; 1212 1213 ret = ha->isp_ops->target_reset(fcport, 0, 0); 1214 if (ret != QLA_SUCCESS) { 1215 ql_dbg(ql_dbg_taskm, vha, 0x802c, 1216 "Bus Reset failed: Target Reset=%d " 1217 "d_id=%x.\n", ret, fcport->d_id.b24); 1218 } 1219 } 1220 } 1221 1222 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) { 1223 ret = qla2x00_full_login_lip(vha); 1224 if (ret != QLA_SUCCESS) { 1225 ql_dbg(ql_dbg_taskm, vha, 0x802d, 1226 "full_login_lip=%d.\n", ret); 1227 } 1228 atomic_set(&vha->loop_state, LOOP_DOWN); 1229 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1230 qla2x00_mark_all_devices_lost(vha, 0); 1231 } 1232 1233 if (ha->flags.enable_lip_reset) { 1234 ret = qla2x00_lip_reset(vha); 1235 if (ret != QLA_SUCCESS) 1236 ql_dbg(ql_dbg_taskm, vha, 0x802e, 1237 "lip_reset failed (%d).\n", ret); 1238 } 1239 1240 /* Issue marker command only when we are going to start the I/O */ 1241 vha->marker_needed = 1; 1242 1243 return QLA_SUCCESS; 1244} 1245 1246void 1247qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res) 1248{ 1249 int que, cnt; 1250 unsigned long flags; 1251 srb_t *sp; 1252 struct srb_ctx *ctx; 1253 struct qla_hw_data *ha = vha->hw; 1254 struct req_que *req; 1255 1256 spin_lock_irqsave(&ha->hardware_lock, flags); 1257 for (que = 0; que < ha->max_req_queues; que++) { 1258 req = ha->req_q_map[que]; 1259 if (!req) 1260 continue; 1261 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { 1262 sp = req->outstanding_cmds[cnt]; 1263 if (sp) { 1264 req->outstanding_cmds[cnt] = NULL; 1265 if (!sp->ctx || 1266 (sp->flags & SRB_FCP_CMND_DMA_VALID) || 1267 IS_PROT_IO(sp)) { 1268 sp->cmd->result = res; 1269 qla2x00_sp_compl(ha, sp); 1270 } else { 1271 ctx = sp->ctx; 1272 if (ctx->type == SRB_ELS_CMD_RPT || 1273 ctx->type == SRB_ELS_CMD_HST || 1274 ctx->type == SRB_CT_CMD) { 1275 struct fc_bsg_job *bsg_job = 1276 ctx->u.bsg_job; 1277 if (bsg_job->request->msgcode 1278 == FC_BSG_HST_CT) 1279 kfree(sp->fcport); 1280 bsg_job->req->errors = 0; 1281 bsg_job->reply->result = res; 1282 bsg_job->job_done(bsg_job); 1283 kfree(sp->ctx); 1284 mempool_free(sp, 1285 ha->srb_mempool); 1286 } else { 1287 ctx->u.iocb_cmd->free(sp); 1288 } 1289 } 1290 } 1291 } 1292 } 1293 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1294} 1295 1296static int 1297qla2xxx_slave_alloc(struct scsi_device *sdev) 1298{ 1299 struct fc_rport *rport = starget_to_rport(scsi_target(sdev)); 1300 1301 if (!rport || fc_remote_port_chkready(rport)) 1302 return -ENXIO; 1303 1304 sdev->hostdata = *(fc_port_t **)rport->dd_data; 1305 1306 return 0; 1307} 1308 1309static int 1310qla2xxx_slave_configure(struct scsi_device *sdev) 1311{ 1312 scsi_qla_host_t *vha = shost_priv(sdev->host); 1313 struct req_que *req = vha->req; 1314 1315 if (sdev->tagged_supported) 1316 scsi_activate_tcq(sdev, req->max_q_depth); 1317 else 1318 scsi_deactivate_tcq(sdev, req->max_q_depth); 1319 return 0; 1320} 1321 1322static void 1323qla2xxx_slave_destroy(struct scsi_device *sdev) 1324{ 1325 sdev->hostdata = NULL; 1326} 1327 1328static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth) 1329{ 1330 fc_port_t *fcport = (struct fc_port *) sdev->hostdata; 1331 1332 if (!scsi_track_queue_full(sdev, qdepth)) 1333 return; 1334 1335 ql_dbg(ql_dbg_io, fcport->vha, 0x3029, 1336 "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n", 1337 sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun); 1338} 1339 1340static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth) 1341{ 1342 fc_port_t *fcport = sdev->hostdata; 1343 struct scsi_qla_host *vha = fcport->vha; 1344 struct req_que *req = NULL; 1345 1346 req = vha->req; 1347 if (!req) 1348 return; 1349 1350 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth) 1351 return; 1352 1353 if (sdev->ordered_tags) 1354 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth); 1355 else 1356 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth); 1357 1358 ql_dbg(ql_dbg_io, vha, 0x302a, 1359 "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n", 1360 sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun); 1361} 1362 1363static int 1364qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason) 1365{ 1366 switch (reason) { 1367 case SCSI_QDEPTH_DEFAULT: 1368 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 1369 break; 1370 case SCSI_QDEPTH_QFULL: 1371 qla2x00_handle_queue_full(sdev, qdepth); 1372 break; 1373 case SCSI_QDEPTH_RAMP_UP: 1374 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth); 1375 break; 1376 default: 1377 return -EOPNOTSUPP; 1378 } 1379 1380 return sdev->queue_depth; 1381} 1382 1383static int 1384qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type) 1385{ 1386 if (sdev->tagged_supported) { 1387 scsi_set_tag_type(sdev, tag_type); 1388 if (tag_type) 1389 scsi_activate_tcq(sdev, sdev->queue_depth); 1390 else 1391 scsi_deactivate_tcq(sdev, sdev->queue_depth); 1392 } else 1393 tag_type = 0; 1394 1395 return tag_type; 1396} 1397 1398/** 1399 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method. 1400 * @ha: HA context 1401 * 1402 * At exit, the @ha's flags.enable_64bit_addressing set to indicated 1403 * supported addressing method. 1404 */ 1405static void 1406qla2x00_config_dma_addressing(struct qla_hw_data *ha) 1407{ 1408 /* Assume a 32bit DMA mask. */ 1409 ha->flags.enable_64bit_addressing = 0; 1410 1411 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { 1412 /* Any upper-dword bits set? */ 1413 if (MSD(dma_get_required_mask(&ha->pdev->dev)) && 1414 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { 1415 /* Ok, a 64bit DMA mask is applicable. */ 1416 ha->flags.enable_64bit_addressing = 1; 1417 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64; 1418 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64; 1419 return; 1420 } 1421 } 1422 1423 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); 1424 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32)); 1425} 1426 1427static void 1428qla2x00_enable_intrs(struct qla_hw_data *ha) 1429{ 1430 unsigned long flags = 0; 1431 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1432 1433 spin_lock_irqsave(&ha->hardware_lock, flags); 1434 ha->interrupts_on = 1; 1435 /* enable risc and host interrupts */ 1436 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC); 1437 RD_REG_WORD(®->ictrl); 1438 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1439 1440} 1441 1442static void 1443qla2x00_disable_intrs(struct qla_hw_data *ha) 1444{ 1445 unsigned long flags = 0; 1446 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1447 1448 spin_lock_irqsave(&ha->hardware_lock, flags); 1449 ha->interrupts_on = 0; 1450 /* disable risc and host interrupts */ 1451 WRT_REG_WORD(®->ictrl, 0); 1452 RD_REG_WORD(®->ictrl); 1453 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1454} 1455 1456static void 1457qla24xx_enable_intrs(struct qla_hw_data *ha) 1458{ 1459 unsigned long flags = 0; 1460 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1461 1462 spin_lock_irqsave(&ha->hardware_lock, flags); 1463 ha->interrupts_on = 1; 1464 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT); 1465 RD_REG_DWORD(®->ictrl); 1466 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1467} 1468 1469static void 1470qla24xx_disable_intrs(struct qla_hw_data *ha) 1471{ 1472 unsigned long flags = 0; 1473 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1474 1475 if (IS_NOPOLLING_TYPE(ha)) 1476 return; 1477 spin_lock_irqsave(&ha->hardware_lock, flags); 1478 ha->interrupts_on = 0; 1479 WRT_REG_DWORD(®->ictrl, 0); 1480 RD_REG_DWORD(®->ictrl); 1481 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1482} 1483 1484static int 1485qla2x00_iospace_config(struct qla_hw_data *ha) 1486{ 1487 resource_size_t pio; 1488 uint16_t msix; 1489 int cpus; 1490 1491 if (IS_QLA82XX(ha)) 1492 return qla82xx_iospace_config(ha); 1493 1494 if (pci_request_selected_regions(ha->pdev, ha->bars, 1495 QLA2XXX_DRIVER_NAME)) { 1496 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011, 1497 "Failed to reserve PIO/MMIO regions (%s), aborting.\n", 1498 pci_name(ha->pdev)); 1499 goto iospace_error_exit; 1500 } 1501 if (!(ha->bars & 1)) 1502 goto skip_pio; 1503 1504 /* We only need PIO for Flash operations on ISP2312 v2 chips. */ 1505 pio = pci_resource_start(ha->pdev, 0); 1506 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) { 1507 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { 1508 ql_log_pci(ql_log_warn, ha->pdev, 0x0012, 1509 "Invalid pci I/O region size (%s).\n", 1510 pci_name(ha->pdev)); 1511 pio = 0; 1512 } 1513 } else { 1514 ql_log_pci(ql_log_warn, ha->pdev, 0x0013, 1515 "Region #0 no a PIO resource (%s).\n", 1516 pci_name(ha->pdev)); 1517 pio = 0; 1518 } 1519 ha->pio_address = pio; 1520 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014, 1521 "PIO address=%llu.\n", 1522 (unsigned long long)ha->pio_address); 1523 1524skip_pio: 1525 /* Use MMIO operations for all accesses. */ 1526 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) { 1527 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015, 1528 "Region #1 not an MMIO resource (%s), aborting.\n", 1529 pci_name(ha->pdev)); 1530 goto iospace_error_exit; 1531 } 1532 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) { 1533 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016, 1534 "Invalid PCI mem region size (%s), aborting.\n", 1535 pci_name(ha->pdev)); 1536 goto iospace_error_exit; 1537 } 1538 1539 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN); 1540 if (!ha->iobase) { 1541 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017, 1542 "Cannot remap MMIO (%s), aborting.\n", 1543 pci_name(ha->pdev)); 1544 goto iospace_error_exit; 1545 } 1546 1547 /* Determine queue resources */ 1548 ha->max_req_queues = ha->max_rsp_queues = 1; 1549 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) || 1550 (ql2xmaxqueues > 1 && ql2xmultique_tag) || 1551 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) 1552 goto mqiobase_exit; 1553 1554 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), 1555 pci_resource_len(ha->pdev, 3)); 1556 if (ha->mqiobase) { 1557 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018, 1558 "MQIO Base=%p.\n", ha->mqiobase); 1559 /* Read MSIX vector size of the board */ 1560 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix); 1561 ha->msix_count = msix; 1562 /* Max queues are bounded by available msix vectors */ 1563 /* queue 0 uses two msix vectors */ 1564 if (ql2xmultique_tag) { 1565 cpus = num_online_cpus(); 1566 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? 1567 (cpus + 1) : (ha->msix_count - 1); 1568 ha->max_req_queues = 2; 1569 } else if (ql2xmaxqueues > 1) { 1570 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? 1571 QLA_MQ_SIZE : ql2xmaxqueues; 1572 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008, 1573 "QoS mode set, max no of request queues:%d.\n", 1574 ha->max_req_queues); 1575 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019, 1576 "QoS mode set, max no of request queues:%d.\n", 1577 ha->max_req_queues); 1578 } 1579 ql_log_pci(ql_log_info, ha->pdev, 0x001a, 1580 "MSI-X vector count: %d.\n", msix); 1581 } else 1582 ql_log_pci(ql_log_info, ha->pdev, 0x001b, 1583 "BAR 3 not enabled.\n"); 1584 1585mqiobase_exit: 1586 ha->msix_count = ha->max_rsp_queues + 1; 1587 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c, 1588 "MSIX Count:%d.\n", ha->msix_count); 1589 return (0); 1590 1591iospace_error_exit: 1592 return (-ENOMEM); 1593} 1594 1595 1596static struct isp_operations qla2100_isp_ops = { 1597 .pci_config = qla2100_pci_config, 1598 .reset_chip = qla2x00_reset_chip, 1599 .chip_diag = qla2x00_chip_diag, 1600 .config_rings = qla2x00_config_rings, 1601 .reset_adapter = qla2x00_reset_adapter, 1602 .nvram_config = qla2x00_nvram_config, 1603 .update_fw_options = qla2x00_update_fw_options, 1604 .load_risc = qla2x00_load_risc, 1605 .pci_info_str = qla2x00_pci_info_str, 1606 .fw_version_str = qla2x00_fw_version_str, 1607 .intr_handler = qla2100_intr_handler, 1608 .enable_intrs = qla2x00_enable_intrs, 1609 .disable_intrs = qla2x00_disable_intrs, 1610 .abort_command = qla2x00_abort_command, 1611 .target_reset = qla2x00_abort_target, 1612 .lun_reset = qla2x00_lun_reset, 1613 .fabric_login = qla2x00_login_fabric, 1614 .fabric_logout = qla2x00_fabric_logout, 1615 .calc_req_entries = qla2x00_calc_iocbs_32, 1616 .build_iocbs = qla2x00_build_scsi_iocbs_32, 1617 .prep_ms_iocb = qla2x00_prep_ms_iocb, 1618 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb, 1619 .read_nvram = qla2x00_read_nvram_data, 1620 .write_nvram = qla2x00_write_nvram_data, 1621 .fw_dump = qla2100_fw_dump, 1622 .beacon_on = NULL, 1623 .beacon_off = NULL, 1624 .beacon_blink = NULL, 1625 .read_optrom = qla2x00_read_optrom_data, 1626 .write_optrom = qla2x00_write_optrom_data, 1627 .get_flash_version = qla2x00_get_flash_version, 1628 .start_scsi = qla2x00_start_scsi, 1629 .abort_isp = qla2x00_abort_isp, 1630 .iospace_config = qla2x00_iospace_config, 1631}; 1632 1633static struct isp_operations qla2300_isp_ops = { 1634 .pci_config = qla2300_pci_config, 1635 .reset_chip = qla2x00_reset_chip, 1636 .chip_diag = qla2x00_chip_diag, 1637 .config_rings = qla2x00_config_rings, 1638 .reset_adapter = qla2x00_reset_adapter, 1639 .nvram_config = qla2x00_nvram_config, 1640 .update_fw_options = qla2x00_update_fw_options, 1641 .load_risc = qla2x00_load_risc, 1642 .pci_info_str = qla2x00_pci_info_str, 1643 .fw_version_str = qla2x00_fw_version_str, 1644 .intr_handler = qla2300_intr_handler, 1645 .enable_intrs = qla2x00_enable_intrs, 1646 .disable_intrs = qla2x00_disable_intrs, 1647 .abort_command = qla2x00_abort_command, 1648 .target_reset = qla2x00_abort_target, 1649 .lun_reset = qla2x00_lun_reset, 1650 .fabric_login = qla2x00_login_fabric, 1651 .fabric_logout = qla2x00_fabric_logout, 1652 .calc_req_entries = qla2x00_calc_iocbs_32, 1653 .build_iocbs = qla2x00_build_scsi_iocbs_32, 1654 .prep_ms_iocb = qla2x00_prep_ms_iocb, 1655 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb, 1656 .read_nvram = qla2x00_read_nvram_data, 1657 .write_nvram = qla2x00_write_nvram_data, 1658 .fw_dump = qla2300_fw_dump, 1659 .beacon_on = qla2x00_beacon_on, 1660 .beacon_off = qla2x00_beacon_off, 1661 .beacon_blink = qla2x00_beacon_blink, 1662 .read_optrom = qla2x00_read_optrom_data, 1663 .write_optrom = qla2x00_write_optrom_data, 1664 .get_flash_version = qla2x00_get_flash_version, 1665 .start_scsi = qla2x00_start_scsi, 1666 .abort_isp = qla2x00_abort_isp, 1667 .iospace_config = qla2x00_iospace_config, 1668}; 1669 1670static struct isp_operations qla24xx_isp_ops = { 1671 .pci_config = qla24xx_pci_config, 1672 .reset_chip = qla24xx_reset_chip, 1673 .chip_diag = qla24xx_chip_diag, 1674 .config_rings = qla24xx_config_rings, 1675 .reset_adapter = qla24xx_reset_adapter, 1676 .nvram_config = qla24xx_nvram_config, 1677 .update_fw_options = qla24xx_update_fw_options, 1678 .load_risc = qla24xx_load_risc, 1679 .pci_info_str = qla24xx_pci_info_str, 1680 .fw_version_str = qla24xx_fw_version_str, 1681 .intr_handler = qla24xx_intr_handler, 1682 .enable_intrs = qla24xx_enable_intrs, 1683 .disable_intrs = qla24xx_disable_intrs, 1684 .abort_command = qla24xx_abort_command, 1685 .target_reset = qla24xx_abort_target, 1686 .lun_reset = qla24xx_lun_reset, 1687 .fabric_login = qla24xx_login_fabric, 1688 .fabric_logout = qla24xx_fabric_logout, 1689 .calc_req_entries = NULL, 1690 .build_iocbs = NULL, 1691 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1692 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1693 .read_nvram = qla24xx_read_nvram_data, 1694 .write_nvram = qla24xx_write_nvram_data, 1695 .fw_dump = qla24xx_fw_dump, 1696 .beacon_on = qla24xx_beacon_on, 1697 .beacon_off = qla24xx_beacon_off, 1698 .beacon_blink = qla24xx_beacon_blink, 1699 .read_optrom = qla24xx_read_optrom_data, 1700 .write_optrom = qla24xx_write_optrom_data, 1701 .get_flash_version = qla24xx_get_flash_version, 1702 .start_scsi = qla24xx_start_scsi, 1703 .abort_isp = qla2x00_abort_isp, 1704 .iospace_config = qla2x00_iospace_config, 1705}; 1706 1707static struct isp_operations qla25xx_isp_ops = { 1708 .pci_config = qla25xx_pci_config, 1709 .reset_chip = qla24xx_reset_chip, 1710 .chip_diag = qla24xx_chip_diag, 1711 .config_rings = qla24xx_config_rings, 1712 .reset_adapter = qla24xx_reset_adapter, 1713 .nvram_config = qla24xx_nvram_config, 1714 .update_fw_options = qla24xx_update_fw_options, 1715 .load_risc = qla24xx_load_risc, 1716 .pci_info_str = qla24xx_pci_info_str, 1717 .fw_version_str = qla24xx_fw_version_str, 1718 .intr_handler = qla24xx_intr_handler, 1719 .enable_intrs = qla24xx_enable_intrs, 1720 .disable_intrs = qla24xx_disable_intrs, 1721 .abort_command = qla24xx_abort_command, 1722 .target_reset = qla24xx_abort_target, 1723 .lun_reset = qla24xx_lun_reset, 1724 .fabric_login = qla24xx_login_fabric, 1725 .fabric_logout = qla24xx_fabric_logout, 1726 .calc_req_entries = NULL, 1727 .build_iocbs = NULL, 1728 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1729 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1730 .read_nvram = qla25xx_read_nvram_data, 1731 .write_nvram = qla25xx_write_nvram_data, 1732 .fw_dump = qla25xx_fw_dump, 1733 .beacon_on = qla24xx_beacon_on, 1734 .beacon_off = qla24xx_beacon_off, 1735 .beacon_blink = qla24xx_beacon_blink, 1736 .read_optrom = qla25xx_read_optrom_data, 1737 .write_optrom = qla24xx_write_optrom_data, 1738 .get_flash_version = qla24xx_get_flash_version, 1739 .start_scsi = qla24xx_dif_start_scsi, 1740 .abort_isp = qla2x00_abort_isp, 1741 .iospace_config = qla2x00_iospace_config, 1742}; 1743 1744static struct isp_operations qla81xx_isp_ops = { 1745 .pci_config = qla25xx_pci_config, 1746 .reset_chip = qla24xx_reset_chip, 1747 .chip_diag = qla24xx_chip_diag, 1748 .config_rings = qla24xx_config_rings, 1749 .reset_adapter = qla24xx_reset_adapter, 1750 .nvram_config = qla81xx_nvram_config, 1751 .update_fw_options = qla81xx_update_fw_options, 1752 .load_risc = qla81xx_load_risc, 1753 .pci_info_str = qla24xx_pci_info_str, 1754 .fw_version_str = qla24xx_fw_version_str, 1755 .intr_handler = qla24xx_intr_handler, 1756 .enable_intrs = qla24xx_enable_intrs, 1757 .disable_intrs = qla24xx_disable_intrs, 1758 .abort_command = qla24xx_abort_command, 1759 .target_reset = qla24xx_abort_target, 1760 .lun_reset = qla24xx_lun_reset, 1761 .fabric_login = qla24xx_login_fabric, 1762 .fabric_logout = qla24xx_fabric_logout, 1763 .calc_req_entries = NULL, 1764 .build_iocbs = NULL, 1765 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1766 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1767 .read_nvram = NULL, 1768 .write_nvram = NULL, 1769 .fw_dump = qla81xx_fw_dump, 1770 .beacon_on = qla24xx_beacon_on, 1771 .beacon_off = qla24xx_beacon_off, 1772 .beacon_blink = qla24xx_beacon_blink, 1773 .read_optrom = qla25xx_read_optrom_data, 1774 .write_optrom = qla24xx_write_optrom_data, 1775 .get_flash_version = qla24xx_get_flash_version, 1776 .start_scsi = qla24xx_dif_start_scsi, 1777 .abort_isp = qla2x00_abort_isp, 1778 .iospace_config = qla2x00_iospace_config, 1779}; 1780 1781static struct isp_operations qla82xx_isp_ops = { 1782 .pci_config = qla82xx_pci_config, 1783 .reset_chip = qla82xx_reset_chip, 1784 .chip_diag = qla24xx_chip_diag, 1785 .config_rings = qla82xx_config_rings, 1786 .reset_adapter = qla24xx_reset_adapter, 1787 .nvram_config = qla81xx_nvram_config, 1788 .update_fw_options = qla24xx_update_fw_options, 1789 .load_risc = qla82xx_load_risc, 1790 .pci_info_str = qla82xx_pci_info_str, 1791 .fw_version_str = qla24xx_fw_version_str, 1792 .intr_handler = qla82xx_intr_handler, 1793 .enable_intrs = qla82xx_enable_intrs, 1794 .disable_intrs = qla82xx_disable_intrs, 1795 .abort_command = qla24xx_abort_command, 1796 .target_reset = qla24xx_abort_target, 1797 .lun_reset = qla24xx_lun_reset, 1798 .fabric_login = qla24xx_login_fabric, 1799 .fabric_logout = qla24xx_fabric_logout, 1800 .calc_req_entries = NULL, 1801 .build_iocbs = NULL, 1802 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1803 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1804 .read_nvram = qla24xx_read_nvram_data, 1805 .write_nvram = qla24xx_write_nvram_data, 1806 .fw_dump = qla24xx_fw_dump, 1807 .beacon_on = qla82xx_beacon_on, 1808 .beacon_off = qla82xx_beacon_off, 1809 .beacon_blink = NULL, 1810 .read_optrom = qla82xx_read_optrom_data, 1811 .write_optrom = qla82xx_write_optrom_data, 1812 .get_flash_version = qla24xx_get_flash_version, 1813 .start_scsi = qla82xx_start_scsi, 1814 .abort_isp = qla82xx_abort_isp, 1815 .iospace_config = qla82xx_iospace_config, 1816}; 1817 1818static inline void 1819qla2x00_set_isp_flags(struct qla_hw_data *ha) 1820{ 1821 ha->device_type = DT_EXTENDED_IDS; 1822 switch (ha->pdev->device) { 1823 case PCI_DEVICE_ID_QLOGIC_ISP2100: 1824 ha->device_type |= DT_ISP2100; 1825 ha->device_type &= ~DT_EXTENDED_IDS; 1826 ha->fw_srisc_address = RISC_START_ADDRESS_2100; 1827 break; 1828 case PCI_DEVICE_ID_QLOGIC_ISP2200: 1829 ha->device_type |= DT_ISP2200; 1830 ha->device_type &= ~DT_EXTENDED_IDS; 1831 ha->fw_srisc_address = RISC_START_ADDRESS_2100; 1832 break; 1833 case PCI_DEVICE_ID_QLOGIC_ISP2300: 1834 ha->device_type |= DT_ISP2300; 1835 ha->device_type |= DT_ZIO_SUPPORTED; 1836 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1837 break; 1838 case PCI_DEVICE_ID_QLOGIC_ISP2312: 1839 ha->device_type |= DT_ISP2312; 1840 ha->device_type |= DT_ZIO_SUPPORTED; 1841 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1842 break; 1843 case PCI_DEVICE_ID_QLOGIC_ISP2322: 1844 ha->device_type |= DT_ISP2322; 1845 ha->device_type |= DT_ZIO_SUPPORTED; 1846 if (ha->pdev->subsystem_vendor == 0x1028 && 1847 ha->pdev->subsystem_device == 0x0170) 1848 ha->device_type |= DT_OEM_001; 1849 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1850 break; 1851 case PCI_DEVICE_ID_QLOGIC_ISP6312: 1852 ha->device_type |= DT_ISP6312; 1853 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1854 break; 1855 case PCI_DEVICE_ID_QLOGIC_ISP6322: 1856 ha->device_type |= DT_ISP6322; 1857 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1858 break; 1859 case PCI_DEVICE_ID_QLOGIC_ISP2422: 1860 ha->device_type |= DT_ISP2422; 1861 ha->device_type |= DT_ZIO_SUPPORTED; 1862 ha->device_type |= DT_FWI2; 1863 ha->device_type |= DT_IIDMA; 1864 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1865 break; 1866 case PCI_DEVICE_ID_QLOGIC_ISP2432: 1867 ha->device_type |= DT_ISP2432; 1868 ha->device_type |= DT_ZIO_SUPPORTED; 1869 ha->device_type |= DT_FWI2; 1870 ha->device_type |= DT_IIDMA; 1871 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1872 break; 1873 case PCI_DEVICE_ID_QLOGIC_ISP8432: 1874 ha->device_type |= DT_ISP8432; 1875 ha->device_type |= DT_ZIO_SUPPORTED; 1876 ha->device_type |= DT_FWI2; 1877 ha->device_type |= DT_IIDMA; 1878 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1879 break; 1880 case PCI_DEVICE_ID_QLOGIC_ISP5422: 1881 ha->device_type |= DT_ISP5422; 1882 ha->device_type |= DT_FWI2; 1883 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1884 break; 1885 case PCI_DEVICE_ID_QLOGIC_ISP5432: 1886 ha->device_type |= DT_ISP5432; 1887 ha->device_type |= DT_FWI2; 1888 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1889 break; 1890 case PCI_DEVICE_ID_QLOGIC_ISP2532: 1891 ha->device_type |= DT_ISP2532; 1892 ha->device_type |= DT_ZIO_SUPPORTED; 1893 ha->device_type |= DT_FWI2; 1894 ha->device_type |= DT_IIDMA; 1895 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1896 break; 1897 case PCI_DEVICE_ID_QLOGIC_ISP8001: 1898 ha->device_type |= DT_ISP8001; 1899 ha->device_type |= DT_ZIO_SUPPORTED; 1900 ha->device_type |= DT_FWI2; 1901 ha->device_type |= DT_IIDMA; 1902 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1903 break; 1904 case PCI_DEVICE_ID_QLOGIC_ISP8021: 1905 ha->device_type |= DT_ISP8021; 1906 ha->device_type |= DT_ZIO_SUPPORTED; 1907 ha->device_type |= DT_FWI2; 1908 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1909 /* Initialize 82XX ISP flags */ 1910 qla82xx_init_flags(ha); 1911 break; 1912 } 1913 1914 if (IS_QLA82XX(ha)) 1915 ha->port_no = !(ha->portnum & 1); 1916 else 1917 /* Get adapter physical port no from interrupt pin register. */ 1918 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no); 1919 1920 if (ha->port_no & 1) 1921 ha->flags.port0 = 1; 1922 else 1923 ha->flags.port0 = 0; 1924 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b, 1925 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n", 1926 ha->device_type, ha->flags.port0, ha->fw_srisc_address); 1927} 1928 1929static void 1930qla2xxx_scan_start(struct Scsi_Host *shost) 1931{ 1932 scsi_qla_host_t *vha = shost_priv(shost); 1933 1934 if (vha->hw->flags.running_gold_fw) 1935 return; 1936 1937 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1938 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1939 set_bit(RSCN_UPDATE, &vha->dpc_flags); 1940 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags); 1941} 1942 1943static int 1944qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time) 1945{ 1946 scsi_qla_host_t *vha = shost_priv(shost); 1947 1948 if (!vha->host) 1949 return 1; 1950 if (time > vha->hw->loop_reset_delay * HZ) 1951 return 1; 1952 1953 return atomic_read(&vha->loop_state) == LOOP_READY; 1954} 1955 1956/* 1957 * PCI driver interface 1958 */ 1959static int __devinit 1960qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) 1961{ 1962 int ret = -ENODEV; 1963 struct Scsi_Host *host; 1964 scsi_qla_host_t *base_vha = NULL; 1965 struct qla_hw_data *ha; 1966 char pci_info[30]; 1967 char fw_str[30]; 1968 struct scsi_host_template *sht; 1969 int bars, max_id, mem_only = 0; 1970 uint16_t req_length = 0, rsp_length = 0; 1971 struct req_que *req = NULL; 1972 struct rsp_que *rsp = NULL; 1973 1974 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO); 1975 sht = &qla2xxx_driver_template; 1976 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 || 1977 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 || 1978 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 || 1979 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 || 1980 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || 1981 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 || 1982 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 || 1983 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) { 1984 bars = pci_select_bars(pdev, IORESOURCE_MEM); 1985 mem_only = 1; 1986 ql_dbg_pci(ql_dbg_init, pdev, 0x0007, 1987 "Mem only adapter.\n"); 1988 } 1989 ql_dbg_pci(ql_dbg_init, pdev, 0x0008, 1990 "Bars=%d.\n", bars); 1991 1992 if (mem_only) { 1993 if (pci_enable_device_mem(pdev)) 1994 goto probe_out; 1995 } else { 1996 if (pci_enable_device(pdev)) 1997 goto probe_out; 1998 } 1999 2000 /* This may fail but that's ok */ 2001 pci_enable_pcie_error_reporting(pdev); 2002 2003 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL); 2004 if (!ha) { 2005 ql_log_pci(ql_log_fatal, pdev, 0x0009, 2006 "Unable to allocate memory for ha.\n"); 2007 goto probe_out; 2008 } 2009 ql_dbg_pci(ql_dbg_init, pdev, 0x000a, 2010 "Memory allocated for ha=%p.\n", ha); 2011 ha->pdev = pdev; 2012 2013 /* Clear our data area */ 2014 ha->bars = bars; 2015 ha->mem_only = mem_only; 2016 spin_lock_init(&ha->hardware_lock); 2017 spin_lock_init(&ha->vport_slock); 2018 2019 /* Set ISP-type information. */ 2020 qla2x00_set_isp_flags(ha); 2021 2022 /* Set EEH reset type to fundamental if required by hba */ 2023 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) { 2024 pdev->needs_freset = 1; 2025 } 2026 2027 ha->prev_topology = 0; 2028 ha->init_cb_size = sizeof(init_cb_t); 2029 ha->link_data_rate = PORT_SPEED_UNKNOWN; 2030 ha->optrom_size = OPTROM_SIZE_2300; 2031 2032 /* Assign ISP specific operations. */ 2033 max_id = MAX_TARGETS_2200; 2034 if (IS_QLA2100(ha)) { 2035 max_id = MAX_TARGETS_2100; 2036 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; 2037 req_length = REQUEST_ENTRY_CNT_2100; 2038 rsp_length = RESPONSE_ENTRY_CNT_2100; 2039 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; 2040 ha->gid_list_info_size = 4; 2041 ha->flash_conf_off = ~0; 2042 ha->flash_data_off = ~0; 2043 ha->nvram_conf_off = ~0; 2044 ha->nvram_data_off = ~0; 2045 ha->isp_ops = &qla2100_isp_ops; 2046 } else if (IS_QLA2200(ha)) { 2047 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200; 2048 req_length = REQUEST_ENTRY_CNT_2200; 2049 rsp_length = RESPONSE_ENTRY_CNT_2100; 2050 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; 2051 ha->gid_list_info_size = 4; 2052 ha->flash_conf_off = ~0; 2053 ha->flash_data_off = ~0; 2054 ha->nvram_conf_off = ~0; 2055 ha->nvram_data_off = ~0; 2056 ha->isp_ops = &qla2100_isp_ops; 2057 } else if (IS_QLA23XX(ha)) { 2058 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2059 req_length = REQUEST_ENTRY_CNT_2200; 2060 rsp_length = RESPONSE_ENTRY_CNT_2300; 2061 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2062 ha->gid_list_info_size = 6; 2063 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2064 ha->optrom_size = OPTROM_SIZE_2322; 2065 ha->flash_conf_off = ~0; 2066 ha->flash_data_off = ~0; 2067 ha->nvram_conf_off = ~0; 2068 ha->nvram_data_off = ~0; 2069 ha->isp_ops = &qla2300_isp_ops; 2070 } else if (IS_QLA24XX_TYPE(ha)) { 2071 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2072 req_length = REQUEST_ENTRY_CNT_24XX; 2073 rsp_length = RESPONSE_ENTRY_CNT_2300; 2074 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2075 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); 2076 ha->gid_list_info_size = 8; 2077 ha->optrom_size = OPTROM_SIZE_24XX; 2078 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; 2079 ha->isp_ops = &qla24xx_isp_ops; 2080 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; 2081 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; 2082 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2083 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2084 } else if (IS_QLA25XX(ha)) { 2085 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2086 req_length = REQUEST_ENTRY_CNT_24XX; 2087 rsp_length = RESPONSE_ENTRY_CNT_2300; 2088 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2089 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); 2090 ha->gid_list_info_size = 8; 2091 ha->optrom_size = OPTROM_SIZE_25XX; 2092 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; 2093 ha->isp_ops = &qla25xx_isp_ops; 2094 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; 2095 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; 2096 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2097 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2098 } else if (IS_QLA81XX(ha)) { 2099 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2100 req_length = REQUEST_ENTRY_CNT_24XX; 2101 rsp_length = RESPONSE_ENTRY_CNT_2300; 2102 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2103 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); 2104 ha->gid_list_info_size = 8; 2105 ha->optrom_size = OPTROM_SIZE_81XX; 2106 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; 2107 ha->isp_ops = &qla81xx_isp_ops; 2108 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; 2109 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; 2110 ha->nvram_conf_off = ~0; 2111 ha->nvram_data_off = ~0; 2112 } else if (IS_QLA82XX(ha)) { 2113 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2114 req_length = REQUEST_ENTRY_CNT_82XX; 2115 rsp_length = RESPONSE_ENTRY_CNT_82XX; 2116 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2117 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); 2118 ha->gid_list_info_size = 8; 2119 ha->optrom_size = OPTROM_SIZE_82XX; 2120 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; 2121 ha->isp_ops = &qla82xx_isp_ops; 2122 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; 2123 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; 2124 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2125 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2126 } 2127 ql_dbg_pci(ql_dbg_init, pdev, 0x001e, 2128 "mbx_count=%d, req_length=%d, " 2129 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, " 2130 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, .\n", 2131 ha->mbx_count, req_length, rsp_length, ha->max_loop_id, 2132 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size, 2133 ha->nvram_npiv_size); 2134 ql_dbg_pci(ql_dbg_init, pdev, 0x001f, 2135 "isp_ops=%p, flash_conf_off=%d, " 2136 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n", 2137 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off, 2138 ha->nvram_conf_off, ha->nvram_data_off); 2139 2140 /* Configure PCI I/O space */ 2141 ret = ha->isp_ops->iospace_config(ha); 2142 if (ret) 2143 goto probe_hw_failed; 2144 2145 ql_log_pci(ql_log_info, pdev, 0x001d, 2146 "Found an ISP%04X irq %d iobase 0x%p.\n", 2147 pdev->device, pdev->irq, ha->iobase); 2148 mutex_init(&ha->vport_lock); 2149 init_completion(&ha->mbx_cmd_comp); 2150 complete(&ha->mbx_cmd_comp); 2151 init_completion(&ha->mbx_intr_comp); 2152 init_completion(&ha->dcbx_comp); 2153 2154 set_bit(0, (unsigned long *) ha->vp_idx_map); 2155 2156 qla2x00_config_dma_addressing(ha); 2157 ql_dbg_pci(ql_dbg_init, pdev, 0x0020, 2158 "64 Bit addressing is %s.\n", 2159 ha->flags.enable_64bit_addressing ? "enable" : 2160 "disable"); 2161 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp); 2162 if (!ret) { 2163 ql_log_pci(ql_log_fatal, pdev, 0x0031, 2164 "Failed to allocate memory for adapter, aborting.\n"); 2165 2166 goto probe_hw_failed; 2167 } 2168 2169 req->max_q_depth = MAX_Q_DEPTH; 2170 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU) 2171 req->max_q_depth = ql2xmaxqdepth; 2172 2173 2174 base_vha = qla2x00_create_host(sht, ha); 2175 if (!base_vha) { 2176 ret = -ENOMEM; 2177 qla2x00_mem_free(ha); 2178 qla2x00_free_req_que(ha, req); 2179 qla2x00_free_rsp_que(ha, rsp); 2180 goto probe_hw_failed; 2181 } 2182 2183 pci_set_drvdata(pdev, base_vha); 2184 2185 host = base_vha->host; 2186 base_vha->req = req; 2187 host->can_queue = req->length + 128; 2188 if (IS_QLA2XXX_MIDTYPE(ha)) 2189 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx; 2190 else 2191 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER + 2192 base_vha->vp_idx; 2193 2194 /* Set the SG table size based on ISP type */ 2195 if (!IS_FWI2_CAPABLE(ha)) { 2196 if (IS_QLA2100(ha)) 2197 host->sg_tablesize = 32; 2198 } else { 2199 if (!IS_QLA82XX(ha)) 2200 host->sg_tablesize = QLA_SG_ALL; 2201 } 2202 ql_dbg(ql_dbg_init, base_vha, 0x0032, 2203 "can_queue=%d, req=%p, " 2204 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n", 2205 host->can_queue, base_vha->req, 2206 base_vha->mgmt_svr_loop_id, host->sg_tablesize); 2207 host->max_id = max_id; 2208 host->this_id = 255; 2209 host->cmd_per_lun = 3; 2210 host->unique_id = host->host_no; 2211 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) 2212 host->max_cmd_len = 32; 2213 else 2214 host->max_cmd_len = MAX_CMDSZ; 2215 host->max_channel = MAX_BUSES - 1; 2216 host->max_lun = ql2xmaxlun; 2217 host->transportt = qla2xxx_transport_template; 2218 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC); 2219 2220 ql_dbg(ql_dbg_init, base_vha, 0x0033, 2221 "max_id=%d this_id=%d " 2222 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d " 2223 "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id, 2224 host->this_id, host->cmd_per_lun, host->unique_id, 2225 host->max_cmd_len, host->max_channel, host->max_lun, 2226 host->transportt, sht->vendor_id); 2227 2228 /* Set up the irqs */ 2229 ret = qla2x00_request_irqs(ha, rsp); 2230 if (ret) 2231 goto probe_init_failed; 2232 2233 pci_save_state(pdev); 2234 2235 /* Alloc arrays of request and response ring ptrs */ 2236que_init: 2237 if (!qla2x00_alloc_queues(ha)) { 2238 ql_log(ql_log_fatal, base_vha, 0x003d, 2239 "Failed to allocate memory for queue pointers.. aborting.\n"); 2240 goto probe_init_failed; 2241 } 2242 2243 ha->rsp_q_map[0] = rsp; 2244 ha->req_q_map[0] = req; 2245 rsp->req = req; 2246 req->rsp = rsp; 2247 set_bit(0, ha->req_qid_map); 2248 set_bit(0, ha->rsp_qid_map); 2249 /* FWI2-capable only. */ 2250 req->req_q_in = &ha->iobase->isp24.req_q_in; 2251 req->req_q_out = &ha->iobase->isp24.req_q_out; 2252 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; 2253 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; 2254 if (ha->mqenable) { 2255 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; 2256 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; 2257 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; 2258 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out; 2259 } 2260 2261 if (IS_QLA82XX(ha)) { 2262 req->req_q_out = &ha->iobase->isp82.req_q_out[0]; 2263 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0]; 2264 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0]; 2265 } 2266 2267 ql_dbg(ql_dbg_multiq, base_vha, 0xc009, 2268 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n", 2269 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); 2270 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a, 2271 "req->req_q_in=%p req->req_q_out=%p " 2272 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n", 2273 req->req_q_in, req->req_q_out, 2274 rsp->rsp_q_in, rsp->rsp_q_out); 2275 ql_dbg(ql_dbg_init, base_vha, 0x003e, 2276 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n", 2277 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); 2278 ql_dbg(ql_dbg_init, base_vha, 0x003f, 2279 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n", 2280 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out); 2281 2282 if (qla2x00_initialize_adapter(base_vha)) { 2283 ql_log(ql_log_fatal, base_vha, 0x00d6, 2284 "Failed to initialize adapter - Adapter flags %x.\n", 2285 base_vha->device_flags); 2286 2287 if (IS_QLA82XX(ha)) { 2288 qla82xx_idc_lock(ha); 2289 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 2290 QLA82XX_DEV_FAILED); 2291 qla82xx_idc_unlock(ha); 2292 ql_log(ql_log_fatal, base_vha, 0x00d7, 2293 "HW State: FAILED.\n"); 2294 } 2295 2296 ret = -ENODEV; 2297 goto probe_failed; 2298 } 2299 2300 if (ha->mqenable) { 2301 if (qla25xx_setup_mode(base_vha)) { 2302 ql_log(ql_log_warn, base_vha, 0x00ec, 2303 "Failed to create queues, falling back to single queue mode.\n"); 2304 goto que_init; 2305 } 2306 } 2307 2308 if (ha->flags.running_gold_fw) 2309 goto skip_dpc; 2310 2311 /* 2312 * Startup the kernel thread for this host adapter 2313 */ 2314 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha, 2315 "%s_dpc", base_vha->host_str); 2316 if (IS_ERR(ha->dpc_thread)) { 2317 ql_log(ql_log_fatal, base_vha, 0x00ed, 2318 "Failed to start DPC thread.\n"); 2319 ret = PTR_ERR(ha->dpc_thread); 2320 goto probe_failed; 2321 } 2322 ql_dbg(ql_dbg_init, base_vha, 0x00ee, 2323 "DPC thread started successfully.\n"); 2324 2325skip_dpc: 2326 list_add_tail(&base_vha->list, &ha->vp_list); 2327 base_vha->host->irq = ha->pdev->irq; 2328 2329 /* Initialized the timer */ 2330 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL); 2331 ql_dbg(ql_dbg_init, base_vha, 0x00ef, 2332 "Started qla2x00_timer with " 2333 "interval=%d.\n", WATCH_INTERVAL); 2334 ql_dbg(ql_dbg_init, base_vha, 0x00f0, 2335 "Detected hba at address=%p.\n", 2336 ha); 2337 2338 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 2339 if (ha->fw_attributes & BIT_4) { 2340 int prot = 0; 2341 base_vha->flags.difdix_supported = 1; 2342 ql_dbg(ql_dbg_init, base_vha, 0x00f1, 2343 "Registering for DIF/DIX type 1 and 3 protection.\n"); 2344 if (ql2xenabledif == 1) 2345 prot = SHOST_DIX_TYPE0_PROTECTION; 2346 scsi_host_set_prot(host, 2347 prot | SHOST_DIF_TYPE1_PROTECTION 2348 | SHOST_DIF_TYPE2_PROTECTION 2349 | SHOST_DIF_TYPE3_PROTECTION 2350 | SHOST_DIX_TYPE1_PROTECTION 2351 | SHOST_DIX_TYPE2_PROTECTION 2352 | SHOST_DIX_TYPE3_PROTECTION); 2353 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC); 2354 } else 2355 base_vha->flags.difdix_supported = 0; 2356 } 2357 2358 ha->isp_ops->enable_intrs(ha); 2359 2360 ret = scsi_add_host(host, &pdev->dev); 2361 if (ret) 2362 goto probe_failed; 2363 2364 base_vha->flags.init_done = 1; 2365 base_vha->flags.online = 1; 2366 2367 ql_dbg(ql_dbg_init, base_vha, 0x00f2, 2368 "Init done and hba is online.\n"); 2369 2370 scsi_scan_host(host); 2371 2372 qla2x00_alloc_sysfs_attr(base_vha); 2373 2374 qla2x00_init_host_attr(base_vha); 2375 2376 qla2x00_dfs_setup(base_vha); 2377 2378 ql_log(ql_log_info, base_vha, 0x00fb, 2379 "QLogic %s - %s.\n", 2380 ha->model_number, ha->model_desc ? ha->model_desc : ""); 2381 ql_log(ql_log_info, base_vha, 0x00fc, 2382 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n", 2383 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info), 2384 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-', 2385 base_vha->host_no, 2386 ha->isp_ops->fw_version_str(base_vha, fw_str)); 2387 2388 return 0; 2389 2390probe_init_failed: 2391 qla2x00_free_req_que(ha, req); 2392 qla2x00_free_rsp_que(ha, rsp); 2393 ha->max_req_queues = ha->max_rsp_queues = 0; 2394 2395probe_failed: 2396 if (base_vha->timer_active) 2397 qla2x00_stop_timer(base_vha); 2398 base_vha->flags.online = 0; 2399 if (ha->dpc_thread) { 2400 struct task_struct *t = ha->dpc_thread; 2401 2402 ha->dpc_thread = NULL; 2403 kthread_stop(t); 2404 } 2405 2406 qla2x00_free_device(base_vha); 2407 2408 scsi_host_put(base_vha->host); 2409 2410probe_hw_failed: 2411 if (IS_QLA82XX(ha)) { 2412 qla82xx_idc_lock(ha); 2413 qla82xx_clear_drv_active(ha); 2414 qla82xx_idc_unlock(ha); 2415 iounmap((device_reg_t __iomem *)ha->nx_pcibase); 2416 if (!ql2xdbwr) 2417 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr); 2418 } else { 2419 if (ha->iobase) 2420 iounmap(ha->iobase); 2421 } 2422 pci_release_selected_regions(ha->pdev, ha->bars); 2423 kfree(ha); 2424 ha = NULL; 2425 2426probe_out: 2427 pci_disable_device(pdev); 2428 return ret; 2429} 2430 2431static void 2432qla2x00_shutdown(struct pci_dev *pdev) 2433{ 2434 scsi_qla_host_t *vha; 2435 struct qla_hw_data *ha; 2436 2437 vha = pci_get_drvdata(pdev); 2438 ha = vha->hw; 2439 2440 /* Turn-off FCE trace */ 2441 if (ha->flags.fce_enabled) { 2442 qla2x00_disable_fce_trace(vha, NULL, NULL); 2443 ha->flags.fce_enabled = 0; 2444 } 2445 2446 /* Turn-off EFT trace */ 2447 if (ha->eft) 2448 qla2x00_disable_eft_trace(vha); 2449 2450 /* Stop currently executing firmware. */ 2451 qla2x00_try_to_stop_firmware(vha); 2452 2453 /* Turn adapter off line */ 2454 vha->flags.online = 0; 2455 2456 /* turn-off interrupts on the card */ 2457 if (ha->interrupts_on) { 2458 vha->flags.init_done = 0; 2459 ha->isp_ops->disable_intrs(ha); 2460 } 2461 2462 qla2x00_free_irqs(vha); 2463 2464 qla2x00_free_fw_dump(ha); 2465} 2466 2467static void 2468qla2x00_remove_one(struct pci_dev *pdev) 2469{ 2470 scsi_qla_host_t *base_vha, *vha; 2471 struct qla_hw_data *ha; 2472 unsigned long flags; 2473 2474 base_vha = pci_get_drvdata(pdev); 2475 ha = base_vha->hw; 2476 2477 mutex_lock(&ha->vport_lock); 2478 while (ha->cur_vport_count) { 2479 struct Scsi_Host *scsi_host; 2480 2481 spin_lock_irqsave(&ha->vport_slock, flags); 2482 2483 BUG_ON(base_vha->list.next == &ha->vp_list); 2484 /* This assumes first entry in ha->vp_list is always base vha */ 2485 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list); 2486 scsi_host = scsi_host_get(vha->host); 2487 2488 spin_unlock_irqrestore(&ha->vport_slock, flags); 2489 mutex_unlock(&ha->vport_lock); 2490 2491 fc_vport_terminate(vha->fc_vport); 2492 scsi_host_put(vha->host); 2493 2494 mutex_lock(&ha->vport_lock); 2495 } 2496 mutex_unlock(&ha->vport_lock); 2497 2498 set_bit(UNLOADING, &base_vha->dpc_flags); 2499 2500 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); 2501 2502 qla2x00_dfs_remove(base_vha); 2503 2504 qla84xx_put_chip(base_vha); 2505 2506 /* Disable timer */ 2507 if (base_vha->timer_active) 2508 qla2x00_stop_timer(base_vha); 2509 2510 base_vha->flags.online = 0; 2511 2512 /* Flush the work queue and remove it */ 2513 if (ha->wq) { 2514 flush_workqueue(ha->wq); 2515 destroy_workqueue(ha->wq); 2516 ha->wq = NULL; 2517 } 2518 2519 /* Kill the kernel thread for this host */ 2520 if (ha->dpc_thread) { 2521 struct task_struct *t = ha->dpc_thread; 2522 2523 /* 2524 * qla2xxx_wake_dpc checks for ->dpc_thread 2525 * so we need to zero it out. 2526 */ 2527 ha->dpc_thread = NULL; 2528 kthread_stop(t); 2529 } 2530 2531 qla2x00_free_sysfs_attr(base_vha); 2532 2533 fc_remove_host(base_vha->host); 2534 2535 scsi_remove_host(base_vha->host); 2536 2537 qla2x00_free_device(base_vha); 2538 2539 scsi_host_put(base_vha->host); 2540 2541 if (IS_QLA82XX(ha)) { 2542 qla82xx_idc_lock(ha); 2543 qla82xx_clear_drv_active(ha); 2544 qla82xx_idc_unlock(ha); 2545 2546 iounmap((device_reg_t __iomem *)ha->nx_pcibase); 2547 if (!ql2xdbwr) 2548 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr); 2549 } else { 2550 if (ha->iobase) 2551 iounmap(ha->iobase); 2552 2553 if (ha->mqiobase) 2554 iounmap(ha->mqiobase); 2555 } 2556 2557 pci_release_selected_regions(ha->pdev, ha->bars); 2558 kfree(ha); 2559 ha = NULL; 2560 2561 pci_disable_pcie_error_reporting(pdev); 2562 2563 pci_disable_device(pdev); 2564 pci_set_drvdata(pdev, NULL); 2565} 2566 2567static void 2568qla2x00_free_device(scsi_qla_host_t *vha) 2569{ 2570 struct qla_hw_data *ha = vha->hw; 2571 2572 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); 2573 2574 /* Disable timer */ 2575 if (vha->timer_active) 2576 qla2x00_stop_timer(vha); 2577 2578 /* Kill the kernel thread for this host */ 2579 if (ha->dpc_thread) { 2580 struct task_struct *t = ha->dpc_thread; 2581 2582 /* 2583 * qla2xxx_wake_dpc checks for ->dpc_thread 2584 * so we need to zero it out. 2585 */ 2586 ha->dpc_thread = NULL; 2587 kthread_stop(t); 2588 } 2589 2590 qla25xx_delete_queues(vha); 2591 2592 if (ha->flags.fce_enabled) 2593 qla2x00_disable_fce_trace(vha, NULL, NULL); 2594 2595 if (ha->eft) 2596 qla2x00_disable_eft_trace(vha); 2597 2598 /* Stop currently executing firmware. */ 2599 qla2x00_try_to_stop_firmware(vha); 2600 2601 vha->flags.online = 0; 2602 2603 /* turn-off interrupts on the card */ 2604 if (ha->interrupts_on) { 2605 vha->flags.init_done = 0; 2606 ha->isp_ops->disable_intrs(ha); 2607 } 2608 2609 qla2x00_free_irqs(vha); 2610 2611 qla2x00_free_fcports(vha); 2612 2613 qla2x00_mem_free(ha); 2614 2615 qla82xx_md_free(vha); 2616 2617 qla2x00_free_queues(ha); 2618} 2619 2620void qla2x00_free_fcports(struct scsi_qla_host *vha) 2621{ 2622 fc_port_t *fcport, *tfcport; 2623 2624 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) { 2625 list_del(&fcport->list); 2626 kfree(fcport); 2627 fcport = NULL; 2628 } 2629} 2630 2631static inline void 2632qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport, 2633 int defer) 2634{ 2635 struct fc_rport *rport; 2636 scsi_qla_host_t *base_vha; 2637 unsigned long flags; 2638 2639 if (!fcport->rport) 2640 return; 2641 2642 rport = fcport->rport; 2643 if (defer) { 2644 base_vha = pci_get_drvdata(vha->hw->pdev); 2645 spin_lock_irqsave(vha->host->host_lock, flags); 2646 fcport->drport = rport; 2647 spin_unlock_irqrestore(vha->host->host_lock, flags); 2648 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); 2649 qla2xxx_wake_dpc(base_vha); 2650 } else 2651 fc_remote_port_delete(rport); 2652} 2653 2654/* 2655 * qla2x00_mark_device_lost Updates fcport state when device goes offline. 2656 * 2657 * Input: ha = adapter block pointer. fcport = port structure pointer. 2658 * 2659 * Return: None. 2660 * 2661 * Context: 2662 */ 2663void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport, 2664 int do_login, int defer) 2665{ 2666 if (atomic_read(&fcport->state) == FCS_ONLINE && 2667 vha->vp_idx == fcport->vp_idx) { 2668 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2669 qla2x00_schedule_rport_del(vha, fcport, defer); 2670 } 2671 /* 2672 * We may need to retry the login, so don't change the state of the 2673 * port but do the retries. 2674 */ 2675 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD) 2676 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2677 2678 if (!do_login) 2679 return; 2680 2681 if (fcport->login_retry == 0) { 2682 fcport->login_retry = vha->hw->login_retry_count; 2683 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2684 2685 ql_dbg(ql_dbg_disc, vha, 0x2067, 2686 "Port login retry " 2687 "%02x%02x%02x%02x%02x%02x%02x%02x, " 2688 "id = 0x%04x retry cnt=%d.\n", 2689 fcport->port_name[0], fcport->port_name[1], 2690 fcport->port_name[2], fcport->port_name[3], 2691 fcport->port_name[4], fcport->port_name[5], 2692 fcport->port_name[6], fcport->port_name[7], 2693 fcport->loop_id, fcport->login_retry); 2694 } 2695} 2696 2697/* 2698 * qla2x00_mark_all_devices_lost 2699 * Updates fcport state when device goes offline. 2700 * 2701 * Input: 2702 * ha = adapter block pointer. 2703 * fcport = port structure pointer. 2704 * 2705 * Return: 2706 * None. 2707 * 2708 * Context: 2709 */ 2710void 2711qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer) 2712{ 2713 fc_port_t *fcport; 2714 2715 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2716 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx) 2717 continue; 2718 2719 /* 2720 * No point in marking the device as lost, if the device is 2721 * already DEAD. 2722 */ 2723 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD) 2724 continue; 2725 if (atomic_read(&fcport->state) == FCS_ONLINE) { 2726 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2727 if (defer) 2728 qla2x00_schedule_rport_del(vha, fcport, defer); 2729 else if (vha->vp_idx == fcport->vp_idx) 2730 qla2x00_schedule_rport_del(vha, fcport, defer); 2731 } 2732 } 2733} 2734 2735/* 2736* qla2x00_mem_alloc 2737* Allocates adapter memory. 2738* 2739* Returns: 2740* 0 = success. 2741* !0 = failure. 2742*/ 2743static int 2744qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, 2745 struct req_que **req, struct rsp_que **rsp) 2746{ 2747 char name[16]; 2748 2749 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, 2750 &ha->init_cb_dma, GFP_KERNEL); 2751 if (!ha->init_cb) 2752 goto fail; 2753 2754 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE, 2755 &ha->gid_list_dma, GFP_KERNEL); 2756 if (!ha->gid_list) 2757 goto fail_free_init_cb; 2758 2759 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 2760 if (!ha->srb_mempool) 2761 goto fail_free_gid_list; 2762 2763 if (IS_QLA82XX(ha)) { 2764 /* Allocate cache for CT6 Ctx. */ 2765 if (!ctx_cachep) { 2766 ctx_cachep = kmem_cache_create("qla2xxx_ctx", 2767 sizeof(struct ct6_dsd), 0, 2768 SLAB_HWCACHE_ALIGN, NULL); 2769 if (!ctx_cachep) 2770 goto fail_free_gid_list; 2771 } 2772 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ, 2773 ctx_cachep); 2774 if (!ha->ctx_mempool) 2775 goto fail_free_srb_mempool; 2776 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021, 2777 "ctx_cachep=%p ctx_mempool=%p.\n", 2778 ctx_cachep, ha->ctx_mempool); 2779 } 2780 2781 /* Get memory for cached NVRAM */ 2782 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL); 2783 if (!ha->nvram) 2784 goto fail_free_ctx_mempool; 2785 2786 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME, 2787 ha->pdev->device); 2788 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev, 2789 DMA_POOL_SIZE, 8, 0); 2790 if (!ha->s_dma_pool) 2791 goto fail_free_nvram; 2792 2793 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022, 2794 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n", 2795 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool); 2796 2797 if (IS_QLA82XX(ha) || ql2xenabledif) { 2798 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev, 2799 DSD_LIST_DMA_POOL_SIZE, 8, 0); 2800 if (!ha->dl_dma_pool) { 2801 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023, 2802 "Failed to allocate memory for dl_dma_pool.\n"); 2803 goto fail_s_dma_pool; 2804 } 2805 2806 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev, 2807 FCP_CMND_DMA_POOL_SIZE, 8, 0); 2808 if (!ha->fcp_cmnd_dma_pool) { 2809 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024, 2810 "Failed to allocate memory for fcp_cmnd_dma_pool.\n"); 2811 goto fail_dl_dma_pool; 2812 } 2813 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025, 2814 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n", 2815 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool); 2816 } 2817 2818 /* Allocate memory for SNS commands */ 2819 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2820 /* Get consistent memory allocated for SNS commands */ 2821 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev, 2822 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL); 2823 if (!ha->sns_cmd) 2824 goto fail_dma_pool; 2825 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026, 2826 "sns_cmd: %p.\n", ha->sns_cmd); 2827 } else { 2828 /* Get consistent memory allocated for MS IOCB */ 2829 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, 2830 &ha->ms_iocb_dma); 2831 if (!ha->ms_iocb) 2832 goto fail_dma_pool; 2833 /* Get consistent memory allocated for CT SNS commands */ 2834 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev, 2835 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL); 2836 if (!ha->ct_sns) 2837 goto fail_free_ms_iocb; 2838 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027, 2839 "ms_iocb=%p ct_sns=%p.\n", 2840 ha->ms_iocb, ha->ct_sns); 2841 } 2842 2843 /* Allocate memory for request ring */ 2844 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL); 2845 if (!*req) { 2846 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028, 2847 "Failed to allocate memory for req.\n"); 2848 goto fail_req; 2849 } 2850 (*req)->length = req_len; 2851 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev, 2852 ((*req)->length + 1) * sizeof(request_t), 2853 &(*req)->dma, GFP_KERNEL); 2854 if (!(*req)->ring) { 2855 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029, 2856 "Failed to allocate memory for req_ring.\n"); 2857 goto fail_req_ring; 2858 } 2859 /* Allocate memory for response ring */ 2860 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL); 2861 if (!*rsp) { 2862 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a, 2863 "Failed to allocate memory for rsp.\n"); 2864 goto fail_rsp; 2865 } 2866 (*rsp)->hw = ha; 2867 (*rsp)->length = rsp_len; 2868 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev, 2869 ((*rsp)->length + 1) * sizeof(response_t), 2870 &(*rsp)->dma, GFP_KERNEL); 2871 if (!(*rsp)->ring) { 2872 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b, 2873 "Failed to allocate memory for rsp_ring.\n"); 2874 goto fail_rsp_ring; 2875 } 2876 (*req)->rsp = *rsp; 2877 (*rsp)->req = *req; 2878 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c, 2879 "req=%p req->length=%d req->ring=%p rsp=%p " 2880 "rsp->length=%d rsp->ring=%p.\n", 2881 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length, 2882 (*rsp)->ring); 2883 /* Allocate memory for NVRAM data for vports */ 2884 if (ha->nvram_npiv_size) { 2885 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) * 2886 ha->nvram_npiv_size, GFP_KERNEL); 2887 if (!ha->npiv_info) { 2888 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d, 2889 "Failed to allocate memory for npiv_info.\n"); 2890 goto fail_npiv_info; 2891 } 2892 } else 2893 ha->npiv_info = NULL; 2894 2895 /* Get consistent memory allocated for EX-INIT-CB. */ 2896 if (IS_QLA8XXX_TYPE(ha)) { 2897 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, 2898 &ha->ex_init_cb_dma); 2899 if (!ha->ex_init_cb) 2900 goto fail_ex_init_cb; 2901 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e, 2902 "ex_init_cb=%p.\n", ha->ex_init_cb); 2903 } 2904 2905 INIT_LIST_HEAD(&ha->gbl_dsd_list); 2906 2907 /* Get consistent memory allocated for Async Port-Database. */ 2908 if (!IS_FWI2_CAPABLE(ha)) { 2909 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, 2910 &ha->async_pd_dma); 2911 if (!ha->async_pd) 2912 goto fail_async_pd; 2913 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f, 2914 "async_pd=%p.\n", ha->async_pd); 2915 } 2916 2917 INIT_LIST_HEAD(&ha->vp_list); 2918 return 1; 2919 2920fail_async_pd: 2921 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma); 2922fail_ex_init_cb: 2923 kfree(ha->npiv_info); 2924fail_npiv_info: 2925 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * 2926 sizeof(response_t), (*rsp)->ring, (*rsp)->dma); 2927 (*rsp)->ring = NULL; 2928 (*rsp)->dma = 0; 2929fail_rsp_ring: 2930 kfree(*rsp); 2931fail_rsp: 2932 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) * 2933 sizeof(request_t), (*req)->ring, (*req)->dma); 2934 (*req)->ring = NULL; 2935 (*req)->dma = 0; 2936fail_req_ring: 2937 kfree(*req); 2938fail_req: 2939 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), 2940 ha->ct_sns, ha->ct_sns_dma); 2941 ha->ct_sns = NULL; 2942 ha->ct_sns_dma = 0; 2943fail_free_ms_iocb: 2944 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); 2945 ha->ms_iocb = NULL; 2946 ha->ms_iocb_dma = 0; 2947fail_dma_pool: 2948 if (IS_QLA82XX(ha) || ql2xenabledif) { 2949 dma_pool_destroy(ha->fcp_cmnd_dma_pool); 2950 ha->fcp_cmnd_dma_pool = NULL; 2951 } 2952fail_dl_dma_pool: 2953 if (IS_QLA82XX(ha) || ql2xenabledif) { 2954 dma_pool_destroy(ha->dl_dma_pool); 2955 ha->dl_dma_pool = NULL; 2956 } 2957fail_s_dma_pool: 2958 dma_pool_destroy(ha->s_dma_pool); 2959 ha->s_dma_pool = NULL; 2960fail_free_nvram: 2961 kfree(ha->nvram); 2962 ha->nvram = NULL; 2963fail_free_ctx_mempool: 2964 mempool_destroy(ha->ctx_mempool); 2965 ha->ctx_mempool = NULL; 2966fail_free_srb_mempool: 2967 mempool_destroy(ha->srb_mempool); 2968 ha->srb_mempool = NULL; 2969fail_free_gid_list: 2970 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, 2971 ha->gid_list_dma); 2972 ha->gid_list = NULL; 2973 ha->gid_list_dma = 0; 2974fail_free_init_cb: 2975 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb, 2976 ha->init_cb_dma); 2977 ha->init_cb = NULL; 2978 ha->init_cb_dma = 0; 2979fail: 2980 ql_log(ql_log_fatal, NULL, 0x0030, 2981 "Memory allocation failure.\n"); 2982 return -ENOMEM; 2983} 2984 2985/* 2986* qla2x00_free_fw_dump 2987* Frees fw dump stuff. 2988* 2989* Input: 2990* ha = adapter block pointer. 2991*/ 2992static void 2993qla2x00_free_fw_dump(struct qla_hw_data *ha) 2994{ 2995 if (ha->fce) 2996 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 2997 ha->fce_dma); 2998 2999 if (ha->fw_dump) { 3000 if (ha->eft) 3001 dma_free_coherent(&ha->pdev->dev, 3002 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma); 3003 vfree(ha->fw_dump); 3004 } 3005 ha->fce = NULL; 3006 ha->fce_dma = 0; 3007 ha->eft = NULL; 3008 ha->eft_dma = 0; 3009 ha->fw_dump = NULL; 3010 ha->fw_dumped = 0; 3011 ha->fw_dump_reading = 0; 3012} 3013 3014/* 3015* qla2x00_mem_free 3016* Frees all adapter allocated memory. 3017* 3018* Input: 3019* ha = adapter block pointer. 3020*/ 3021static void 3022qla2x00_mem_free(struct qla_hw_data *ha) 3023{ 3024 qla2x00_free_fw_dump(ha); 3025 3026 if (ha->srb_mempool) 3027 mempool_destroy(ha->srb_mempool); 3028 3029 if (ha->dcbx_tlv) 3030 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, 3031 ha->dcbx_tlv, ha->dcbx_tlv_dma); 3032 3033 if (ha->xgmac_data) 3034 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, 3035 ha->xgmac_data, ha->xgmac_data_dma); 3036 3037 if (ha->sns_cmd) 3038 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), 3039 ha->sns_cmd, ha->sns_cmd_dma); 3040 3041 if (ha->ct_sns) 3042 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), 3043 ha->ct_sns, ha->ct_sns_dma); 3044 3045 if (ha->sfp_data) 3046 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma); 3047 3048 if (ha->edc_data) 3049 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma); 3050 3051 if (ha->ms_iocb) 3052 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); 3053 3054 if (ha->ex_init_cb) 3055 dma_pool_free(ha->s_dma_pool, 3056 ha->ex_init_cb, ha->ex_init_cb_dma); 3057 3058 if (ha->async_pd) 3059 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); 3060 3061 if (ha->s_dma_pool) 3062 dma_pool_destroy(ha->s_dma_pool); 3063 3064 if (ha->gid_list) 3065 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, 3066 ha->gid_list_dma); 3067 3068 if (IS_QLA82XX(ha)) { 3069 if (!list_empty(&ha->gbl_dsd_list)) { 3070 struct dsd_dma *dsd_ptr, *tdsd_ptr; 3071 3072 /* clean up allocated prev pool */ 3073 list_for_each_entry_safe(dsd_ptr, 3074 tdsd_ptr, &ha->gbl_dsd_list, list) { 3075 dma_pool_free(ha->dl_dma_pool, 3076 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma); 3077 list_del(&dsd_ptr->list); 3078 kfree(dsd_ptr); 3079 } 3080 } 3081 } 3082 3083 if (ha->dl_dma_pool) 3084 dma_pool_destroy(ha->dl_dma_pool); 3085 3086 if (ha->fcp_cmnd_dma_pool) 3087 dma_pool_destroy(ha->fcp_cmnd_dma_pool); 3088 3089 if (ha->ctx_mempool) 3090 mempool_destroy(ha->ctx_mempool); 3091 3092 if (ha->init_cb) 3093 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, 3094 ha->init_cb, ha->init_cb_dma); 3095 vfree(ha->optrom_buffer); 3096 kfree(ha->nvram); 3097 kfree(ha->npiv_info); 3098 3099 ha->srb_mempool = NULL; 3100 ha->ctx_mempool = NULL; 3101 ha->sns_cmd = NULL; 3102 ha->sns_cmd_dma = 0; 3103 ha->ct_sns = NULL; 3104 ha->ct_sns_dma = 0; 3105 ha->ms_iocb = NULL; 3106 ha->ms_iocb_dma = 0; 3107 ha->init_cb = NULL; 3108 ha->init_cb_dma = 0; 3109 ha->ex_init_cb = NULL; 3110 ha->ex_init_cb_dma = 0; 3111 ha->async_pd = NULL; 3112 ha->async_pd_dma = 0; 3113 3114 ha->s_dma_pool = NULL; 3115 ha->dl_dma_pool = NULL; 3116 ha->fcp_cmnd_dma_pool = NULL; 3117 3118 ha->gid_list = NULL; 3119 ha->gid_list_dma = 0; 3120} 3121 3122struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht, 3123 struct qla_hw_data *ha) 3124{ 3125 struct Scsi_Host *host; 3126 struct scsi_qla_host *vha = NULL; 3127 3128 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t)); 3129 if (host == NULL) { 3130 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107, 3131 "Failed to allocate host from the scsi layer, aborting.\n"); 3132 goto fail; 3133 } 3134 3135 /* Clear our data area */ 3136 vha = shost_priv(host); 3137 memset(vha, 0, sizeof(scsi_qla_host_t)); 3138 3139 vha->host = host; 3140 vha->host_no = host->host_no; 3141 vha->hw = ha; 3142 3143 INIT_LIST_HEAD(&vha->vp_fcports); 3144 INIT_LIST_HEAD(&vha->work_list); 3145 INIT_LIST_HEAD(&vha->list); 3146 3147 spin_lock_init(&vha->work_lock); 3148 3149 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no); 3150 ql_dbg(ql_dbg_init, vha, 0x0041, 3151 "Allocated the host=%p hw=%p vha=%p dev_name=%s", 3152 vha->host, vha->hw, vha, 3153 dev_name(&(ha->pdev->dev))); 3154 3155 return vha; 3156 3157fail: 3158 return vha; 3159} 3160 3161static struct qla_work_evt * 3162qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type) 3163{ 3164 struct qla_work_evt *e; 3165 uint8_t bail; 3166 3167 QLA_VHA_MARK_BUSY(vha, bail); 3168 if (bail) 3169 return NULL; 3170 3171 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC); 3172 if (!e) { 3173 QLA_VHA_MARK_NOT_BUSY(vha); 3174 return NULL; 3175 } 3176 3177 INIT_LIST_HEAD(&e->list); 3178 e->type = type; 3179 e->flags = QLA_EVT_FLAG_FREE; 3180 return e; 3181} 3182 3183static int 3184qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e) 3185{ 3186 unsigned long flags; 3187 3188 spin_lock_irqsave(&vha->work_lock, flags); 3189 list_add_tail(&e->list, &vha->work_list); 3190 spin_unlock_irqrestore(&vha->work_lock, flags); 3191 qla2xxx_wake_dpc(vha); 3192 3193 return QLA_SUCCESS; 3194} 3195 3196int 3197qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code, 3198 u32 data) 3199{ 3200 struct qla_work_evt *e; 3201 3202 e = qla2x00_alloc_work(vha, QLA_EVT_AEN); 3203 if (!e) 3204 return QLA_FUNCTION_FAILED; 3205 3206 e->u.aen.code = code; 3207 e->u.aen.data = data; 3208 return qla2x00_post_work(vha, e); 3209} 3210 3211int 3212qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb) 3213{ 3214 struct qla_work_evt *e; 3215 3216 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK); 3217 if (!e) 3218 return QLA_FUNCTION_FAILED; 3219 3220 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t)); 3221 return qla2x00_post_work(vha, e); 3222} 3223 3224#define qla2x00_post_async_work(name, type) \ 3225int qla2x00_post_async_##name##_work( \ 3226 struct scsi_qla_host *vha, \ 3227 fc_port_t *fcport, uint16_t *data) \ 3228{ \ 3229 struct qla_work_evt *e; \ 3230 \ 3231 e = qla2x00_alloc_work(vha, type); \ 3232 if (!e) \ 3233 return QLA_FUNCTION_FAILED; \ 3234 \ 3235 e->u.logio.fcport = fcport; \ 3236 if (data) { \ 3237 e->u.logio.data[0] = data[0]; \ 3238 e->u.logio.data[1] = data[1]; \ 3239 } \ 3240 return qla2x00_post_work(vha, e); \ 3241} 3242 3243qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN); 3244qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE); 3245qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT); 3246qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE); 3247qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC); 3248qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE); 3249 3250int 3251qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code) 3252{ 3253 struct qla_work_evt *e; 3254 3255 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT); 3256 if (!e) 3257 return QLA_FUNCTION_FAILED; 3258 3259 e->u.uevent.code = code; 3260 return qla2x00_post_work(vha, e); 3261} 3262 3263static void 3264qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code) 3265{ 3266 char event_string[40]; 3267 char *envp[] = { event_string, NULL }; 3268 3269 switch (code) { 3270 case QLA_UEVENT_CODE_FW_DUMP: 3271 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld", 3272 vha->host_no); 3273 break; 3274 default: 3275 /* do nothing */ 3276 break; 3277 } 3278 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp); 3279} 3280 3281void 3282qla2x00_do_work(struct scsi_qla_host *vha) 3283{ 3284 struct qla_work_evt *e, *tmp; 3285 unsigned long flags; 3286 LIST_HEAD(work); 3287 3288 spin_lock_irqsave(&vha->work_lock, flags); 3289 list_splice_init(&vha->work_list, &work); 3290 spin_unlock_irqrestore(&vha->work_lock, flags); 3291 3292 list_for_each_entry_safe(e, tmp, &work, list) { 3293 list_del_init(&e->list); 3294 3295 switch (e->type) { 3296 case QLA_EVT_AEN: 3297 fc_host_post_event(vha->host, fc_get_event_number(), 3298 e->u.aen.code, e->u.aen.data); 3299 break; 3300 case QLA_EVT_IDC_ACK: 3301 qla81xx_idc_ack(vha, e->u.idc_ack.mb); 3302 break; 3303 case QLA_EVT_ASYNC_LOGIN: 3304 qla2x00_async_login(vha, e->u.logio.fcport, 3305 e->u.logio.data); 3306 break; 3307 case QLA_EVT_ASYNC_LOGIN_DONE: 3308 qla2x00_async_login_done(vha, e->u.logio.fcport, 3309 e->u.logio.data); 3310 break; 3311 case QLA_EVT_ASYNC_LOGOUT: 3312 qla2x00_async_logout(vha, e->u.logio.fcport); 3313 break; 3314 case QLA_EVT_ASYNC_LOGOUT_DONE: 3315 qla2x00_async_logout_done(vha, e->u.logio.fcport, 3316 e->u.logio.data); 3317 break; 3318 case QLA_EVT_ASYNC_ADISC: 3319 qla2x00_async_adisc(vha, e->u.logio.fcport, 3320 e->u.logio.data); 3321 break; 3322 case QLA_EVT_ASYNC_ADISC_DONE: 3323 qla2x00_async_adisc_done(vha, e->u.logio.fcport, 3324 e->u.logio.data); 3325 break; 3326 case QLA_EVT_UEVENT: 3327 qla2x00_uevent_emit(vha, e->u.uevent.code); 3328 break; 3329 } 3330 if (e->flags & QLA_EVT_FLAG_FREE) 3331 kfree(e); 3332 3333 /* For each work completed decrement vha ref count */ 3334 QLA_VHA_MARK_NOT_BUSY(vha); 3335 } 3336} 3337 3338/* Relogins all the fcports of a vport 3339 * Context: dpc thread 3340 */ 3341void qla2x00_relogin(struct scsi_qla_host *vha) 3342{ 3343 fc_port_t *fcport; 3344 int status; 3345 uint16_t next_loopid = 0; 3346 struct qla_hw_data *ha = vha->hw; 3347 uint16_t data[2]; 3348 3349 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3350 /* 3351 * If the port is not ONLINE then try to login 3352 * to it if we haven't run out of retries. 3353 */ 3354 if (atomic_read(&fcport->state) != FCS_ONLINE && 3355 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) { 3356 fcport->login_retry--; 3357 if (fcport->flags & FCF_FABRIC_DEVICE) { 3358 if (fcport->flags & FCF_FCP2_DEVICE) 3359 ha->isp_ops->fabric_logout(vha, 3360 fcport->loop_id, 3361 fcport->d_id.b.domain, 3362 fcport->d_id.b.area, 3363 fcport->d_id.b.al_pa); 3364 3365 if (fcport->loop_id == FC_NO_LOOP_ID) { 3366 fcport->loop_id = next_loopid = 3367 ha->min_external_loopid; 3368 status = qla2x00_find_new_loop_id( 3369 vha, fcport); 3370 if (status != QLA_SUCCESS) { 3371 /* Ran out of IDs to use */ 3372 break; 3373 } 3374 } 3375 3376 if (IS_ALOGIO_CAPABLE(ha)) { 3377 fcport->flags |= FCF_ASYNC_SENT; 3378 data[0] = 0; 3379 data[1] = QLA_LOGIO_LOGIN_RETRIED; 3380 status = qla2x00_post_async_login_work( 3381 vha, fcport, data); 3382 if (status == QLA_SUCCESS) 3383 continue; 3384 /* Attempt a retry. */ 3385 status = 1; 3386 } else 3387 status = qla2x00_fabric_login(vha, 3388 fcport, &next_loopid); 3389 } else 3390 status = qla2x00_local_device_login(vha, 3391 fcport); 3392 3393 if (status == QLA_SUCCESS) { 3394 fcport->old_loop_id = fcport->loop_id; 3395 3396 ql_dbg(ql_dbg_disc, vha, 0x2003, 3397 "Port login OK: logged in ID 0x%x.\n", 3398 fcport->loop_id); 3399 3400 qla2x00_update_fcport(vha, fcport); 3401 3402 } else if (status == 1) { 3403 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 3404 /* retry the login again */ 3405 ql_dbg(ql_dbg_disc, vha, 0x2007, 3406 "Retrying %d login again loop_id 0x%x.\n", 3407 fcport->login_retry, fcport->loop_id); 3408 } else { 3409 fcport->login_retry = 0; 3410 } 3411 3412 if (fcport->login_retry == 0 && status != QLA_SUCCESS) 3413 fcport->loop_id = FC_NO_LOOP_ID; 3414 } 3415 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3416 break; 3417 } 3418} 3419 3420/************************************************************************** 3421* qla2x00_do_dpc 3422* This kernel thread is a task that is schedule by the interrupt handler 3423* to perform the background processing for interrupts. 3424* 3425* Notes: 3426* This task always run in the context of a kernel thread. It 3427* is kick-off by the driver's detect code and starts up 3428* up one per adapter. It immediately goes to sleep and waits for 3429* some fibre event. When either the interrupt handler or 3430* the timer routine detects a event it will one of the task 3431* bits then wake us up. 3432**************************************************************************/ 3433static int 3434qla2x00_do_dpc(void *data) 3435{ 3436 int rval; 3437 scsi_qla_host_t *base_vha; 3438 struct qla_hw_data *ha; 3439 3440 ha = (struct qla_hw_data *)data; 3441 base_vha = pci_get_drvdata(ha->pdev); 3442 3443 set_user_nice(current, -20); 3444 3445 set_current_state(TASK_INTERRUPTIBLE); 3446 while (!kthread_should_stop()) { 3447 ql_dbg(ql_dbg_dpc, base_vha, 0x4000, 3448 "DPC handler sleeping.\n"); 3449 3450 schedule(); 3451 __set_current_state(TASK_RUNNING); 3452 3453 if (!base_vha->flags.init_done || ha->flags.mbox_busy) 3454 goto end_loop; 3455 3456 if (ha->flags.eeh_busy) { 3457 ql_dbg(ql_dbg_dpc, base_vha, 0x4003, 3458 "eeh_busy=%d.\n", ha->flags.eeh_busy); 3459 goto end_loop; 3460 } 3461 3462 ha->dpc_active = 1; 3463 3464 ql_dbg(ql_dbg_dpc, base_vha, 0x4001, 3465 "DPC handler waking up.\n"); 3466 ql_dbg(ql_dbg_dpc, base_vha, 0x4002, 3467 "dpc_flags=0x%lx.\n", base_vha->dpc_flags); 3468 3469 qla2x00_do_work(base_vha); 3470 3471 if (IS_QLA82XX(ha)) { 3472 if (test_and_clear_bit(ISP_UNRECOVERABLE, 3473 &base_vha->dpc_flags)) { 3474 qla82xx_idc_lock(ha); 3475 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 3476 QLA82XX_DEV_FAILED); 3477 qla82xx_idc_unlock(ha); 3478 ql_log(ql_log_info, base_vha, 0x4004, 3479 "HW State: FAILED.\n"); 3480 qla82xx_device_state_handler(base_vha); 3481 continue; 3482 } 3483 3484 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED, 3485 &base_vha->dpc_flags)) { 3486 3487 ql_dbg(ql_dbg_dpc, base_vha, 0x4005, 3488 "FCoE context reset scheduled.\n"); 3489 if (!(test_and_set_bit(ABORT_ISP_ACTIVE, 3490 &base_vha->dpc_flags))) { 3491 if (qla82xx_fcoe_ctx_reset(base_vha)) { 3492 /* FCoE-ctx reset failed. 3493 * Escalate to chip-reset 3494 */ 3495 set_bit(ISP_ABORT_NEEDED, 3496 &base_vha->dpc_flags); 3497 } 3498 clear_bit(ABORT_ISP_ACTIVE, 3499 &base_vha->dpc_flags); 3500 } 3501 3502 ql_dbg(ql_dbg_dpc, base_vha, 0x4006, 3503 "FCoE context reset end.\n"); 3504 } 3505 } 3506 3507 if (test_and_clear_bit(ISP_ABORT_NEEDED, 3508 &base_vha->dpc_flags)) { 3509 3510 ql_dbg(ql_dbg_dpc, base_vha, 0x4007, 3511 "ISP abort scheduled.\n"); 3512 if (!(test_and_set_bit(ABORT_ISP_ACTIVE, 3513 &base_vha->dpc_flags))) { 3514 3515 if (ha->isp_ops->abort_isp(base_vha)) { 3516 /* failed. retry later */ 3517 set_bit(ISP_ABORT_NEEDED, 3518 &base_vha->dpc_flags); 3519 } 3520 clear_bit(ABORT_ISP_ACTIVE, 3521 &base_vha->dpc_flags); 3522 } 3523 3524 ql_dbg(ql_dbg_dpc, base_vha, 0x4008, 3525 "ISP abort end.\n"); 3526 } 3527 3528 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) { 3529 qla2x00_update_fcports(base_vha); 3530 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); 3531 } 3532 3533 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) { 3534 ql_dbg(ql_dbg_dpc, base_vha, 0x4009, 3535 "Quiescence mode scheduled.\n"); 3536 qla82xx_device_state_handler(base_vha); 3537 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags); 3538 if (!ha->flags.quiesce_owner) { 3539 qla2x00_perform_loop_resync(base_vha); 3540 3541 qla82xx_idc_lock(ha); 3542 qla82xx_clear_qsnt_ready(base_vha); 3543 qla82xx_idc_unlock(ha); 3544 } 3545 ql_dbg(ql_dbg_dpc, base_vha, 0x400a, 3546 "Quiescence mode end.\n"); 3547 } 3548 3549 if (test_and_clear_bit(RESET_MARKER_NEEDED, 3550 &base_vha->dpc_flags) && 3551 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) { 3552 3553 ql_dbg(ql_dbg_dpc, base_vha, 0x400b, 3554 "Reset marker scheduled.\n"); 3555 qla2x00_rst_aen(base_vha); 3556 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags); 3557 ql_dbg(ql_dbg_dpc, base_vha, 0x400c, 3558 "Reset marker end.\n"); 3559 } 3560 3561 /* Retry each device up to login retry count */ 3562 if ((test_and_clear_bit(RELOGIN_NEEDED, 3563 &base_vha->dpc_flags)) && 3564 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) && 3565 atomic_read(&base_vha->loop_state) != LOOP_DOWN) { 3566 3567 ql_dbg(ql_dbg_dpc, base_vha, 0x400d, 3568 "Relogin scheduled.\n"); 3569 qla2x00_relogin(base_vha); 3570 ql_dbg(ql_dbg_dpc, base_vha, 0x400e, 3571 "Relogin end.\n"); 3572 } 3573 3574 if (test_and_clear_bit(LOOP_RESYNC_NEEDED, 3575 &base_vha->dpc_flags)) { 3576 3577 ql_dbg(ql_dbg_dpc, base_vha, 0x400f, 3578 "Loop resync scheduled.\n"); 3579 3580 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE, 3581 &base_vha->dpc_flags))) { 3582 3583 rval = qla2x00_loop_resync(base_vha); 3584 3585 clear_bit(LOOP_RESYNC_ACTIVE, 3586 &base_vha->dpc_flags); 3587 } 3588 3589 ql_dbg(ql_dbg_dpc, base_vha, 0x4010, 3590 "Loop resync end.\n"); 3591 } 3592 3593 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) && 3594 atomic_read(&base_vha->loop_state) == LOOP_READY) { 3595 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags); 3596 qla2xxx_flash_npiv_conf(base_vha); 3597 } 3598 3599 if (!ha->interrupts_on) 3600 ha->isp_ops->enable_intrs(ha); 3601 3602 if (test_and_clear_bit(BEACON_BLINK_NEEDED, 3603 &base_vha->dpc_flags)) 3604 ha->isp_ops->beacon_blink(base_vha); 3605 3606 qla2x00_do_dpc_all_vps(base_vha); 3607 3608 ha->dpc_active = 0; 3609end_loop: 3610 set_current_state(TASK_INTERRUPTIBLE); 3611 } /* End of while(1) */ 3612 __set_current_state(TASK_RUNNING); 3613 3614 ql_dbg(ql_dbg_dpc, base_vha, 0x4011, 3615 "DPC handler exiting.\n"); 3616 3617 /* 3618 * Make sure that nobody tries to wake us up again. 3619 */ 3620 ha->dpc_active = 0; 3621 3622 /* Cleanup any residual CTX SRBs. */ 3623 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); 3624 3625 return 0; 3626} 3627 3628void 3629qla2xxx_wake_dpc(struct scsi_qla_host *vha) 3630{ 3631 struct qla_hw_data *ha = vha->hw; 3632 struct task_struct *t = ha->dpc_thread; 3633 3634 if (!test_bit(UNLOADING, &vha->dpc_flags) && t) 3635 wake_up_process(t); 3636} 3637 3638/* 3639* qla2x00_rst_aen 3640* Processes asynchronous reset. 3641* 3642* Input: 3643* ha = adapter block pointer. 3644*/ 3645static void 3646qla2x00_rst_aen(scsi_qla_host_t *vha) 3647{ 3648 if (vha->flags.online && !vha->flags.reset_active && 3649 !atomic_read(&vha->loop_down_timer) && 3650 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) { 3651 do { 3652 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 3653 3654 /* 3655 * Issue marker command only when we are going to start 3656 * the I/O. 3657 */ 3658 vha->marker_needed = 1; 3659 } while (!atomic_read(&vha->loop_down_timer) && 3660 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags))); 3661 } 3662} 3663 3664static void 3665qla2x00_sp_free_dma(srb_t *sp) 3666{ 3667 struct scsi_cmnd *cmd = sp->cmd; 3668 struct qla_hw_data *ha = sp->fcport->vha->hw; 3669 3670 if (sp->flags & SRB_DMA_VALID) { 3671 scsi_dma_unmap(cmd); 3672 sp->flags &= ~SRB_DMA_VALID; 3673 } 3674 3675 if (sp->flags & SRB_CRC_PROT_DMA_VALID) { 3676 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), 3677 scsi_prot_sg_count(cmd), cmd->sc_data_direction); 3678 sp->flags &= ~SRB_CRC_PROT_DMA_VALID; 3679 } 3680 3681 if (sp->flags & SRB_CRC_CTX_DSD_VALID) { 3682 /* List assured to be having elements */ 3683 qla2x00_clean_dsd_pool(ha, sp); 3684 sp->flags &= ~SRB_CRC_CTX_DSD_VALID; 3685 } 3686 3687 if (sp->flags & SRB_CRC_CTX_DMA_VALID) { 3688 dma_pool_free(ha->dl_dma_pool, sp->ctx, 3689 ((struct crc_context *)sp->ctx)->crc_ctx_dma); 3690 sp->flags &= ~SRB_CRC_CTX_DMA_VALID; 3691 } 3692 3693 if (sp->flags & SRB_FCP_CMND_DMA_VALID) { 3694 struct ct6_dsd *ctx = sp->ctx; 3695 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, 3696 ctx->fcp_cmnd_dma); 3697 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list); 3698 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt; 3699 ha->gbl_dsd_avail += ctx->dsd_use_cnt; 3700 mempool_free(sp->ctx, ha->ctx_mempool); 3701 sp->ctx = NULL; 3702 } 3703 3704 CMD_SP(cmd) = NULL; 3705} 3706 3707static void 3708qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp) 3709{ 3710 struct scsi_cmnd *cmd = sp->cmd; 3711 3712 qla2x00_sp_free_dma(sp); 3713 mempool_free(sp, ha->srb_mempool); 3714 cmd->scsi_done(cmd); 3715} 3716 3717void 3718qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp) 3719{ 3720 if (atomic_read(&sp->ref_count) == 0) { 3721 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015, 3722 "SP reference-count to ZERO -- sp=%p cmd=%p.\n", 3723 sp, sp->cmd); 3724 if (ql2xextended_error_logging & ql_dbg_io) 3725 BUG(); 3726 return; 3727 } 3728 if (!atomic_dec_and_test(&sp->ref_count)) 3729 return; 3730 qla2x00_sp_final_compl(ha, sp); 3731} 3732 3733/************************************************************************** 3734* qla2x00_timer 3735* 3736* Description: 3737* One second timer 3738* 3739* Context: Interrupt 3740***************************************************************************/ 3741void 3742qla2x00_timer(scsi_qla_host_t *vha) 3743{ 3744 unsigned long cpu_flags = 0; 3745 int start_dpc = 0; 3746 int index; 3747 srb_t *sp; 3748 uint16_t w; 3749 struct qla_hw_data *ha = vha->hw; 3750 struct req_que *req; 3751 3752 if (ha->flags.eeh_busy) { 3753 ql_dbg(ql_dbg_timer, vha, 0x6000, 3754 "EEH = %d, restarting timer.\n", 3755 ha->flags.eeh_busy); 3756 qla2x00_restart_timer(vha, WATCH_INTERVAL); 3757 return; 3758 } 3759 3760 /* Hardware read to raise pending EEH errors during mailbox waits. */ 3761 if (!pci_channel_offline(ha->pdev)) 3762 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); 3763 3764 /* Make sure qla82xx_watchdog is run only for physical port */ 3765 if (!vha->vp_idx && IS_QLA82XX(ha)) { 3766 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags)) 3767 start_dpc++; 3768 qla82xx_watchdog(vha); 3769 } 3770 3771 /* Loop down handler. */ 3772 if (atomic_read(&vha->loop_down_timer) > 0 && 3773 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) && 3774 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags)) 3775 && vha->flags.online) { 3776 3777 if (atomic_read(&vha->loop_down_timer) == 3778 vha->loop_down_abort_time) { 3779 3780 ql_log(ql_log_info, vha, 0x6008, 3781 "Loop down - aborting the queues before time expires.\n"); 3782 3783 if (!IS_QLA2100(ha) && vha->link_down_timeout) 3784 atomic_set(&vha->loop_state, LOOP_DEAD); 3785 3786 /* 3787 * Schedule an ISP abort to return any FCP2-device 3788 * commands. 3789 */ 3790 /* NPIV - scan physical port only */ 3791 if (!vha->vp_idx) { 3792 spin_lock_irqsave(&ha->hardware_lock, 3793 cpu_flags); 3794 req = ha->req_q_map[0]; 3795 for (index = 1; 3796 index < MAX_OUTSTANDING_COMMANDS; 3797 index++) { 3798 fc_port_t *sfcp; 3799 3800 sp = req->outstanding_cmds[index]; 3801 if (!sp) 3802 continue; 3803 if (sp->ctx && !IS_PROT_IO(sp)) 3804 continue; 3805 sfcp = sp->fcport; 3806 if (!(sfcp->flags & FCF_FCP2_DEVICE)) 3807 continue; 3808 3809 if (IS_QLA82XX(ha)) 3810 set_bit(FCOE_CTX_RESET_NEEDED, 3811 &vha->dpc_flags); 3812 else 3813 set_bit(ISP_ABORT_NEEDED, 3814 &vha->dpc_flags); 3815 break; 3816 } 3817 spin_unlock_irqrestore(&ha->hardware_lock, 3818 cpu_flags); 3819 } 3820 start_dpc++; 3821 } 3822 3823 /* if the loop has been down for 4 minutes, reinit adapter */ 3824 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) { 3825 if (!(vha->device_flags & DFLG_NO_CABLE)) { 3826 ql_log(ql_log_warn, vha, 0x6009, 3827 "Loop down - aborting ISP.\n"); 3828 3829 if (IS_QLA82XX(ha)) 3830 set_bit(FCOE_CTX_RESET_NEEDED, 3831 &vha->dpc_flags); 3832 else 3833 set_bit(ISP_ABORT_NEEDED, 3834 &vha->dpc_flags); 3835 } 3836 } 3837 ql_dbg(ql_dbg_timer, vha, 0x600a, 3838 "Loop down - seconds remaining %d.\n", 3839 atomic_read(&vha->loop_down_timer)); 3840 } 3841 3842 /* Check if beacon LED needs to be blinked for physical host only */ 3843 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { 3844 /* There is no beacon_blink function for ISP82xx */ 3845 if (!IS_QLA82XX(ha)) { 3846 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags); 3847 start_dpc++; 3848 } 3849 } 3850 3851 /* Process any deferred work. */ 3852 if (!list_empty(&vha->work_list)) 3853 start_dpc++; 3854 3855 /* Schedule the DPC routine if needed */ 3856 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) || 3857 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) || 3858 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) || 3859 start_dpc || 3860 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) || 3861 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) || 3862 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) || 3863 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) || 3864 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) || 3865 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) { 3866 ql_dbg(ql_dbg_timer, vha, 0x600b, 3867 "isp_abort_needed=%d loop_resync_needed=%d " 3868 "fcport_update_needed=%d start_dpc=%d " 3869 "reset_marker_needed=%d", 3870 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags), 3871 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags), 3872 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags), 3873 start_dpc, 3874 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)); 3875 ql_dbg(ql_dbg_timer, vha, 0x600c, 3876 "beacon_blink_needed=%d isp_unrecoverable=%d " 3877 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d " 3878 "relogin_needed=%d.\n", 3879 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags), 3880 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags), 3881 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags), 3882 test_bit(VP_DPC_NEEDED, &vha->dpc_flags), 3883 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)); 3884 qla2xxx_wake_dpc(vha); 3885 } 3886 3887 qla2x00_restart_timer(vha, WATCH_INTERVAL); 3888} 3889 3890/* Firmware interface routines. */ 3891 3892#define FW_BLOBS 8 3893#define FW_ISP21XX 0 3894#define FW_ISP22XX 1 3895#define FW_ISP2300 2 3896#define FW_ISP2322 3 3897#define FW_ISP24XX 4 3898#define FW_ISP25XX 5 3899#define FW_ISP81XX 6 3900#define FW_ISP82XX 7 3901 3902#define FW_FILE_ISP21XX "ql2100_fw.bin" 3903#define FW_FILE_ISP22XX "ql2200_fw.bin" 3904#define FW_FILE_ISP2300 "ql2300_fw.bin" 3905#define FW_FILE_ISP2322 "ql2322_fw.bin" 3906#define FW_FILE_ISP24XX "ql2400_fw.bin" 3907#define FW_FILE_ISP25XX "ql2500_fw.bin" 3908#define FW_FILE_ISP81XX "ql8100_fw.bin" 3909#define FW_FILE_ISP82XX "ql8200_fw.bin" 3910 3911static DEFINE_MUTEX(qla_fw_lock); 3912 3913static struct fw_blob qla_fw_blobs[FW_BLOBS] = { 3914 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, }, 3915 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, }, 3916 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, }, 3917 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, }, 3918 { .name = FW_FILE_ISP24XX, }, 3919 { .name = FW_FILE_ISP25XX, }, 3920 { .name = FW_FILE_ISP81XX, }, 3921 { .name = FW_FILE_ISP82XX, }, 3922}; 3923 3924struct fw_blob * 3925qla2x00_request_firmware(scsi_qla_host_t *vha) 3926{ 3927 struct qla_hw_data *ha = vha->hw; 3928 struct fw_blob *blob; 3929 3930 blob = NULL; 3931 if (IS_QLA2100(ha)) { 3932 blob = &qla_fw_blobs[FW_ISP21XX]; 3933 } else if (IS_QLA2200(ha)) { 3934 blob = &qla_fw_blobs[FW_ISP22XX]; 3935 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3936 blob = &qla_fw_blobs[FW_ISP2300]; 3937 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) { 3938 blob = &qla_fw_blobs[FW_ISP2322]; 3939 } else if (IS_QLA24XX_TYPE(ha)) { 3940 blob = &qla_fw_blobs[FW_ISP24XX]; 3941 } else if (IS_QLA25XX(ha)) { 3942 blob = &qla_fw_blobs[FW_ISP25XX]; 3943 } else if (IS_QLA81XX(ha)) { 3944 blob = &qla_fw_blobs[FW_ISP81XX]; 3945 } else if (IS_QLA82XX(ha)) { 3946 blob = &qla_fw_blobs[FW_ISP82XX]; 3947 } 3948 3949 mutex_lock(&qla_fw_lock); 3950 if (blob->fw) 3951 goto out; 3952 3953 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { 3954 ql_log(ql_log_warn, vha, 0x0063, 3955 "Failed to load firmware image (%s).\n", blob->name); 3956 blob->fw = NULL; 3957 blob = NULL; 3958 goto out; 3959 } 3960 3961out: 3962 mutex_unlock(&qla_fw_lock); 3963 return blob; 3964} 3965 3966static void 3967qla2x00_release_firmware(void) 3968{ 3969 int idx; 3970 3971 mutex_lock(&qla_fw_lock); 3972 for (idx = 0; idx < FW_BLOBS; idx++) 3973 if (qla_fw_blobs[idx].fw) 3974 release_firmware(qla_fw_blobs[idx].fw); 3975 mutex_unlock(&qla_fw_lock); 3976} 3977 3978static pci_ers_result_t 3979qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 3980{ 3981 scsi_qla_host_t *vha = pci_get_drvdata(pdev); 3982 struct qla_hw_data *ha = vha->hw; 3983 3984 ql_dbg(ql_dbg_aer, vha, 0x9000, 3985 "PCI error detected, state %x.\n", state); 3986 3987 switch (state) { 3988 case pci_channel_io_normal: 3989 ha->flags.eeh_busy = 0; 3990 return PCI_ERS_RESULT_CAN_RECOVER; 3991 case pci_channel_io_frozen: 3992 ha->flags.eeh_busy = 1; 3993 /* For ISP82XX complete any pending mailbox cmd */ 3994 if (IS_QLA82XX(ha)) { 3995 ha->flags.isp82xx_fw_hung = 1; 3996 ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n"); 3997 qla82xx_clear_pending_mbx(vha); 3998 } 3999 qla2x00_free_irqs(vha); 4000 pci_disable_device(pdev); 4001 /* Return back all IOs */ 4002 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4003 return PCI_ERS_RESULT_NEED_RESET; 4004 case pci_channel_io_perm_failure: 4005 ha->flags.pci_channel_io_perm_failure = 1; 4006 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); 4007 return PCI_ERS_RESULT_DISCONNECT; 4008 } 4009 return PCI_ERS_RESULT_NEED_RESET; 4010} 4011 4012static pci_ers_result_t 4013qla2xxx_pci_mmio_enabled(struct pci_dev *pdev) 4014{ 4015 int risc_paused = 0; 4016 uint32_t stat; 4017 unsigned long flags; 4018 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 4019 struct qla_hw_data *ha = base_vha->hw; 4020 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4021 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; 4022 4023 if (IS_QLA82XX(ha)) 4024 return PCI_ERS_RESULT_RECOVERED; 4025 4026 spin_lock_irqsave(&ha->hardware_lock, flags); 4027 if (IS_QLA2100(ha) || IS_QLA2200(ha)){ 4028 stat = RD_REG_DWORD(®->hccr); 4029 if (stat & HCCR_RISC_PAUSE) 4030 risc_paused = 1; 4031 } else if (IS_QLA23XX(ha)) { 4032 stat = RD_REG_DWORD(®->u.isp2300.host_status); 4033 if (stat & HSR_RISC_PAUSED) 4034 risc_paused = 1; 4035 } else if (IS_FWI2_CAPABLE(ha)) { 4036 stat = RD_REG_DWORD(®24->host_status); 4037 if (stat & HSRX_RISC_PAUSED) 4038 risc_paused = 1; 4039 } 4040 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4041 4042 if (risc_paused) { 4043 ql_log(ql_log_info, base_vha, 0x9003, 4044 "RISC paused -- mmio_enabled, Dumping firmware.\n"); 4045 ha->isp_ops->fw_dump(base_vha, 0); 4046 4047 return PCI_ERS_RESULT_NEED_RESET; 4048 } else 4049 return PCI_ERS_RESULT_RECOVERED; 4050} 4051 4052uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha) 4053{ 4054 uint32_t rval = QLA_FUNCTION_FAILED; 4055 uint32_t drv_active = 0; 4056 struct qla_hw_data *ha = base_vha->hw; 4057 int fn; 4058 struct pci_dev *other_pdev = NULL; 4059 4060 ql_dbg(ql_dbg_aer, base_vha, 0x9006, 4061 "Entered %s.\n", __func__); 4062 4063 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4064 4065 if (base_vha->flags.online) { 4066 /* Abort all outstanding commands, 4067 * so as to be requeued later */ 4068 qla2x00_abort_isp_cleanup(base_vha); 4069 } 4070 4071 4072 fn = PCI_FUNC(ha->pdev->devfn); 4073 while (fn > 0) { 4074 fn--; 4075 ql_dbg(ql_dbg_aer, base_vha, 0x9007, 4076 "Finding pci device at function = 0x%x.\n", fn); 4077 other_pdev = 4078 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus), 4079 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn), 4080 fn)); 4081 4082 if (!other_pdev) 4083 continue; 4084 if (atomic_read(&other_pdev->enable_cnt)) { 4085 ql_dbg(ql_dbg_aer, base_vha, 0x9008, 4086 "Found PCI func available and enable at 0x%x.\n", 4087 fn); 4088 pci_dev_put(other_pdev); 4089 break; 4090 } 4091 pci_dev_put(other_pdev); 4092 } 4093 4094 if (!fn) { 4095 /* Reset owner */ 4096 ql_dbg(ql_dbg_aer, base_vha, 0x9009, 4097 "This devfn is reset owner = 0x%x.\n", 4098 ha->pdev->devfn); 4099 qla82xx_idc_lock(ha); 4100 4101 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 4102 QLA82XX_DEV_INITIALIZING); 4103 4104 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, 4105 QLA82XX_IDC_VERSION); 4106 4107 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); 4108 ql_dbg(ql_dbg_aer, base_vha, 0x900a, 4109 "drv_active = 0x%x.\n", drv_active); 4110 4111 qla82xx_idc_unlock(ha); 4112 /* Reset if device is not already reset 4113 * drv_active would be 0 if a reset has already been done 4114 */ 4115 if (drv_active) 4116 rval = qla82xx_start_firmware(base_vha); 4117 else 4118 rval = QLA_SUCCESS; 4119 qla82xx_idc_lock(ha); 4120 4121 if (rval != QLA_SUCCESS) { 4122 ql_log(ql_log_info, base_vha, 0x900b, 4123 "HW State: FAILED.\n"); 4124 qla82xx_clear_drv_active(ha); 4125 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 4126 QLA82XX_DEV_FAILED); 4127 } else { 4128 ql_log(ql_log_info, base_vha, 0x900c, 4129 "HW State: READY.\n"); 4130 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 4131 QLA82XX_DEV_READY); 4132 qla82xx_idc_unlock(ha); 4133 ha->flags.isp82xx_fw_hung = 0; 4134 rval = qla82xx_restart_isp(base_vha); 4135 qla82xx_idc_lock(ha); 4136 /* Clear driver state register */ 4137 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0); 4138 qla82xx_set_drv_active(base_vha); 4139 } 4140 qla82xx_idc_unlock(ha); 4141 } else { 4142 ql_dbg(ql_dbg_aer, base_vha, 0x900d, 4143 "This devfn is not reset owner = 0x%x.\n", 4144 ha->pdev->devfn); 4145 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == 4146 QLA82XX_DEV_READY)) { 4147 ha->flags.isp82xx_fw_hung = 0; 4148 rval = qla82xx_restart_isp(base_vha); 4149 qla82xx_idc_lock(ha); 4150 qla82xx_set_drv_active(base_vha); 4151 qla82xx_idc_unlock(ha); 4152 } 4153 } 4154 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4155 4156 return rval; 4157} 4158 4159static pci_ers_result_t 4160qla2xxx_pci_slot_reset(struct pci_dev *pdev) 4161{ 4162 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT; 4163 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 4164 struct qla_hw_data *ha = base_vha->hw; 4165 struct rsp_que *rsp; 4166 int rc, retries = 10; 4167 4168 ql_dbg(ql_dbg_aer, base_vha, 0x9004, 4169 "Slot Reset.\n"); 4170 4171 /* Workaround: qla2xxx driver which access hardware earlier 4172 * needs error state to be pci_channel_io_online. 4173 * Otherwise mailbox command timesout. 4174 */ 4175 pdev->error_state = pci_channel_io_normal; 4176 4177 pci_restore_state(pdev); 4178 4179 /* pci_restore_state() clears the saved_state flag of the device 4180 * save restored state which resets saved_state flag 4181 */ 4182 pci_save_state(pdev); 4183 4184 if (ha->mem_only) 4185 rc = pci_enable_device_mem(pdev); 4186 else 4187 rc = pci_enable_device(pdev); 4188 4189 if (rc) { 4190 ql_log(ql_log_warn, base_vha, 0x9005, 4191 "Can't re-enable PCI device after reset.\n"); 4192 goto exit_slot_reset; 4193 } 4194 4195 rsp = ha->rsp_q_map[0]; 4196 if (qla2x00_request_irqs(ha, rsp)) 4197 goto exit_slot_reset; 4198 4199 if (ha->isp_ops->pci_config(base_vha)) 4200 goto exit_slot_reset; 4201 4202 if (IS_QLA82XX(ha)) { 4203 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) { 4204 ret = PCI_ERS_RESULT_RECOVERED; 4205 goto exit_slot_reset; 4206 } else 4207 goto exit_slot_reset; 4208 } 4209 4210 while (ha->flags.mbox_busy && retries--) 4211 msleep(1000); 4212 4213 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4214 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS) 4215 ret = PCI_ERS_RESULT_RECOVERED; 4216 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4217 4218 4219exit_slot_reset: 4220 ql_dbg(ql_dbg_aer, base_vha, 0x900e, 4221 "slot_reset return %x.\n", ret); 4222 4223 return ret; 4224} 4225 4226static void 4227qla2xxx_pci_resume(struct pci_dev *pdev) 4228{ 4229 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 4230 struct qla_hw_data *ha = base_vha->hw; 4231 int ret; 4232 4233 ql_dbg(ql_dbg_aer, base_vha, 0x900f, 4234 "pci_resume.\n"); 4235 4236 ret = qla2x00_wait_for_hba_online(base_vha); 4237 if (ret != QLA_SUCCESS) { 4238 ql_log(ql_log_fatal, base_vha, 0x9002, 4239 "The device failed to resume I/O from slot/link_reset.\n"); 4240 } 4241 4242 pci_cleanup_aer_uncorrect_error_status(pdev); 4243 4244 ha->flags.eeh_busy = 0; 4245} 4246 4247static struct pci_error_handlers qla2xxx_err_handler = { 4248 .error_detected = qla2xxx_pci_error_detected, 4249 .mmio_enabled = qla2xxx_pci_mmio_enabled, 4250 .slot_reset = qla2xxx_pci_slot_reset, 4251 .resume = qla2xxx_pci_resume, 4252}; 4253 4254static struct pci_device_id qla2xxx_pci_tbl[] = { 4255 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) }, 4256 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) }, 4257 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) }, 4258 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) }, 4259 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) }, 4260 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) }, 4261 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) }, 4262 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) }, 4263 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) }, 4264 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) }, 4265 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, 4266 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, 4267 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, 4268 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) }, 4269 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) }, 4270 { 0 }, 4271}; 4272MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl); 4273 4274static struct pci_driver qla2xxx_pci_driver = { 4275 .name = QLA2XXX_DRIVER_NAME, 4276 .driver = { 4277 .owner = THIS_MODULE, 4278 }, 4279 .id_table = qla2xxx_pci_tbl, 4280 .probe = qla2x00_probe_one, 4281 .remove = qla2x00_remove_one, 4282 .shutdown = qla2x00_shutdown, 4283 .err_handler = &qla2xxx_err_handler, 4284}; 4285 4286static struct file_operations apidev_fops = { 4287 .owner = THIS_MODULE, 4288 .llseek = noop_llseek, 4289}; 4290 4291/** 4292 * qla2x00_module_init - Module initialization. 4293 **/ 4294static int __init 4295qla2x00_module_init(void) 4296{ 4297 int ret = 0; 4298 4299 /* Allocate cache for SRBs. */ 4300 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0, 4301 SLAB_HWCACHE_ALIGN, NULL); 4302 if (srb_cachep == NULL) { 4303 ql_log(ql_log_fatal, NULL, 0x0001, 4304 "Unable to allocate SRB cache...Failing load!.\n"); 4305 return -ENOMEM; 4306 } 4307 4308 /* Derive version string. */ 4309 strcpy(qla2x00_version_str, QLA2XXX_VERSION); 4310 if (ql2xextended_error_logging) 4311 strcat(qla2x00_version_str, "-debug"); 4312 4313 qla2xxx_transport_template = 4314 fc_attach_transport(&qla2xxx_transport_functions); 4315 if (!qla2xxx_transport_template) { 4316 kmem_cache_destroy(srb_cachep); 4317 ql_log(ql_log_fatal, NULL, 0x0002, 4318 "fc_attach_transport failed...Failing load!.\n"); 4319 return -ENODEV; 4320 } 4321 4322 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops); 4323 if (apidev_major < 0) { 4324 ql_log(ql_log_fatal, NULL, 0x0003, 4325 "Unable to register char device %s.\n", QLA2XXX_APIDEV); 4326 } 4327 4328 qla2xxx_transport_vport_template = 4329 fc_attach_transport(&qla2xxx_transport_vport_functions); 4330 if (!qla2xxx_transport_vport_template) { 4331 kmem_cache_destroy(srb_cachep); 4332 fc_release_transport(qla2xxx_transport_template); 4333 ql_log(ql_log_fatal, NULL, 0x0004, 4334 "fc_attach_transport vport failed...Failing load!.\n"); 4335 return -ENODEV; 4336 } 4337 ql_log(ql_log_info, NULL, 0x0005, 4338 "QLogic Fibre Channel HBA Driver: %s.\n", 4339 qla2x00_version_str); 4340 ret = pci_register_driver(&qla2xxx_pci_driver); 4341 if (ret) { 4342 kmem_cache_destroy(srb_cachep); 4343 fc_release_transport(qla2xxx_transport_template); 4344 fc_release_transport(qla2xxx_transport_vport_template); 4345 ql_log(ql_log_fatal, NULL, 0x0006, 4346 "pci_register_driver failed...ret=%d Failing load!.\n", 4347 ret); 4348 } 4349 return ret; 4350} 4351 4352/** 4353 * qla2x00_module_exit - Module cleanup. 4354 **/ 4355static void __exit 4356qla2x00_module_exit(void) 4357{ 4358 unregister_chrdev(apidev_major, QLA2XXX_APIDEV); 4359 pci_unregister_driver(&qla2xxx_pci_driver); 4360 qla2x00_release_firmware(); 4361 kmem_cache_destroy(srb_cachep); 4362 if (ctx_cachep) 4363 kmem_cache_destroy(ctx_cachep); 4364 fc_release_transport(qla2xxx_transport_template); 4365 fc_release_transport(qla2xxx_transport_vport_template); 4366} 4367 4368module_init(qla2x00_module_init); 4369module_exit(qla2x00_module_exit); 4370 4371MODULE_AUTHOR("QLogic Corporation"); 4372MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver"); 4373MODULE_LICENSE("GPL"); 4374MODULE_VERSION(QLA2XXX_VERSION); 4375MODULE_FIRMWARE(FW_FILE_ISP21XX); 4376MODULE_FIRMWARE(FW_FILE_ISP22XX); 4377MODULE_FIRMWARE(FW_FILE_ISP2300); 4378MODULE_FIRMWARE(FW_FILE_ISP2322); 4379MODULE_FIRMWARE(FW_FILE_ISP24XX); 4380MODULE_FIRMWARE(FW_FILE_ISP25XX); 4381