1/* 2 * altera_uart.c -- Altera UART driver 3 * 4 * Based on mcf.c -- Freescale ColdFire UART driver 5 * 6 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com> 7 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw> 8 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16#include <linux/kernel.h> 17#include <linux/init.h> 18#include <linux/timer.h> 19#include <linux/interrupt.h> 20#include <linux/module.h> 21#include <linux/console.h> 22#include <linux/tty.h> 23#include <linux/tty_flip.h> 24#include <linux/serial.h> 25#include <linux/serial_core.h> 26#include <linux/platform_device.h> 27#include <linux/of.h> 28#include <linux/io.h> 29#include <linux/altera_uart.h> 30 31#define DRV_NAME "altera_uart" 32#define SERIAL_ALTERA_MAJOR 204 33#define SERIAL_ALTERA_MINOR 213 34 35/* 36 * Altera UART register definitions according to the Nios UART datasheet: 37 * http://www.altera.com/literature/ds/ds_nios_uart.pdf 38 */ 39 40#define ALTERA_UART_SIZE 32 41 42#define ALTERA_UART_RXDATA_REG 0 43#define ALTERA_UART_TXDATA_REG 4 44#define ALTERA_UART_STATUS_REG 8 45#define ALTERA_UART_CONTROL_REG 12 46#define ALTERA_UART_DIVISOR_REG 16 47#define ALTERA_UART_EOP_REG 20 48 49#define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */ 50#define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */ 51#define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */ 52#define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */ 53#define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */ 54#define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */ 55#define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */ 56#define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */ 57#define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */ 58#define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */ 59#define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */ 60#define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */ 61 62 /* Enable interrupt on... */ 63#define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */ 64#define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */ 65#define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */ 66#define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */ 67#define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */ 68#define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */ 69#define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */ 70#define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */ 71#define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/ 72 73#define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */ 74#define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */ 75#define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */ 76#define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */ 77 78/* 79 * Local per-uart structure. 80 */ 81struct altera_uart { 82 struct uart_port port; 83 struct timer_list tmr; 84 unsigned int sigs; /* Local copy of line sigs */ 85 unsigned short imr; /* Local IMR mirror */ 86}; 87 88static u32 altera_uart_readl(struct uart_port *port, int reg) 89{ 90 return readl(port->membase + (reg << port->regshift)); 91} 92 93static void altera_uart_writel(struct uart_port *port, u32 dat, int reg) 94{ 95 writel(dat, port->membase + (reg << port->regshift)); 96} 97 98static unsigned int altera_uart_tx_empty(struct uart_port *port) 99{ 100 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 101 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0; 102} 103 104static unsigned int altera_uart_get_mctrl(struct uart_port *port) 105{ 106 struct altera_uart *pp = container_of(port, struct altera_uart, port); 107 unsigned int sigs; 108 109 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 110 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0; 111 sigs |= (pp->sigs & TIOCM_RTS); 112 113 return sigs; 114} 115 116static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs) 117{ 118 struct altera_uart *pp = container_of(port, struct altera_uart, port); 119 120 pp->sigs = sigs; 121 if (sigs & TIOCM_RTS) 122 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; 123 else 124 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; 125 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 126} 127 128static void altera_uart_start_tx(struct uart_port *port) 129{ 130 struct altera_uart *pp = container_of(port, struct altera_uart, port); 131 132 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK; 133 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 134} 135 136static void altera_uart_stop_tx(struct uart_port *port) 137{ 138 struct altera_uart *pp = container_of(port, struct altera_uart, port); 139 140 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; 141 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 142} 143 144static void altera_uart_stop_rx(struct uart_port *port) 145{ 146 struct altera_uart *pp = container_of(port, struct altera_uart, port); 147 148 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK; 149 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 150} 151 152static void altera_uart_break_ctl(struct uart_port *port, int break_state) 153{ 154 struct altera_uart *pp = container_of(port, struct altera_uart, port); 155 unsigned long flags; 156 157 spin_lock_irqsave(&port->lock, flags); 158 if (break_state == -1) 159 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK; 160 else 161 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK; 162 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 163 spin_unlock_irqrestore(&port->lock, flags); 164} 165 166static void altera_uart_enable_ms(struct uart_port *port) 167{ 168} 169 170static void altera_uart_set_termios(struct uart_port *port, 171 struct ktermios *termios, 172 struct ktermios *old) 173{ 174 unsigned long flags; 175 unsigned int baud, baudclk; 176 177 baud = uart_get_baud_rate(port, termios, old, 0, 4000000); 178 baudclk = port->uartclk / baud; 179 180 if (old) 181 tty_termios_copy_hw(termios, old); 182 tty_termios_encode_baud_rate(termios, baud, baud); 183 184 spin_lock_irqsave(&port->lock, flags); 185 uart_update_timeout(port, termios->c_cflag, baud); 186 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); 187 spin_unlock_irqrestore(&port->lock, flags); 188} 189 190static void altera_uart_rx_chars(struct altera_uart *pp) 191{ 192 struct uart_port *port = &pp->port; 193 unsigned char ch, flag; 194 unsigned short status; 195 196 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) & 197 ALTERA_UART_STATUS_RRDY_MSK) { 198 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG); 199 flag = TTY_NORMAL; 200 port->icount.rx++; 201 202 if (status & ALTERA_UART_STATUS_E_MSK) { 203 altera_uart_writel(port, status, 204 ALTERA_UART_STATUS_REG); 205 206 if (status & ALTERA_UART_STATUS_BRK_MSK) { 207 port->icount.brk++; 208 if (uart_handle_break(port)) 209 continue; 210 } else if (status & ALTERA_UART_STATUS_PE_MSK) { 211 port->icount.parity++; 212 } else if (status & ALTERA_UART_STATUS_ROE_MSK) { 213 port->icount.overrun++; 214 } else if (status & ALTERA_UART_STATUS_FE_MSK) { 215 port->icount.frame++; 216 } 217 218 status &= port->read_status_mask; 219 220 if (status & ALTERA_UART_STATUS_BRK_MSK) 221 flag = TTY_BREAK; 222 else if (status & ALTERA_UART_STATUS_PE_MSK) 223 flag = TTY_PARITY; 224 else if (status & ALTERA_UART_STATUS_FE_MSK) 225 flag = TTY_FRAME; 226 } 227 228 if (uart_handle_sysrq_char(port, ch)) 229 continue; 230 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch, 231 flag); 232 } 233 234 tty_flip_buffer_push(port->state->port.tty); 235} 236 237static void altera_uart_tx_chars(struct altera_uart *pp) 238{ 239 struct uart_port *port = &pp->port; 240 struct circ_buf *xmit = &port->state->xmit; 241 242 if (port->x_char) { 243 /* Send special char - probably flow control */ 244 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG); 245 port->x_char = 0; 246 port->icount.tx++; 247 return; 248 } 249 250 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 251 ALTERA_UART_STATUS_TRDY_MSK) { 252 if (xmit->head == xmit->tail) 253 break; 254 altera_uart_writel(port, xmit->buf[xmit->tail], 255 ALTERA_UART_TXDATA_REG); 256 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 257 port->icount.tx++; 258 } 259 260 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 261 uart_write_wakeup(port); 262 263 if (xmit->head == xmit->tail) { 264 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; 265 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); 266 } 267} 268 269static irqreturn_t altera_uart_interrupt(int irq, void *data) 270{ 271 struct uart_port *port = data; 272 struct altera_uart *pp = container_of(port, struct altera_uart, port); 273 unsigned int isr; 274 275 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr; 276 277 spin_lock(&port->lock); 278 if (isr & ALTERA_UART_STATUS_RRDY_MSK) 279 altera_uart_rx_chars(pp); 280 if (isr & ALTERA_UART_STATUS_TRDY_MSK) 281 altera_uart_tx_chars(pp); 282 spin_unlock(&port->lock); 283 284 return IRQ_RETVAL(isr); 285} 286 287static void altera_uart_timer(unsigned long data) 288{ 289 struct uart_port *port = (void *)data; 290 struct altera_uart *pp = container_of(port, struct altera_uart, port); 291 292 altera_uart_interrupt(0, port); 293 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); 294} 295 296static void altera_uart_config_port(struct uart_port *port, int flags) 297{ 298 port->type = PORT_ALTERA_UART; 299 300 /* Clear mask, so no surprise interrupts. */ 301 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG); 302 /* Clear status register */ 303 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG); 304} 305 306static int altera_uart_startup(struct uart_port *port) 307{ 308 struct altera_uart *pp = container_of(port, struct altera_uart, port); 309 unsigned long flags; 310 int ret; 311 312 if (!port->irq) { 313 setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port); 314 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); 315 return 0; 316 } 317 318 ret = request_irq(port->irq, altera_uart_interrupt, 0, 319 DRV_NAME, port); 320 if (ret) { 321 pr_err(DRV_NAME ": unable to attach Altera UART %d " 322 "interrupt vector=%d\n", port->line, port->irq); 323 return ret; 324 } 325 326 spin_lock_irqsave(&port->lock, flags); 327 328 /* Enable RX interrupts now */ 329 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK; 330 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); 331 332 spin_unlock_irqrestore(&port->lock, flags); 333 334 return 0; 335} 336 337static void altera_uart_shutdown(struct uart_port *port) 338{ 339 struct altera_uart *pp = container_of(port, struct altera_uart, port); 340 unsigned long flags; 341 342 spin_lock_irqsave(&port->lock, flags); 343 344 /* Disable all interrupts now */ 345 pp->imr = 0; 346 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG); 347 348 spin_unlock_irqrestore(&port->lock, flags); 349 350 if (port->irq) 351 free_irq(port->irq, port); 352 else 353 del_timer_sync(&pp->tmr); 354} 355 356static const char *altera_uart_type(struct uart_port *port) 357{ 358 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL; 359} 360 361static int altera_uart_request_port(struct uart_port *port) 362{ 363 /* UARTs always present */ 364 return 0; 365} 366 367static void altera_uart_release_port(struct uart_port *port) 368{ 369 /* Nothing to release... */ 370} 371 372static int altera_uart_verify_port(struct uart_port *port, 373 struct serial_struct *ser) 374{ 375 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART)) 376 return -EINVAL; 377 return 0; 378} 379 380/* 381 * Define the basic serial functions we support. 382 */ 383static struct uart_ops altera_uart_ops = { 384 .tx_empty = altera_uart_tx_empty, 385 .get_mctrl = altera_uart_get_mctrl, 386 .set_mctrl = altera_uart_set_mctrl, 387 .start_tx = altera_uart_start_tx, 388 .stop_tx = altera_uart_stop_tx, 389 .stop_rx = altera_uart_stop_rx, 390 .enable_ms = altera_uart_enable_ms, 391 .break_ctl = altera_uart_break_ctl, 392 .startup = altera_uart_startup, 393 .shutdown = altera_uart_shutdown, 394 .set_termios = altera_uart_set_termios, 395 .type = altera_uart_type, 396 .request_port = altera_uart_request_port, 397 .release_port = altera_uart_release_port, 398 .config_port = altera_uart_config_port, 399 .verify_port = altera_uart_verify_port, 400}; 401 402static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS]; 403 404#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) 405 406int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp) 407{ 408 struct uart_port *port; 409 int i; 410 411 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) { 412 port = &altera_uart_ports[i].port; 413 414 port->line = i; 415 port->type = PORT_ALTERA_UART; 416 port->mapbase = platp[i].mapbase; 417 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE); 418 port->iotype = SERIAL_IO_MEM; 419 port->irq = platp[i].irq; 420 port->uartclk = platp[i].uartclk; 421 port->flags = UPF_BOOT_AUTOCONF; 422 port->ops = &altera_uart_ops; 423 port->private_data = platp; 424 } 425 426 return 0; 427} 428 429static void altera_uart_console_putc(struct uart_port *port, const char c) 430{ 431 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & 432 ALTERA_UART_STATUS_TRDY_MSK)) 433 cpu_relax(); 434 435 writel(c, port->membase + ALTERA_UART_TXDATA_REG); 436} 437 438static void altera_uart_console_write(struct console *co, const char *s, 439 unsigned int count) 440{ 441 struct uart_port *port = &(altera_uart_ports + co->index)->port; 442 443 for (; count; count--, s++) { 444 altera_uart_console_putc(port, *s); 445 if (*s == '\n') 446 altera_uart_console_putc(port, '\r'); 447 } 448} 449 450static int __init altera_uart_console_setup(struct console *co, char *options) 451{ 452 struct uart_port *port; 453 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE; 454 int bits = 8; 455 int parity = 'n'; 456 int flow = 'n'; 457 458 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) 459 return -EINVAL; 460 port = &altera_uart_ports[co->index].port; 461 if (!port->membase) 462 return -ENODEV; 463 464 if (options) 465 uart_parse_options(options, &baud, &parity, &bits, &flow); 466 467 return uart_set_options(port, co, baud, parity, bits, flow); 468} 469 470static struct uart_driver altera_uart_driver; 471 472static struct console altera_uart_console = { 473 .name = "ttyAL", 474 .write = altera_uart_console_write, 475 .device = uart_console_device, 476 .setup = altera_uart_console_setup, 477 .flags = CON_PRINTBUFFER, 478 .index = -1, 479 .data = &altera_uart_driver, 480}; 481 482static int __init altera_uart_console_init(void) 483{ 484 register_console(&altera_uart_console); 485 return 0; 486} 487 488console_initcall(altera_uart_console_init); 489 490#define ALTERA_UART_CONSOLE (&altera_uart_console) 491 492#else 493 494#define ALTERA_UART_CONSOLE NULL 495 496#endif /* CONFIG_ALTERA_UART_CONSOLE */ 497 498/* 499 * Define the altera_uart UART driver structure. 500 */ 501static struct uart_driver altera_uart_driver = { 502 .owner = THIS_MODULE, 503 .driver_name = DRV_NAME, 504 .dev_name = "ttyAL", 505 .major = SERIAL_ALTERA_MAJOR, 506 .minor = SERIAL_ALTERA_MINOR, 507 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS, 508 .cons = ALTERA_UART_CONSOLE, 509}; 510 511#ifdef CONFIG_OF 512static int altera_uart_get_of_uartclk(struct platform_device *pdev, 513 struct uart_port *port) 514{ 515 int len; 516 const __be32 *clk; 517 518 clk = of_get_property(pdev->dev.of_node, "clock-frequency", &len); 519 if (!clk || len < sizeof(__be32)) 520 return -ENODEV; 521 522 port->uartclk = be32_to_cpup(clk); 523 524 return 0; 525} 526#else 527static int altera_uart_get_of_uartclk(struct platform_device *pdev, 528 struct uart_port *port) 529{ 530 return -ENODEV; 531} 532#endif /* CONFIG_OF */ 533 534static int __devinit altera_uart_probe(struct platform_device *pdev) 535{ 536 struct altera_uart_platform_uart *platp = pdev->dev.platform_data; 537 struct uart_port *port; 538 struct resource *res_mem; 539 struct resource *res_irq; 540 int i = pdev->id; 541 int ret; 542 543 /* if id is -1 scan for a free id and use that one */ 544 if (i == -1) { 545 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++) 546 if (altera_uart_ports[i].port.mapbase == 0) 547 break; 548 } 549 550 if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) 551 return -EINVAL; 552 553 port = &altera_uart_ports[i].port; 554 555 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 556 if (res_mem) 557 port->mapbase = res_mem->start; 558 else if (platp->mapbase) 559 port->mapbase = platp->mapbase; 560 else 561 return -EINVAL; 562 563 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 564 if (res_irq) 565 port->irq = res_irq->start; 566 else if (platp->irq) 567 port->irq = platp->irq; 568 569 /* Check platform data first so we can override device node data */ 570 if (platp) 571 port->uartclk = platp->uartclk; 572 else { 573 ret = altera_uart_get_of_uartclk(pdev, port); 574 if (ret) 575 return ret; 576 } 577 578 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE); 579 if (!port->membase) 580 return -ENOMEM; 581 582 if (platp) 583 port->regshift = platp->bus_shift; 584 else 585 port->regshift = 0; 586 587 port->line = i; 588 port->type = PORT_ALTERA_UART; 589 port->iotype = SERIAL_IO_MEM; 590 port->ops = &altera_uart_ops; 591 port->flags = UPF_BOOT_AUTOCONF; 592 593 dev_set_drvdata(&pdev->dev, port); 594 595 uart_add_one_port(&altera_uart_driver, port); 596 597 return 0; 598} 599 600static int __devexit altera_uart_remove(struct platform_device *pdev) 601{ 602 struct uart_port *port = dev_get_drvdata(&pdev->dev); 603 604 if (port) { 605 uart_remove_one_port(&altera_uart_driver, port); 606 dev_set_drvdata(&pdev->dev, NULL); 607 port->mapbase = 0; 608 } 609 610 return 0; 611} 612 613#ifdef CONFIG_OF 614static struct of_device_id altera_uart_match[] = { 615 { .compatible = "ALTR,uart-1.0", }, 616 {}, 617}; 618MODULE_DEVICE_TABLE(of, altera_uart_match); 619#endif /* CONFIG_OF */ 620 621static struct platform_driver altera_uart_platform_driver = { 622 .probe = altera_uart_probe, 623 .remove = __devexit_p(altera_uart_remove), 624 .driver = { 625 .name = DRV_NAME, 626 .owner = THIS_MODULE, 627 .of_match_table = of_match_ptr(altera_uart_match), 628 }, 629}; 630 631static int __init altera_uart_init(void) 632{ 633 int rc; 634 635 rc = uart_register_driver(&altera_uart_driver); 636 if (rc) 637 return rc; 638 rc = platform_driver_register(&altera_uart_platform_driver); 639 if (rc) { 640 uart_unregister_driver(&altera_uart_driver); 641 return rc; 642 } 643 return 0; 644} 645 646static void __exit altera_uart_exit(void) 647{ 648 platform_driver_unregister(&altera_uart_platform_driver); 649 uart_unregister_driver(&altera_uart_driver); 650} 651 652module_init(altera_uart_init); 653module_exit(altera_uart_exit); 654 655MODULE_DESCRIPTION("Altera UART driver"); 656MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); 657MODULE_LICENSE("GPL"); 658MODULE_ALIAS("platform:" DRV_NAME); 659MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR); 660