| 9f97da78bf018206fb623cd351d454af2f105fe0 |
|
28-Mar-2012 |
David Howells <dhowells@redhat.com> |
Disintegrate asm/system.h for ARM
Disintegrate asm/system.h for ARM.
Signed-off-by: David Howells <dhowells@redhat.com>
cc: Russell King <linux@arm.linux.org.uk>
cc: linux-arm-kernel@lists.infradead.org
|
| 62c5553ab7ecf23e7b5464a59d728ab94479adbb |
|
21-Nov-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5
make the ECHI depends on ARCH_AT91
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
|
| 6a0624599085e9e0c7b984c28443531849ab0459 |
|
20-Nov-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
|
| 3a61a5dae49bf3d1afb7f75c8acb3607f26565af |
|
19-Jan-2012 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: at91/tc: add device tree support to atmel_tclib
Device tree support added to atmel_tclib: the generic Timer Counter
library. This is used by the clocksource/clockevent driver tcb_clksrc.
The current DT enabled platforms are also modified to use it:
- .dtsi files are modified to add Timer Counter Block entries
- alias are created to allow identification of each block
- clkdev lookup tables are added for clocks identification.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
|
| f363c407b42c467d06675c852e55f26adb959915 |
|
12-Feb-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make sdram/ddr register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| 4342d6479e249c0cc952ff71f22167e4276a4927 |
|
27-Nov-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make matrix register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
Cc: linux-usb@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| 0d78171672a30e8ec8084f54a557e9948260356d |
|
05-Feb-2012 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: factorise duplicated at91sam9 idle
Remove duplicated at91sam9xxxx_idle() functions introduced
by commit c9dfafb "ARM: mach-at91: move special idle code out of line".
Replace by a generic at91sam9_idle() function in setup.c common
location.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| c9dfafbaca0b66a6665242d019b3b9c5be056fcf |
|
02-Aug-2011 |
Nicolas Pitre <nicolas.pitre@linaro.org> |
ARM: mach-at91: move special idle code out of line
... and hook it to arm_pm_idle.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
|
| 14f991a730f453a1c8f114ccb686f83e158fdd92 |
|
17-Nov-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: Fix at91sam9g45 and at91cap9 reset
As on the other sam9 we need to cleanly shutdown the DDRAM before rebooting.
On those SoC the SDRAM/DDRAM controller is different. So, the assembly code
ends up being not cleanly combined with previous at91sam9_alt_restart function.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| e9f68b5cc6160a473fc668054fd13f435fd4508b |
|
17-Nov-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make rstc soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| 1b2073e7789429e6554e69b307d857d8f46a2e22 |
|
03-Nov-2011 |
Russell King <rmk+kernel@arm.linux.org.uk> |
ARM: restart: at91: use new restart hook
Rather than using a private function pointer, use the existing
arm_pm_restart function pointer instead. We no longer need to enable
the I-cache in at91sam9_alt_reset() as the caches will now be on when
this function is called.
Update the function names to use the 'restart' terminology rather than
the 'reboot' terminology.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| 1a2d9156b5fc92b40aa2ffbc2fdf6d88bbf74f3a |
|
17-Oct-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: gpio make struct at91_gpio_bank an initdata
this will simplify the switch to the DT and later to the platform_device
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| 619d4a4b40f44c1b45263a0e0c9598e3139a1fec |
|
13-Nov-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: switch gpio clock to clkdev
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| f22deee523e0ff49c3be01dd6f979d374230725a |
|
31-Oct-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make shutdown controler soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| faee0cc33c3df3b63314926eecef77d384ae9cd4 |
|
13-Oct-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make smc register base soc independent
now sam9_smc_configure will take as first parameter is the SMC id
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| 4ab0c5998d327cba5b7e0dc8ce67f45859997669 |
|
18-Sep-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make pit register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| cfa5a1fe7e65bacdee59d5df60a9f44b0c030532 |
|
13-Oct-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: add ioremap_registers entry point to soc setup
this will allow to ioremap the register of the PIT, PMC and others
and make the code soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| 80e91cb8023fbc07b2410c4ce5a2da12fbcebca4 |
|
16-Sep-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
ARM: at91: make gpio register base soc independant
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
|
| 865d605ee81813dc73d5422fd2f9bd132d10d194 |
|
09-Aug-2011 |
Jamie Iles <jamie@jamieiles.com> |
at91: provide macb clks with "pclk" and "hclk" name
The macb driver expects clocks with the names "pclk" and "hclk". We
currently provide "macb_clk" but to fit in line with other
architectures (namely AVR32), provide "pclk" and a fake "hclk".
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| 49fe2ba3138ca60422fd90ed76c1918be1c30fc0 |
|
10-Oct-2011 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: at91: dt: at91sam9g45 family and board device tree files
Create a new device tree source file for Atmel at91sam9g45 SoC family.
The Evaluation Kit at91sam9m10g45ek includes it.
This first basic support will be populated as drivers and boards will be
converted to device tree.
Contains serial, dma and interrupt controllers.
The generic board file still takes advantage of platform data for early serial
init. As we need a storage media and the NAND flash driver is not converted to
DT yet, we keep old initialization for it.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
|
| 237a62a1436eca94497476a9138baf795c16c97c |
|
06-Oct-2011 |
Peter Korsgaard <jacmet@sunsite.dk> |
ARM: at91: at91sam9g45: add trng clock and platform device
For the new hw_random driver.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| 0af4316babb64c6703c113a89462ff7843767f24 |
|
30-Aug-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: ohci-at91: always provide all the clocks
Remove the cpu_is_at91xxxx() macros in the ohci-at91 driver.
SoCs at91sam9261 and at91sam9g10 expect one additional clock: hck0.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| f407c2e38e5f07d2e8f573fc55a5d996568f6e50 |
|
04-Aug-2011 |
Jon Medhurst <tixy@yxit.co.uk> |
ARM: mach-at91: Setup consistent dma size at boot time
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Ferre<nicolas.ferre@atmel.com>
|
| f0051d82a68abcf35418d49db1c82e6f0e514d78 |
|
09-May-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: factorize sram init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
|
| 51ddec7617bd0d4c73c44a8862faac5d7d97eb03 |
|
24-Apr-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: move register clocks to soc generic init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
|
| 465393749da3a3229f6067246c7e8f97f7cc833d |
|
24-Apr-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: move clock subsystem init to soc generic init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
|
| 8c3583b634d5705d8f604c0d9392bc273d19c256 |
|
23-Apr-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: use structure to store the current soc
instead of reading the registers everytime
the current implementation respect the following constrain:
- allow 1 to n soc to be enabled
- allow to have a virtual cpu type and subtype
- always detect the cpu type and subtype and report it
- detect if the soc support is enabled
- prepare for sysfs export support
- drop soc specific code via compiler when the soc not enabled
(via cpu_is_xxx)
Today if we read the exid we will have the same value for 9g35 and 9m11
and we will need to check the cidr too
with the new implementation we just need to check the soc subtype
this will also allow to have specific virtual subtype for rm9200 which the
board will have to specify via at91rm9200_set_type(int) as we have no way to
detect it.
this implementation is inspired by the SH cpu detection support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
|
| 92100c12ca1bc5f347ff41c1413f9db07c4d276c |
|
23-Apr-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: factorize at91 interrupts init to soc
they are the same except the default priority
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
|
| 21d08b9d5536ac418bbce4f419fe2b528b7ddf31 |
|
23-Apr-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: introduce commom AT91_BASE_SYS
On all at91 except rm9200 and x40 have the System Controller starts
at address 0xffffc000 and has a size of 16KiB.
On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
at 0xfffff000
This patch removes the individual definitions of AT91_BASE_SYS and
replaces them with a common version at base 0xfffffc000 and size 16KiB
and map the same memory space
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
|
| 9d87159e571d73ccf87adf1ee3691b861253d900 |
|
21-Jun-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: fix udc, ehci and mmc clock device name for cap9/9g45/9rl
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| bd60299594fb1d28ae66563c9e76a0b89b0412cf |
|
02-Feb-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: switch to CLKDEV_LOOKUP
we do not change the clock naming convention so does not need to switch
the AVR32 yet
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
|
| 1b021a3b23a40be89c4f3fbe6f4696aa15141f26 |
|
28-Apr-2011 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
at91: fix map_io init usage
switch early init to init_early and introduce soc map_io
with this Patch we will not do any more early device setup during the map io
tks to Russell to point the new call back
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Andrew Victor <linux@maxim.org.za>
|
| ab64511cbbd03196d84bcc32c6e7b9d46543df7b |
|
03-Sep-2010 |
Fabian Godehardt <fg@emlix.com> |
AT91: SAM9G45 - add a separate clock entry for every single TC block
Without this patch you will not be able to register the first block
because of the second association call on at91_add_device_tc().
Signed-off-by: Fabian Godehardt <fg@emlix.com>
[nicolas.ferre@atmel.com: change tcb1_clk to fake child clock of tcb0_clk]
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
|
| 5f9f0a412f16b2b849624f1b760477fb35ceff4a |
|
11-Jun-2010 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
ARM: 6169/1: AT91: add new at91 chips in at91sam9g45 family
This is the basic support for at91sam9g46, at91sam9m10 and at91sam9m11. Those
are just very basic cpu macros and clock definition.
Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
| 789b23bc40a67d9a19bedc2655c6bcab79bcabd8 |
|
26-Jun-2009 |
Nicolas Ferre <nicolas.ferre@atmel.com> |
[ARM] 5572/1: at91: Support for at91sam9g45 series: core chip & board support
Here are the at91 specific files dedicated to the at91sam9g45 series. They
mimic the traditional at91 way of managing chips & boards.
The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES. In
the future, the main board for this 9g45 series will be the
AT91SAM9M10G45-EK (I choose this last name for the board file).
Simple drivers are enabled in _devices and board- files. Newer peripheral
support will be added in future patches.
Incuded peripherals support (for now):
- USART
- SPI
- Ethernet
- NAND flash
- LCD
- gpio/joystick/buttons
- leds and pwm
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|