| 1a4baafa7d203da1cceb302c2df38f0fea1c17a1 |
|
15-Nov-2011 |
Will Deacon <will.deacon@arm.com> |
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
The CPU reset functions disable the MMU and therefore must be executed
with an identity mapping in place.
This patch places the CPU reset functions into the .idmap.text section,
causing the idmap code to include them as part of the identity mapping.
Acked-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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| b4a19f03c4d73c3aa5e08ce8fd3c78426c766ea7 |
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23-Jun-2011 |
Dave Martin <dave.martin@linaro.org> |
ARM: mm: proc-arm9tdmi: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
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| 9a819d8ac8197b44bbc2adad592b677fe749804d |
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31-May-2011 |
Ben Hutchings <ben@decadent.org.uk> |
ARM: 6948/1: Fix .size directives for __arm{7,9}tdmi_proc_info
gas used to accept (and ignore?) .size directives which referred to
undefined symbols, as these do. In binutils 2.21 these are treated
as fatal errors.
The issue in proc-arm7tdmi.S was also fixed independently by Peter
Chubb.
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| f6b0fa02e8b0708d17d631afce456524eadf87ff |
|
06-Feb-2011 |
Russell King <rmk+kernel@arm.linux.org.uk> |
ARM: pm: add generic CPU suspend/resume support
This adds core support for saving and restoring CPU coprocessor
registers for suspend/resume support. This contains support for suspend
with ARM920, ARM926, SA11x0, PXA25x, PXA27x, PXA3xx, V6 and V7 CPUs.
Tested on Assabet and Tegra 2.
Tested-by: Colin Cross <ccross@android.com>
Tested-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 5085f3ff458521045f7e43da62b8c30ea7df2e82 |
|
01-Oct-2010 |
Russell King <rmk+kernel@arm.linux.org.uk> |
ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type
When hotplug CPU is enabled, we need to keep the list of supported CPUs,
their setup functions, and __lookup_processor_type in place so that we
can find and initialize secondary CPUs. Move these into the __CPUINIT
section.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 9ca03a21e320a6bf44559323527aba704bcc8772 |
|
26-Jul-2010 |
Russell King <rmk+kernel@arm.linux.org.uk> |
ARM: Factor out common code from cpu_proc_fin()
All implementations of cpu_proc_fin() start by disabling interrupts
and then flush caches. Rather than have every processors proc_fin()
implementation do this, move it out into generic code - and move the
cache flush past setup_mm_for_reboot() (so it can benefit from having
caches still enabled.)
This allows cpu_proc_fin() to become independent of the L1/L2 cache
types, and eventually move the L2 cache flushing into the L2 support
code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 4fb2847437d871fe579f820ceb18031db3359901 |
|
25-Sep-2009 |
Kirill A. Shutemov <kirill@shutemov.name> |
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.
Now we have three prefetch abort model:
* legacy - for CPUs before ARMv6. They doesn't provide neither
IFSR nor IFAR. We simulate IFSR with section translation fault
status for them to generalize code;
* ARMv6 - provides IFSR, but not IFAR;
* ARMv7 - provides both IFSR and IFAR.
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 5ec9407dd1196daaf12b427b351e2cd62d2a16a7 |
|
07-Sep-2008 |
Russell King <rmk@dyn-67.arm.linux.org.uk> |
[ARM] Don't include asm/elf.h in asm code
asm code really wants asm/hwcap.h, so include that instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 4a1fd556c1f1fbd6d9d6739efec042324732b697 |
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21-Apr-2008 |
Catalin Marinas <catalin.marinas@arm.com> |
[ARM] fix 48d7927bdf071d05cf5d15b816cf06b0937cb84f
The proc-*.S files have the _prefetch_abort pointer placed at the end
of the processor structure but the cpu-multi32.h defines it in the
second position. The patch also fixes the support for XSC3 and the
MMU-less CPUs (740, 7tdmi, 940, 946 and 9tdmi).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| ee90dabcadd053d5dd69f3a7f8161afa2c751ace |
|
09-Nov-2006 |
Russell King <rmk@dyn-67.arm.linux.org.uk> |
[ARM] Include asm/elf.h instead of asm/procinfo.h
These files want to provide/access ELF hwcap information, so should
be including asm/elf.h rather than asm/procinfo.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 0f45d7f36b766cb668cebfb5d4d2f67b4a8676ba |
|
28-Sep-2006 |
Hyok S. Choi <hyok.choi@samsung.com> |
[ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores.
There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a
dummy abort handler which returns zero for the base restored Data Abort
model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up
for the base updated Data Abort model cores.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| 43f5f0146ef5c3a3421ea53a0708fd37edcb8905 |
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26-Sep-2006 |
Hyok S. Choi <hyok.choi@samsung.com> |
[ARM] nommu: add ARM9TDMI core support
This patch adds ARM9TDMI core support which has no cache and no CP15
register(no memory control unit).
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|