History log of /arch/mips/include/asm/mmu_context.h
Revision Date Author Comments
dc5efaa049cbb10efaf47fe977d45ea1e38b4465 29-Mar-2012 David Daney <ddaney@caviumnetworks.com> MIPS: Remove get_current_pgd().

It is unused in the tree.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3557/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
3d8bfdd0307223de678962f1c1907a7cec549136 21-Dec-2010 David Daney <ddaney@caviumnetworks.com> MIPS: Use C0_KScratch (if present) to hold PGD pointer.

Decide at runtime to use either Context or KScratch to hold the PGD
pointer.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1876/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
c52d0d30aef84aa8893b34e5254716c8ab5c4472 19-Feb-2010 David Daney <ddaney@caviumnetworks.com> MIPS: Preliminary VDSO

This is a preliminary patch to add a vdso to all user processes. Still
missing are ELF headers and .eh_frame information. But it is enough to
allow us to move signal trampolines off of the stack. Note that emulation
of branch delay slots in the FPU emulator still requires the stack.

We allocate a single page (the vdso) and write all possible signal
trampolines into it. The stack is moved down by one page and the vdso is
mapped into this space.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/975/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
82622284dd2f8791f9759f3cef601520a8bc63b2 14-Oct-2009 David Daney <ddaney@caviumnetworks.com> MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.

Processors that support the mips64r2 ISA can in four instructions
convert a shifted PGD pointer stored in the upper bits of c0_context
into a usable pointer. By doing this we save a memory load and
associated potential cache miss in the TLB exception handlers.

Since the upper bits of c0_context were holding the CPU number, we
move this to the upper bits of c0_xcontext which doesn't have enough
bits to hold the PGD pointer, but has plenty for the CPU number.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
c2ea1d56eaf084c66177eb5658ff4065e79b36ea 13-Oct-2009 Ralf Baechle <ralf@linux-mips.org> MIPS: Avoid potential hazard on Context register

set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.

Issue found and fixed for head.S by Chris Dearman <chris@mips.com>.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
d30cecbcbe149a36a354757cea835c1bb28689cf 27-May-2009 Ralf Baechle <ralf@linux-mips.org> MIPS: Don't write ones to reserved entryhi bits.

We've silently been relying on the hardware chopping off excess, reserved
ASID bits for no better reason that it saving an instruction. Because we
already have:

#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)

in <asm/mmu_context.h>.

We can use a cleanup to avoid writing non-zero bits into the reserved
entryhi bits. This avoid triggering some debugging assertion in the
Cavium simulator.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
55b8cab49dd43d227f0dd49e3524406fdc46d37b 24-Sep-2009 Rusty Russell <rusty@rustcorp.com.au> cpumask: use mm_cpumask() wrapper: mips

Makes code futureproof against the impending change to mm->cpu_vm_mask.

It's also a chance to use the new cpumask_ ops which take a pointer
(the older ones are deprecated, but there's no hurry for arch code).

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
631330f5847b3f8a7ea67d689e9f7c56833ccaa6 19-Jun-2009 Ralf Baechle <ralf@linux-mips.org> MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.

Some of the were relying into smp.h being dragged in by another header
which of course is fragile. <asm/cpu-info.h> uses smp_processor_id()
only in macros and including smp.h there leads to an include loop, so
don't change cpu-info.h.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
384740dc49ea651ba350704d13ff6be9976e37fe 16-Sep-2008 Ralf Baechle <ralf@linux-mips.org> MIPS: Move headfiles to new location below arch/mips/include

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>