4951896aad0b73a8163eb23d44818993237bc0cf |
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16-Feb-2012 |
Timur Tabi <timur@freescale.com> |
powerpc/85xx: p1022ds: disable the NOR flash node if video is enabled The Freescale P1022 has a unique pin muxing "feature" where the DIU video controller's video signals are muxed with 24 of the local bus address signals. When the DIU is enabled, the bulk of the local bus is disabled, preventing access to memory-mapped devices like NOR flash and the pixis FPGA. Therefore, if the DIU is going to be enabled, then memory-mapped devices on the localbus, like NOR flash, need to be disabled. This also means that the localbus is not a 'simple-bus' any more, so remove that string from the compatible node. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
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465aceb832fb54b342a098143dbdc1e1ae250416 |
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18-Jan-2012 |
Ramneek Mehresh <ramneek.mehresh@freescale.com> |
powerpc/85xx: Add usb controller version info Add usb controller version info for the following: MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041, P3041, P3060, P5020 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
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f8b5a31877b93f7136ce8c22ce44930e39b41204 |
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05-Jan-2012 |
Jerry Huang <Chang-Ming.Huang@freescale.com> |
powerpc/85xx: Fix cmd12 bug and add the chip compatible for eSDHC According to latest kernel, the auto-cmd12 property should be "sdhci,auto-cmd12", and according to the SDHC binding and the workaround for the special chip, add the chip compatible for eSDHC: "fsl,p1022-esdhc", "fsl,mpc8536-esdhc", "fsl,p1020-esdhc", "fsl,p2020-esdhc" and "fsl,p1010-esdhc". Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
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ab827d97bd5c7aa3ccf637161d22a6329fb24a02 |
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26-Oct-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework P1022DS device tree Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the 'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum * Updated spi node to new espi binding specification * Renamed SDHC node from 'sdhci' to 'sdhc' * Added usb node for 2nd usb controller * Dropping "fsl,p1022-IP..." from compatibles for standard blocks * Fixed bug in local bus range node for CS2, was maping to 0x0 0x0xffa00000 instead of 0xf 0xffa00000 * Fixed localbus reg property should have been 0xf 0xffe05000 Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Tested-by: Timur Tabi <timur@freescale.com>
/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
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