Cross Reference: /arch/x86/oprofile/op_model

History log of /arch/x86/oprofile/op_model_amd.c
Revision	Date	Author	Comments (<<< Hide modified files) (Show modified files >>>)
b716916679e72054d436afadce2f94dcad71cfad	21-Sep-2011	Robert Richter <robert.richter@amd.com>	perf, x86: Implement IBS initialization This patch implements IBS feature detection and initialzation. The code is shared between perf and oprofile. If IBS is available on the system for perf, a pmu is setup. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1316597423-25723-3-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu> /arch/x86/oprofile/op_model_amd.c
ee5789dbcc800ba7d641443e53f60d53977f9747	21-Sep-2011	Robert Richter <robert.richter@amd.com>	perf, x86: Share IBS macros between perf and oprofile Moving IBS macros from oprofile to <asm/perf_event.h> to make it available to perf. No additional changes. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1316597423-25723-2-git-send-email-robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu> /arch/x86/oprofile/op_model_amd.c
cbf74cea070fa1f705de4712e25d9e56ae6543c7	30-May-2011	Robert Richter <robert.richter@amd.com>	oprofile, x86: Add comments to IBS LVT offset initialization Adding a comment in the code as IBS LVT setup is not obvious at all ... Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
3d2606f42984613d324ad3047cf503bcddc3880a	20-May-2011	Robert Richter <robert.richter@amd.com>	oprofile, x86: Enable preemption during pci device setup in IBS init IBS initialization is a mix of per-core register access and per-node pci device setup. Register access should be pinned to the cpu, but pci setup must run with preemption enabled. This patch better separates the code into non-/preemptible sections and fixes sleeping with preemption disabled. See bug message below. Fixes also freeing the eilvt entry by introducing put_eilvt(). BUG: sleeping function called from invalid context at mm/slub.c:824 in_atomic(): 1, irqs_disabled(): 0, pid: 32357, name: modprobe INFO: lockdep is turned off. Pid: 32357, comm: modprobe Not tainted 2.6.39-rc7+ #14 Call Trace: [<ffffffff8104bdc8>] __might_sleep+0x112/0x117 [<ffffffff81129693>] kmem_cache_alloc_trace+0x4b/0xe7 [<ffffffff81278f14>] kzalloc.constprop.0+0x29/0x2b [<ffffffff81278f4c>] pci_get_subsys+0x36/0x78 [<ffffffff81022689>] ? setup_APIC_eilvt+0xfb/0x139 [<ffffffff81278fa4>] pci_get_device+0x16/0x18 [<ffffffffa06c8b5d>] op_amd_init+0xd3/0x211 [oprofile] [<ffffffffa064d000>] ? 0xffffffffa064cfff [<ffffffffa064d298>] op_nmi_init+0x21e/0x26a [oprofile] [<ffffffffa064d062>] oprofile_arch_init+0xe/0x26 [oprofile] [<ffffffffa064d010>] oprofile_init+0x10/0x42 [oprofile] [<ffffffff81002099>] do_one_initcall+0x7f/0x13a [<ffffffff81096524>] sys_init_module+0x132/0x281 [<ffffffff814cc682>] system_call_fastpath+0x16/0x1b Reported-by: Dave Jones <davej@redhat.com> Cc: <stable@kernel.org> [2.6.37.x] Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
4e1db5e58af8bc6ab4a651df279add41c48d3fc2	06-Jan-2011	Linus Torvalds <torvalds@linux-foundation.org>	Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: apic, amd: Make firmware bug messages more meaningful mce, amd: Remove goto in threshold_create_device() mce, amd: Add helper functions to setup APIC mce, amd: Shorten local variables mci_misc_{hi,lo} mce, amd: Implement mce_threshold_block_init() helper function
aef1b9cef78ae65c6501850851cc3f61f9be477b	05-Jan-2011	Ingo Molnar <mingo@elte.hu>	Merge commit 'v2.6.37' into perf/core Merge reason: Add the final .37 tree. Signed-off-by: Ingo Molnar <mingo@elte.hu>
c7c25802b39c443b3745cfa973dc49a97a3491f8	03-Jan-2011	Robert Richter <robert.richter@amd.com>	arch/x86/oprofile/op_model_amd.c: Perform initialisation on a single CPU Disable preemption in init_ibs(). The function only checks the ibs capabilities and sets up pci devices (if necessary). It runs only on one cpu but operates with the local APIC and some MSRs, thus it is better to disable preemption. [ 7.034377] BUG: using smp_processor_id() in preemptible [00000000] code: modprobe/483 [ 7.034385] caller is setup_APIC_eilvt+0x155/0x180 [ 7.034389] Pid: 483, comm: modprobe Not tainted 2.6.37-rc1-20101110+ #1 [ 7.034392] Call Trace: [ 7.034400] [<ffffffff812a2b72>] debug_smp_processor_id+0xd2/0xf0 [ 7.034404] [<ffffffff8101e985>] setup_APIC_eilvt+0x155/0x180 [ ... ] Addresses https://bugzilla.kernel.org/show_bug.cgi?id=22812 Reported-by: <atswartz@gmail.com> Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: oprofile-list@lists.sourceforge.net <oprofile-list@lists.sourceforge.net> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Dan Carpenter <error27@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: <stable@kernel.org> [2.6.37.x] LKML-Reference: <20110103111514.GM4739@erda.amd.com> [ small cleanups ] Signed-off-by: Ingo Molnar <mingo@elte.hu> /arch/x86/oprofile/op_model_amd.c
da169f5df2764a6a937cb3b07562e269edfb1c0e	24-Sep-2010	Robert Richter <robert.richter@amd.com>	oprofile, x86: Add support for 6 counters (AMD family 15h) This patch adds support for up to 6 hardware counters for AMD family 15h cpus. There is a new MSR range for hardware counters beginning at MSRC001_0200 Performance Event Select (PERF_CTL0). Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
0b849ee88846e3488a34007c5b8b4249579ff159	25-Oct-2010	Ingo Molnar <mingo@elte.hu>	Merge branch 'x86' of git://git.kernel.org/pub/scm/linux/kernel/git/rric/oprofile into perf/urgent
eb48c9cb2053e7bb5f7f8f0371cb578a0d439450	25-Oct-2010	Robert Richter <robert.richter@amd.com>	apic, amd: Make firmware bug messages more meaningful This improves error messages in case the BIOS was setting up wrong LVT offsets. Signed-off-by: Robert Richter <robert.richter@amd.com> Acked-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <1288015419-29543-6-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> /arch/x86/oprofile/op_model_amd.c
4cafc4b8d7219b70e15f22e4a51b3ce847810caf	25-Oct-2010	Robert Richter <robert.richter@amd.com>	Merge branch 'oprofile/core' into oprofile/x86 Conflicts: arch/x86/oprofile/op_model_amd.c Signed-off-by: Robert Richter <robert.richter@amd.com>
2c78ffeca98fcd5a1dfd4a322438944506ed5e64	25-Oct-2010	Ingo Molnar <mingo@elte.hu>	x86/oprofile: Fix uninitialized variable use in debug printk Stephen Rothwell reported this build warning: arch/x86/oprofile/op_model_amd.c: In function 'ibs_eilvt_valid': arch/x86/oprofile/op_model_amd.c:289: warning: 'offset' may be used uninitialized in this function And correctly observed that indeed the variable is used uninitialized in this function. The result of this bug can be a debug printk with a bogus value. Also fix a few more small details that made this function hard to read and which probably contributed to the bug being introduced to begin with: - Use more symmetric error conditions - Remove the !0 obfuscation - Add newlines to the printk output - Remove bogus linebreaks in printk strings and elsewhere Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Robert Richter <robert.richter@amd.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <20101025115736.41d51abe.sfr@canb.auug.org.au> Signed-off-by: Ingo Molnar <mingo@elte.hu> /arch/x86/oprofile/op_model_amd.c
27afdf2008da0b8878a73e32e4eb12381b84e224	06-Oct-2010	Robert Richter <robert.richter@amd.com>	apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets We want the BIOS to setup the EILVT APIC registers. The offsets were hardcoded and BIOS settings were overwritten by the OS. Now, the subsystems for MCE threshold and IBS determine the LVT offset from the registers the BIOS has setup. If the BIOS setup is buggy on a family 10h system, a workaround enables IBS. If the OS determines an invalid register setup, a "[Firmware Bug]: " error message is reported. We need this change also for upcomming cpu families. Signed-off-by: Robert Richter <robert.richter@amd.com> LKML-Reference: <1286360874-1471-3-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> /arch/x86/oprofile/op_model_amd.c
b47fad3bfb5940cc3e28a1c69716f6dc44e4b7e6	22-Sep-2010	Robert Richter <robert.richter@amd.com>	oprofile, x86: Add support for IBS periodic op counter extension The count value for IBS op sampling has been extended by 7 bits. The feature is reflected in bit 6 (OpCntExt) of the IBS capability register (CPUID Fn8000_001B_EAX). Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
25da6950475becb35d7a3bb3b5fbdc715a76887e	21-Sep-2010	Robert Richter <robert.richter@amd.com>	oprofile, x86: Add support for IBS branch target address reporting This patch adds support for IBS branch target address reporting. A new MSR (MSRC001_103B IBS Branch Target Address) has been added that provides the logical address in canonical form for the branch target. The size of the IBS sample that is transferred to the userland has been increased. For backward compatibility, the userland daemon must explicit enable the feature by writing to the oprofilefs file ibs_op/branch_target After enabling branch target address reporting, the userland daemon must handle the extended size of the IBS sample. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
53b39e9480ef8a286cef9899c455a979acd0eed9	21-Sep-2010	Robert Richter <robert.richter@amd.com>	oprofile, x86: Introduce struct ibs_state This patch introduces struct ibs_state that will extended by additinal members in follow-on patches. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
fc889aa23f4767c1c3f77fce11e17bb0a638971f	21-Sep-2010	Robert Richter <robert.richter@amd.com>	oprofile, x86: Remove duplicate check for IBS_CAPS_OPCNT Since oprofile is setting up ibs_op/dispatched_ops in the fs only if the feature is available, its corresponding variable ibs_config.dispatched_ops is only set, if the feature is available. Thus the check is duplicate and can be removed. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
4ac945f002c0bebdeb530cbc3729e22895e64a7e	21-Sep-2010	Robert Richter <robert.richter@amd.com>	oprofile, x86: Check IBS capability bits 1 and 2 There are IBS CPUID feature flags in CPUID Fn8000_001B to detect if the cpu supports IBS fetch sampling (FetchSam) and/or IBS execution sampling (OpSam). This patch adds checks if the both features are available. Spec: http://support.amd.com/us/Processor_TechDocs/31116.pdf Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
bae663bc635e2726c7c5228dbf0f2051e16d1c81	05-May-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: make AMD IBS hotplug capable Current IBS code is not hotplug capable. An offline cpu might not be initialized or deinitialized properly. This patch fixes this by removing on_each_cpu() functions. The IBS init/deinit code is executed in the per-cpu functions model->setup_ctrs() and model->cpu_down() which are also called by hotplug notifiers. model->cpu_down() replaces model->exit() that became obsolete. Cc: Andi Kleen <andi@firstfloor.org> Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
5bdb7934ca4115a12c7d585c5a45312b1c36909b	31-Mar-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: remove duplicate IBS capability check The check is already done in ibs_exit(). Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
da759fe5be24ec3b236a76c007b460cf6caf2009	26-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: move IBS code Moving code to make future changes easier. This groups all IBS code together. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
8617f98c001d00b176422d707e6a67b88bcd7e0d	26-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: return -EBUSY if counters are already reserved In case a counter is already reserved by the watchdog or perf_event subsystem, oprofile ignored this counters silently. This case is handled now and oprofile_setup() now reports an error. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
83300ce0df6b72e156b386457aa0f0902b8c0a98	23-Mar-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: moving shutdown functions Moving some code in preparation of the next patch. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
d0e4120fda6f87eead438eed4d49032e12060e58	23-Mar-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: reserve counter msrs pairwise For AMD's and Intel's P6 generic performance counters have pairwise counter and control msrs. This patch changes the counter reservation in a way that both msrs must be registered. It joins some counter loops and also removes the unnecessary NUM_CONTROLS macro in the AMD implementation. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
bb1165d6882f423f90fc7007a88c6c993b7c2ac4	01-Mar-2010	Robert Richter <robert.richter@amd.com>	perf, x86: rename macro in ARCH_PERFMON_EVENTSEL_ENABLE For consistency reasons this patch renames ARCH_PERFMON_EVENTSEL0_ENABLE to ARCH_PERFMON_EVENTSEL_ENABLE. The following is performed: $ sed -i -e s/ARCH_PERFMON_EVENTSEL0_ENABLE/ARCH_PERFMON_EVENTSEL_ENABLE/g \ arch/x86/include/asm/perf_event.h arch/x86/kernel/cpu/perf_event.c \ arch/x86/kernel/cpu/perf_event_p6.c \ arch/x86/kernel/cpu/perfctr-watchdog.c \ arch/x86/oprofile/op_model_amd.c arch/x86/oprofile/op_model_ppro.c Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
a163b1099dc7016704043c7fc572ae42519f08f7	25-Feb-2010	Robert Richter <robert.richter@amd.com>	perf, x86: add some IBS macros to perf_event.h Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
1d6040f17d12a65b9f7ab4cb9fd6d721206b79ec	25-Feb-2010	Robert Richter <robert.richter@amd.com>	perf, x86: make IBS macros available in perf_event.h This patch moves code from oprofile to perf_event.h to make it also available for usage by perf. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
cfc9c0b450176a077205ef39092f0dc1a04e020a	26-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: fix msr access to reserved counters During switching virtual counters there is access to perfctr msrs. If the counter is not available this fails due to an invalid address. This patch fixes this. Cc: stable@kernel.org Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
c17c8fbf349482e89b57d1b800e83e9f4cf40c47	25-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: use kzalloc() instead of kmalloc() Cc: stable@kernel.org Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
68dc819ce829f7e7977a56524e710473bdb55115	25-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: fix perfctr nmi reservation for mulitplexing Multiple virtual counters share one physical counter. The reservation of virtual counters fails due to duplicate allocation of the same counter. The counters are already reserved. Thus, virtual counter reservation may removed at all. This also makes the code easier. Cc: stable@kernel.org Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
98a2e73a0690b3610f049a64154d8145e5771713	23-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: warn user if a counter is already active This patch generates a warning if a counter is already active. Implemented for AMD and P6 models. P4 is not supported. Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Cc: Shashi Belur <shashi-kiran.belur@hp.com> Cc: Tony Jones <tonyj@suse.de> Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
ba52078e1917c5116c0802298d88ad0e54a6728b	23-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: implement randomization for IBS periodic op counter IBS selects an op (execution operation) for sampling by counting either cycles or dispatched ops. Better statistical samples can be produced by adding a software generated random offset to the periodic op counter value with each sample. This patch adds software randomization to the IBS periodic op counter. The lower 12 bits of the 20 bit counter are randomized. IbsOpCurCnt is initialized with a 12 bit random value. There is a work around if the hw can not write to IbsOpCurCnt. Then the lower 8 bits of the 16 bit IbsOpMaxCnt [15:0] value are randomized in the range of -128 to +127 by adding/subtracting an offset to the maximum count (IbsOpMaxCnt). The linear feedback shift register (LFSR) algorithm is used for pseudo-random number generation to have low impact to the memory system. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
f125be1469303f7b9324447f251d74a0da24952f	18-Jan-2010	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>	oprofile/x86: implement lsfr pseudo-random number generator for IBS This patch implements a linear feedback shift register (LFSR) for pseudo-random number generation for IBS. For IBS measurements it would be good to minimize memory traffic in the interrupt handler since every access pollutes the data caches. Computing a maximal period LFSR just needs shifts and ORs. The LFSR method is good enough to randomize the ops at low overhead. 16 pseudo-random bits are enough for the implementation and it doesn't matter that the pattern repeats with a fairly short cycle. It only needs to break up (hard) periodic sampling behavior. The logic was designed by Paul Drongowski. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
64683da6643e8c6c93f1f99548399b08c029fd13	04-Feb-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: implement IBS cpuid feature detection This patch adds IBS feature detection using cpuid flags. An IBS capability mask is introduced to test for certain IBS features. The bit mask is the same as for IBS cpuid feature flags (Fn8000_001B_EAX), but bit 0 is used to indicate the existence of IBS. The patch also changes the handling of the IbsOpCntCtl bit (periodic op counter count control). The oprofilefs file for this feature (ibs_op/dispatched_ops) will be only exposed if the feature is available, also the default for the bit is set to count clock cycles. In general, the userland can detect the availability of a feature by checking for the corresponding file in oprofilefs. If it exists, the feature also exists. This may lead to a dynamic file layout depending on the cpu type with that the userland has to deal with. Current opcontrol is compatible. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
89baaaa98a10cad5cc8516c7208b02d9fc711890	28-Jan-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: remove node check in AMD IBS initialization Standard AMD systems have the same number of nodes as there are northbridge devices. However, there may kernel configurations (especially for 32 bit) or system setups exist, where the node number is different or it can not be detected properly. Thus the check is not reliable and may fail though IBS setup was fine. For this reason it is better to remove the check. Cc: stable <stable@kernel.org> Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
013cfc50672bbb638796545231683231647edb07	28-Jan-2010	Robert Richter <robert.richter@amd.com>	oprofile/x86: remove OPROFILE_IBS config option OProfile support for IBS is now for several versions in the kernel. The feature is stable now and the code can be activated permanently. As a side effect IBS now works also on nosmp configs. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
4680e64a88c4ce2c4e736dade99233e3def13fa7	23-Jun-2009	Andrew Morton <akpm@linux-foundation.org>	arch/x86/oprofile/op_model_amd.c: fix op_amd_handle_ibs() return type arch/x86/oprofile/op_model_amd.c: In function 'op_amd_handle_ibs': arch/x86/oprofile/op_model_amd.c:217: warning: no return statement in function returning non-void Fix this by making op_amd_handle_ibs() return void. Cc: Robert Richter <robert.richter@amd.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
54a0bf3c2cad3fd118ea725f26a493aece6ea01d	04-Aug-2009	Robert Richter <robert.richter@amd.com>	Revert "x86: oprofile/op_model_amd.c set return values for op_amd_handle_ibs()" This reverts commit 21e70878215f620fe99ea7d7c74bc641aeec932f. Instead Andrew's patch will be applied he posted at the same time. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
c550091edd6fac2ed9dac1b30d986b6c58b216fa	16-Jul-2009	Robert Richter <robert.richter@amd.com>	x86/oprofile: Small coding style fixes Some small coding style fixes. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c
61d149d5248ad7428801cdede0f5fcc2b90cd61c	10-Jul-2009	Robert Richter <robert.richter@amd.com>	x86/oprofile: Implement op_x86_virt_to_phys() This patch implements a common x86 function to convert virtual counter numbers to physical. Signed-off-by: Robert Richter <robert.richter@amd.com> /arch/x86/oprofile/op_model_amd.c