History log of /arch/x86/pci/bus_numa.c
Revision Date Author Comments
2cd6975a4ff92a75e46240109d01c1daf4682e5d 29-Oct-2011 Bjorn Helgaas <bhelgaas@google.com> x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()

x86 has two kinds of PCI root bus scanning:

(1) ACPI-based, using _CRS resources. This used pci_create_bus(), not
pci_scan_bus(), because ACPI hotplug needed to split the
pci_bus_add_devices() into a separate host bridge .start() method.

This patch parses the _CRS resources earlier, so we can build a list of
resources and pass it to pci_create_root_bus().

Note that as before, we parse the _CRS even if we aren't going to use
it so we can print it for debugging purposes.

(2) All other, which used either default resources (ioport_resource and
iomem_resource) or information read from the hardware via amd_bus.c or
similar. This used pci_scan_bus().

This patch converts x86_pci_root_bus_res_quirks() (previously called
from pcibios_fixup_bus()) to x86_pci_root_bus_resources(), which builds
a list of resources before we call pci_scan_root_bus().

We also use x86_pci_root_bus_resources() if we have ACPI but are
ignoring _CRS.

CC: Yinghai Lu <yinghai.lu@oracle.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2fe2abf896c1e7a0ee65faaf3ef0ce654848abbd 23-Feb-2010 Bjorn Helgaas <bjorn.helgaas@hp.com> PCI: augment bus resource table with a list

Previously we used a table of size PCI_BUS_NUM_RESOURCES (16) for resources
forwarded to a bus by its upstream bridge. We've increased this size
several times when the table overflowed.

But there's no good limit on the number of resources because host bridges
and subtractive decode bridges can forward any number of ranges to their
secondary buses.

This patch reduces the table to only PCI_BRIDGE_RESOURCE_NUM (4) entries,
which corresponds to the number of windows a PCI-to-PCI (3) or CardBus (4)
bridge can positively decode. Any additional resources, e.g., PCI host
bridge windows or subtractively-decoded regions, are kept in a list.

I'd prefer a single list rather than this split table/list approach, but
that requires simultaneous changes to every architecture. This approach
only requires immediate changes where we set up (a) host bridges with more
than four windows and (b) subtractive-decode P2P bridges, and we can
incrementally change other architectures to use the list.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9ad3f2c7c69659c343843393944d739fec1f2e73 10-Feb-2010 Yinghai Lu <yinghai@kernel.org> x86/pci: Add cap_resource()

Prepare for 32bit pci root bus

-v2: hpa said we should compare with (resource_size_t)~0
-v3: according to Linus to use MAX_RESOURCE instead.
also need need to put related patches together
-v4: according to Andrew, use min in cap_resource()

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <1265793639-15071-8-git-send-email-yinghai@kernel.org>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
3e3da00c01d050307e753fb7b3e84aefc16da0d0 10-Feb-2010 Yinghai Lu <yinghai@kernel.org> x86/pci: AMD one chain system to use pci read out res

Found MSI amd k8 based laptops is hiding [0x70000000, 0x80000000) RAM
from e820.

enable amd one chain even for all.

-v2: use bool for found, according to Andrew

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <1265793639-15071-6-git-send-email-yinghai@kernel.org>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
b74fd238a9cf39a81d94152f375b756bf795b4af 10-Feb-2010 Yinghai Lu <yinghai@kernel.org> x86/pci: Use resource_size_t in update_res

Prepare to enable 32bit intel and amd bus.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <1265793639-15071-5-git-send-email-yinghai@kernel.org>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
5714868812b563ba8816c1d974f4f07c76941c30 15-Dec-2009 Jiri Slaby <jslaby@suse.cz> PCI: fix section mismatch on update_res()

Remark update_res from __init to __devinit as it is called also
from __devinit functions.

This patch removes the following warning message:

WARNING: vmlinux.o(.devinit.text+0x774a): Section mismatch
in reference from the function pci_root_bus_res() to the
function .init.text:update_res()
The function __devinit pci_root_bus_res() references
a function __init update_res().
If update_res is only used by pci_root_bus_res then
annotate update_res with a matching annotation.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Aristeu Sergio <arozansk@redhat.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: linux-pci@vger.kernel.org
Cc: x86@kernel.org
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
67f241f4579651ea4335b58967c8880c0a378249 12-Nov-2009 Yinghai Lu <yinghai@kernel.org> x86/pci: seperate x86_pci_rootbus_res_quirks from amd_bus.c

Those functions are used by intel_bus.c so seperate them to another file. and
make amd_bus a bit smaller.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>