| c1ae68309b0c1ea67b72e9e94e26b4e819022fc7 |
|
30-Mar-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Erratum #637 workaround
F15h CPUs may report a non-DRAM address when reporting an error address
belonging to a CC6 state save area. Add a workaround to detect this
condition and compute the actual DRAM address of the error as documented
in the Revision Guide for AMD Family 15h Models 00h-0Fh Processors.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| f08e457cecece7fbbdad3add9defac3373a59b5a |
|
21-Mar-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Factor in CC6 save area
F15h and later use a portion of DRAM as a CC6 storage area. BIOS
programs D18F1x[17C:140,7C:40] DRAM Base/Limit accordingly by
subtracting the storage area from the DRAM limit setting. However, in
order for edac to consider that part of DRAM too, we need to include it
into the per-node range.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 151fa71c581d1295f3f44f4882ceb17ca014dc8d |
|
21-Feb-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Fix DRAM base macros
Return unsigned u8 values only.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| b487c33e55eb7e18cd98094f7159c6d9e8b6bedd |
|
21-Feb-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Fix node id signedness
A node id can never be negative since we use it as an index into
the DRAM ranges array. This also makes one of the BUG_ON conditions
redundant.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| d88977a9c433deb7e558e0af51092449ef2ad2dd |
|
21-Feb-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Drop redundant declarations
Those were moved to the mce_amd.h header.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| df71a053241548b728d3bf45b0c11ed092a20319 |
|
19-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Enable driver on F15h
Add the PCI device ids required for driver registration. Remove
pvt->ctl_name and use the family descriptor directly, instead. Then,
bump driver version and fixup its format. Finally, enable DRAM ECC
decoding on F15h.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| a3b7db09a6d5a6b8d237766b0b320447bb609bc5 |
|
19-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Adjust ECC symbol size to F15h
F15h has the same ECC symbol size options as F10h revD and later so
adjust checks to that. Simplify code a bit.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 87b3e0e6e43b7e92575b79ed05ab86d221323642 |
|
19-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Simplify scrubrate setting
Drop per-instance variable and compute min scrubrate dynamically.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 41d8bfaba70311c2fa0666554ef160ea8ffc9daf |
|
18-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Improve DRAM address mapping
Drop static tables which map the bits in F2x80 to a chip select size in
favor of functions doing the mapping with some bit fiddling. Also, add
F15 support.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 5a5d237169152d4d7e4b6105eab15831829fb8e7 |
|
17-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Sanitize ->read_dram_ctl_register
This function is relevant for F10h and higher, and it has only one
callsite so drop its function pointer from the low_ops struct.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 614ec9d8532cc6b2f6b471c399daffdfd1c32d03 |
|
13-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Revamp online spare handling
Replace per-DCT macros with smarter ones, drop hack and look for the
spare rank on all chip selects on a channel.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 95b0ef55cd8a8278b64c7ba98c29cda5f4e4b617 |
|
11-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Add support for interleaved region swapping
On revC3 and revE Fam10h machines and later, non-interleaved graphics
framebuffer memory under the 16G mark can be swapped with a region
located at the bottom of memory so that the GPU can use the interleaved
region and thus two channels. Add support for that.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 700466249f9bb787165da64d2615cee456d88751 |
|
10-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Unify get_error_address
The address bits from MC4_STATUS differ only between K8 and the rest so
no need for a per-family method.
No functional change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| f192c7b16c98839c1945733f1013f75daec5f380 |
|
10-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Simplify decoding path
Use the struct mce directly instead of copying from it into a custom
struct err_regs.
No functionality change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 5980bb9cd88a3fa44cc5beab599f08fbc928b832 |
|
07-Jan-2011 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Cleanup old defines cruft
Remove unused defines, drop family names from define names.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| a97fa68ec403e2761a37b28651de8fd9da8c5e1f |
|
23-Dec-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Cleanup NBCFG handling
The fact whether we are chipkill capable or not does not have any
bearing when computing the channel index on a ganged DCT configuration
so remove that. Also, simplify debug statements. Finally, remove old
error injection leftovers, while at it.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| c9f4f26eae096c39547139666e8af607c2447f94 |
|
22-Dec-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Cleanup NBCTL code
Remove family names from macro names, drop single bit defines and
comment their meaning instead.
No functional change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 78da121e1560805a0e6e11952de30b416accef62 |
|
22-Dec-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Cleanup DCT Select Low/High code
Shorten macro names, remove family name from macros, fix macro
arguments, shorten debug strings.
No functionality change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| cb32850744b8b574966637ae98d55692717eced4 |
|
22-Dec-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Cleanup Dram Configuration registers handling
* Restrict DCT ganged mode check since only Fam10h supports it
* Adjust DRAM type detection for BD since it only supports DDR3
* Remove second and thus unneeded DCLR read in k8_early_channel_count() - we do
that in read_mc_regs()
* Cleanup comments and remove family names from register macros
* Remove unused defines
There should be no functional change resulting from this patch.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| c8e518d5673d6b694ab843ee586438cdff0b3809 |
|
10-Dec-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Sanitize f10_get_base_addr_offset
This function maps the system address to the normalized DCT address.
Document what the code does for more clarity and wrap insane bitmasks in
a more understandable macro which generates them. Also, reduce number of
arguments passed to the function. Finally, rename this function to what
it actually does.
No functional change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 11c75eadaf75fe6320325aa13dc135f26ad724b8 |
|
29-Nov-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Cleanup chipselect handling
Add a struct representing the DRAM chip select base/limit register
pairs. Concentrate all CS handling in a single function. Also, add CS
looping macros for cleaner, more readable code. While at it, adjust code
to F15h. Finally, do smaller macro names cleanups (remove family names
from register macros) and debug messages clarification.
No functional change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| bc21fa578742924aa129a493657f797c13d34ad2 |
|
11-Nov-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Cleanup DHAR handling
Adjust to F15h, simplify code, fixup macros.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 7f19bf755ced6fa16dbf118c0eff60586760496b |
|
21-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Remove DRAM base/limit subfields caching
Add a struct representing the DRAM base/limit range pairs and remove all
cached subfields. Replace them with accessor functions, which actually
saves us some space:
text data bss dec hex filename
14712 1577 336 16625 40f1 drivers/edac/amd64_edac_mod.o.after
14831 1609 336 16776 4188 drivers/edac/amd64_edac_mod.o.before
Also, it simplifies the code a lot allowing to merge the K8 and F10h
routines.
No functional change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| b2b0c605436e343a9a24f00e7fc8fb89a8316e20 |
|
08-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Add support for F15h DCT PCI config accesses
F15h "multiplexes" between the configuration space of the two DRAM
controllers by toggling D18F1x10C[DctCfgSel] while F10h has a different
set of registers for DCT0, and DCT1 in extended PCI config space.
Add DCT configuration space accessors per family thus wrapping all the
different access prerequisites. Clean up code while at it, shorten
names.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 390944439f746824faec51b576f50cb5ef18745b |
|
24-Nov-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
EDAC: Fixup scrubrate manipulation
Make the ->{get|set}_sdram_scrub_rate return the actual scrub rate
bandwidth it succeeded setting and remove superfluous arg pointer used
for that. A negative value returned still means that an error occurred
while setting the scrubrate. Document this for future reference.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| ae7bb7c679e7ddba6c52d1a78a30f9bc868d9738 |
|
14-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Carve out ECC-related hw settings
This is in preparation for the init path reorganization where we want
only to
1) test whether a particular node supports ECC
2) can it be enabled
and only then do the necessary allocation/initialization. For that,
we need to decouple the ECC settings of the node from the instance's
descriptor.
The should be no functional change introduced by this patch.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| f1db274e1ba7004909de4a9cee62f631c030ba3e |
|
14-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Remove PCI ECS enabling functions
PCI ECS is being enabled by default since 2.6.26 on AMD so this code is
just superfluous now, remove it.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| cc4d8860fc37dd315b16a43202400d822ab63221 |
|
13-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Allocate driver instances dynamically
Remove static allocation in favor of dynamically allocating space for as
many driver instances as northbridges present on the system.
There should be no functional change resulting from this patch.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 24f9a7fe3f19f3fd310f556364d01a22911724b3 |
|
07-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Rework printk macros
Add a macro per printk level, shorten up error messages. Add relevant
information to KERN_INFO level. No functional change.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 8d5b5d9c7b86e44fda29a367db3ccd2815a52f7c |
|
01-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Rename CPU PCI devices
Rename variables representing PCI devices to their BKDG names for faster
search and shorter, clearer code.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| b8cfa02f833a614e80f851747c4ce14989a4cfd0 |
|
01-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Concentrate per-family init even more
Move the remaining per-family init code into the proper place and
simplify the rest of the initialization. Reorganize error handling in
amd64_init_one_instance().
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 0092b20d4cf3de243b5c82b410ee02644cec2707 |
|
01-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Simplify CPU family detection
Concentrate CPU family detection in the per-family init function.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 395ae783b384e5243804b07fba3e3f8379ddf1d6 |
|
01-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Add per-family init function
Run a per-family init function which does all the settings based on
the family this driver instance is running on. Move the scrubrate
calculation in it and simplify code.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 3ab0e7dc2e1d5598da609ec9a9bcd3b69b8fa654 |
|
01-Oct-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Remove F11h support
F11h doesn't support DRAM ECC so whack it away.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 5ce88f6ea6bef929f59f9468413f922c9a486fa4 |
|
31-Aug-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
EDAC, MCE: Complete NB MCE decoders
Add support for decoding F14h BU MCEs and improve decoding of the
remaining families.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 47ca08a40b043815134d489e21870b53276f1a4a |
|
27-Sep-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
EDAC, MCE: Rename files
Drop "edac_" string from the filenames since they're prefixed with edac/
in their pathname anyway.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 9cdeb404a1870c5022915e576dbdc3cde21af5bf |
|
02-Sep-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
EDAC, MCE: Rework MCE injection
Add sysfs injection facilities for testing of the MCE decoding code.
Remove large parts of amd64_edac_dbg.c, as a result, which did only
NB MCE injection anyway and the new injection code supports that
functionality already.
Add an injection module so that MCE decoding code in production kernels
like those in RHEL and SLES can be tested.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 695426506ebba6acc87843cca075595a775e8866 |
|
15-Mar-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Remove unneeded defines
All F2x110-related bit defines are used at only one place so replace
them with simple BIT() macros.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by: Doug Thompson <dougthompson@xmission.com>
|
| ad6a32e96939a0eb0eb382e7d78dbf33457aed1a |
|
09-Mar-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Sanitize syndrome extraction
Remove the two syndrome extraction macros and add a single function
which does the same thing but with proper typechecking. While at it,
make sure to cache ECC syndrome size and dump it in debug output.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| d95cf4de6a1c9c1025ac375bc6d2da6af18fdf35 |
|
24-Feb-2010 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: Simplify ECC override handling
No need for clearing ecc_enable_override and checking it in two places.
Instead, simply check it during probing and act accordingly. Also,
rename the flag bitfields according to the functionality they actually
represent. What is more, make sure original BIOS ECC settings are
restored when the module is unloaded.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| df5b1606bd077401831759171c355dc38cfaa59a |
|
16-Nov-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: bump driver version
This was long overdue ...
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 986a42a25059143d153e30a0cc36630bd0e623c6 |
|
11-Nov-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: remove early hw support check
The .probe_valid_hardware low_ops member checked whether the DCTs are in
DDR3 mode and bailed out if so. Now that all the needed changes for DDR3
support is in place, remove it.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 1433eb9903408d1801d19a9c49893120874abc12 |
|
21-Oct-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: enhance address to DRAM bank mapping
Add cs mode to cs size mapping tables for DDR2 and DDR3 and F10
and all K8 flavors and remove klugdy table of pseudo values. Add a
low_ops->dbam_to_cs member which is family-specific and replaces
low_ops->dbam_map_to_pages since the pages calculation is a one liner
now.
Further cleanups, while at it:
- shorten family name defines
- align amd64_family_types struct members
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 68798e176012750fe8487bcfa0aa66fee21eae3c |
|
03-Nov-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: cleanup DRAM cfg low debug output
Carve out the register-specific debug statements into a separate
function, clarify meanings of the single bitfields in the register,
remove irrelevant output and macros.
There should be no functionality change resulting from this patch.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 6ba5dcdc44624677bba0bef1dcb93a524f88f8c1 |
|
13-Oct-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: wrap-up pci config read error handling
Add a pci config read wrapper for signaling pci config space access
errors instead of them being visible only on a debug build. This is
important on amd64_edac since it uses all those pci config register
values to access the DRAM/DIMM configuration of the nodes.
In addition, the wrapper makes a _lot_ (look at the diffstat!) of
error handling code superfluous and improves much of the overall code
readability by removing error handling details out of the way.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| f6d6ae965760906d79ab29bc38507608c5971549 |
|
03-Nov-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: unify MCGCTL ECC switching
Unify almost identical code into one function and remove NUMA-specific
usage (specifically cpumask_of_node()) in favor of generic topology
methods.
Remove unused defines, while at it.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 94baaee4947d84809b289d5ca03677525ffc6da9 |
|
24-Sep-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: beef up DRAM error injection
When injecting DRAM ECC errors (F3xBC_x8), EccVector[15:0] is a bitmask
of which bits should be error injected when written to and holds the
payload of 16-bit DRAM word when read, respectively.
Add /sysfs members to show the DRAM ECC section/word/vector.
Fail wrong injection values entered over /sysfs instead of truncating
them.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 9d858bb10a9907bbbaffbb4a80a31718d548868c |
|
21-Sep-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: fix chip select handling
Different processor families support a different number of chip selects.
Handle this in a family-dependent way with the proper values assigned at
init time (see amd64_set_dct_base_and_mask).
Remove _DCSM_COUNT defines since they're used at one place and originate
from public documentation.
CC: Keith Mannthey <kmannth@us.ibm.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 3011b20da9d60b8168ead403e6aa860d0d8d11e4 |
|
21-Sep-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: fix driver instance lookup table allocation
Allocate memory statically for 8-node machines max for simplicity
instead of relying on MAX_NUMNODES which is 0 on !CONFIG_NUMA builds.
Spotted by Jan Beulich.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 549d042df240dfb4203bab40ad44f9336751b7d6 |
|
24-Jul-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
x86, mce: pass mce info to EDAC for decoding
Move NB decoder along with required defines to EDAC MCE core. Add
registration routines for further decoding of the MCE info in the AMD64
EDAC module.
CC: Andi Kleen <andi@firstfloor.org>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| 5110dbdeab546268dda2e4c6a83448639b2fc5ae |
|
25-Jun-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: cleanup/complete NB MCE decoding
* don't dump info which mcheck already does
* update to newest BKDG
* mv amd64_process_error_info -> amd64_decode_nb_mce
* shorten error struct names
* remove redundant info ptr in amd64_process_error_info
* remove unused ErrorCodeExt[19:16] (MCx_STATUS) defines
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| ef44cc4c2245d3c43f3c11c7bff6239852eef498 |
|
23-Jul-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: cleanup amd64_process_error_info
* mv amd64_error_info_regs -> err_regs
* remove redundant info ptr
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|
| b70ef01016850de87b9a28a6af19fed8801df076 |
|
25-Jun-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
EDAC: move MCE error descriptions to EDAC core
This is in preparation of adding AMD-specific MCE decoding functionality
to the EDAC core. The error decoding macros originate from the AMD64
EDAC driver albeit in a simplified and cleaned up version here.
While at it, add macros to generate the error description strings and
use them in the error type decoders directly which removes a bunch of
code and makes the decoding functions much more readable. Also, fix
strings and shorten macro names.
Remove superfluous htlink_msgs.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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| 37da045067b4e923190662e21029005ea53bfaa1 |
|
10-Jun-2009 |
Borislav Petkov <borislav.petkov@amd.com> |
amd64_edac: misc small cleanups
- cleanup debug calls
- shorten function names
- cleanup error exit paths
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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| 7d6034d3213e2dd1c0f8678e11064007413011c4 |
|
27-Apr-2009 |
Doug Thompson <dougthompson@xmission.com> |
amd64_edac: add module registration routines
Also, link into Kbuild by adding Kconfig and Makefile entries.
Borislav:
- Kconfig/Makefile splitting
- use zero-sized arrays for the sysfs attrs if not enabled
- rename sysfs attrs to more conform values
- shorten CONFIG_ names
- make multiple structure members assignment vertically aligned
- fix/cleanup comments
- fix function return value patterns
- fix err labels
- fix a memleak bug caught by Ingo
- remove the NUMA dependency and use num_k8_northbrides for initializing
a driver instance per NB.
- do not copy the pvt contents into the mci struct in
amd64_init_2nd_stage() and save it in the mci->pvt_info void ptr
instead.
- cleanup debug calls
- simplify amd64_setup_pci_device()
Reviewed-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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| f9431992b6227069bc54800d55531c6f78d276a7 |
|
27-Apr-2009 |
Doug Thompson <dougthompson@xmission.com> |
amd64_edac: add ECC reporting initializers
Borislav:
- convert to the new {rd|wr}msr_on_cpus interfaces.
- convert pvt->old_mcgctl to a bitmask thus saving some bytes
- fix/cleanup comments
- fix function return value patterns
- add a proper bugfix found by Doug to amd64_check_ecc_enabled where we
missed checking for the ECC enabled bit in NB CFG.
- cleanup debug calls
Reviewed-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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| cfe40fdb4a46a68e45fa9a5ecbe588e94b89b4f3 |
|
04-May-2009 |
Doug Thompson <dougthompson@xmission.com> |
amd64_edac: add driver header
Borislav:
- remove register bit descriptions (complete text in BKDG)
- cleanup and remove excessive/superfluous comments
Reviewed-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
|