8d7bb400638906075c38cb07891993cf95076aa7 |
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24-Jan-2012 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/pm: rework to allow selecting separate profiles for ac/battery Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
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a9bc247cbbc6310d2aefe4db0a6e92defde4426b |
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24-Jan-2012 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/pm: detect when we need dll disabled for gddr3 Fixes minor flickering on NVS295 when at perflvl 0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
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2d85bc8855d2734f5585861b261c5fe7a7ed92c1 |
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23-Jan-2012 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/pm: introduce ram reclocking helper This will probably result in more lines of code, however, we're going to have at least 3 slightly different implementations of this very soon and I'd rather keep the ram reclocking logic separate from the hw specifics. DDR2/DDR3/GDDR3 implemented thus far, others will be added as necessary. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
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fd99fd6100d3b7aaa8dc76888a38bbb15e8041bc |
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17-Jan-2012 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/pm: calculate memory timings at perflvl creation time Statically generating the PFB register and MR values for each timing set turns out to be insufficient. There's at least one (so far) known piece of information which effects MR values which is stored in the perflvl entry on some chipsets (and in another table on later ones), which is disconnected from the timing table entries. After this change we will generate a timing set based on an input clock frequency instead, and have this data stored in the performance level data. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
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045da4e55581d9b4de135bbdbdd1b7fa98dc18a9 |
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28-Oct-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nvc0/pm: initial engine reclocking Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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675aac033e089833e763ea4fbabae66883d10574 |
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21-Nov-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau: just pass gpio line to pwm_*, not entire gpio struct We don't need more than the line id to determine the PWM controller, and the GPIO interfaces are about to change somewhat. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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36f1317ed05f76bfafb442f70575cdaed6da2d8c |
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27-Oct-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv04-nv30/pm: port to newer interfaces Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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f3fbaf34e2b1459eab248c5f0180928e7861120b |
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26-Oct-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv50/pm: rewrite clock management, and switch to the new pm hooks This area is horrifically complicated on these chipsets, and it's likely we will need at least a few more tweaks yet. Oh yes, and it's completely disabled on IGPs for the moment. From traces, things look potentially different there yet again. Sigh... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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dd1da8de172057b36860f427777ecfa293bb8f6c |
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10-Jul-2011 |
Martin Peres <martin.peres@ensi-bourges.fr> |
drm/nouveau/pm: make clocks_set return an error code clocks_set can fail. Reporting an error is better than silently refusing to reclock. V2: Use the same logic on nv40 Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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693461801464eb65eb779261b3d9d80dc9131f81 |
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16-Sep-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv40/pm: convert to new pwm hooks, also fixing pwm type detection A NV49 appeared a while back that was using the "nv41 style" pwm registers, rather than the "nv40 style" ones my board is using. This disproves the previous theory that the pwm controller choice is chipset-specific. So, after looking at a bunch of vbios images it appears that the next viable theory is that we should select the pwm controller to use based on the gpio line the fan is tied to, just like we do on nv50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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5a4267ab14b392bdf43893c6175b045b5f85d53d |
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16-Sep-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv50/pm: convert to new fanspeed pwm controller hooks Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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cb9fa62671ace5ac40b9924e9014cebf04b78228 |
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13-Aug-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv50/pm: add support for pwm fan control Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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04de6a046188d86ff60b1ede974dbf580287fc98 |
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28-Jul-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv41/pm: implement a second type of fanspeed pwm Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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9232969e19ae7251a93ab72e405cf71e5109ec05 |
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28-Jul-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv40/pm: implement first type of pwm fanspeed funcs Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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1262a206da7d28340dfce954e31bd5fe5ae9e2dd |
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18-Jul-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv40/pm: write nv40-specific reclocking routines Not 100% perfect yet, but a good start towards what it'll look like in the end. Actually seems stable on a NV44 I have here, as much as running around OA for a fair amount of time constantly switching between performance levels can prove.. My NV49 isn't quite so happy, and semaphores mess up somehow (sometimes) as a result of the memory reclocking. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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354d0781e5cef1f227ee3064cb65053365177d3b |
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18-Jun-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nvc0/pm: initial implementation of clocks_get() Not too certain on memory clock yet, but it gets the right numbers for each perflvl on my NVC0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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ca94a71fc4d99c99871dfca528a88aab1557641c |
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17-Jun-2011 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nva3/pm: rewrite clock_set, and switch to new interfaces Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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fade7ad56d929e168ead0f75e591468afa2fe97c |
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27-Sep-2010 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nva3: split pm backend out from nv50 This will end up quite different, it makes sense for it to be completely separate. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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5c6dc6575460a0afe56d8cae7666e769e08ef942 |
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27-Sep-2010 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau: pass perflvl struct to clock_pre() On certain boards, there's BIOS scripts and memory timings that need to be modified with the memclk. Just pass in the entire perflvl struct and let the chipset-specific code decide what to do. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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7760fcb020b41352af4e675ce65a6aa0e93c170f |
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17-Sep-2010 |
Roy Spliet <r.spliet@student.tudelft.nl> |
drm/nouveau: Import initial memory timing work This isn't correct everywhere yet, but since we don't use the data yet it's perfectly safe to push in, and the information we gain from logs will help to fix the remaining issues. v2 (Ben Skeggs <bskeggs@redhat.com>): - fixed up formatting - free parsed timing info on takedown - switched timing table printout to debug loglevel Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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8155cac489eb8cc6fd96b9bdefacdf5a56e6ea32 |
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23-Sep-2010 |
Francisco Jerez <currojerez@riseup.net> |
drm/nouveau: Refactor nouveau_temp_get() into engine pointers. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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34e9d85a1aae28b090ec4e72a0f98a5483c198c4 |
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22-Sep-2010 |
Martin Peres <martin.peres@ensi-bourges.fr> |
drm/nouveau: Add temperature support (vbios parsing, readings, hwmon) Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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64f1c11a477cb76e1572ee0793234739e045b3d5 |
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17-Sep-2010 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau: restore perflvl on resume, and restore boot perflvl on unload Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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442b626ece6fbbe7f52c03a09f85ae5755f29eab |
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16-Sep-2010 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv04-nv40: import initial pm backend Currently just hooked up to the already-existing nouveau_hw, which should handle all relevant chipsets as well as we currently can. This will likely be eventually split out and improved into chipset specific code at a later point. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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02c30ca0a1d6d8b878fc32f47b3b25192ef4a8ef |
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16-Sep-2010 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nv50: import initial clock get/set routines + hook up pm engine This will make nouveau_pm attempt to report the card's current performance level both during bootup, and through sysfs. This is a very initial implementation, and can be improved a *lot* Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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330c5988ee78045e6a731c3693251aaa5b0d14e3 |
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16-Sep-2010 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau: import initial work on vbios performance table parsing Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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