d16ba207028eac4f38b908507d731ca894a91744 |
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05-Jun-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add new Trinity PCI ids commit d430f7dbf7bd6aaaa40c0660b3204df8cf07b22b upstream. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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d8d09befb4156f23d50a607c75e99dd06e8bccf8 |
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01-Jun-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: fix bank information in tiling config commit 29d654067a98c1cb8874c774e5fd799a038af8a6 upstream. While there are cards with more than 8 mem banks, the max number of banks from a tiling perspective is 8, so cap the tiling config at 8 banks. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=43448 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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772605e73b1f07be3736cc3fc0bc0ce0c56db773 |
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25-May-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: fix typo in trinity tiling setup commit 1f73cca799d29df80de3e8f1f1c488485467577a upstream. Using the wrong union. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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c420c7454f9c13d2dc706516d13fb9329ccacd05 |
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20-Mar-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add support for ucode loading on trinity (v2) v2: fix check for MC ucode from Tom. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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e71270fd80e99211a704c981c0f48d4e02a33473 |
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20-Mar-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms/vm: set vram base offset properly for TN Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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7b76e479e0f9d2f106bdf0686eff075837a6429a |
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20-Mar-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: cayman gpu init updates for trinity Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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f712812e1ba7f17a270f285c3e7e70c65186a8b4 |
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23-Feb-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: make ring_start, ring_test, and ib_test per ring Each ring type may need a different variant. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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27cd77694bfa2e123cb7440507f8ddd762de6c38 |
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23-Feb-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: reorganize copy callbacks tidy up the radeon_asic struct, handle multiple rings better. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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6b7746e8768e1c550b320d5af761f73e5aa37f76 |
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20-Feb-2012 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: properly set accel working flag and bailout when false If accel is not working many subsystem such as the ib pool might not be initialized properly that can lead to segfault inside kernel when cs ioctl is call with non working acceleration. To avoid this make sure the accel working flag is false when an error in GPU startup happen and return EBUSY from cs ioctl if accel is not working. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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11ef3f1f8780b64425a4cadbf42a46aa2e36895f |
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20-Jan-2012 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add some missing semaphore init Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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721604a15b934f0a8d1909acb8017f029128be2f |
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06-Jan-2012 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: GPU virtual memory support v22 Virtual address space are per drm client (opener of /dev/drm). Client are in charge of virtual address space, they need to map bo into it by calling DRM_RADEON_GEM_VA ioctl. First 16M of virtual address space is reserved by the kernel. Once using 2 level page table we should be able to have a small vram memory footprint for each pt (there would be one pt for all gart, one for all vram and then one first level for each virtual address space). Plan include using the sub allocator for a common vm page table area and using memcpy to copy vm page table in & out. Or use a gart object and copy things in & out using dma. v2: agd5f fixes: - Add vram base offset for vram pages. The GPU physical address of a vram page is FB_OFFSET + page offset. FB_OFFSET is 0 on discrete cards and the physical bus address of the stolen memory on integrated chips. - VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR covers all vmid's >= 1 v3: agd5f: - integrate with the semaphore/multi-ring stuff v4: - rebase on top ttm dma & multi-ring stuff - userspace is now in charge of the address space - no more specific cs vm ioctl, instead cs ioctl has a new chunk v5: - properly handle mem == NULL case from move_notify callback - fix the vm cleanup path v6: - fix update of page table to only happen on valid mem placement v7: - add tlb flush for each vm context - add flags to define mapping property (readable, writeable, snooped) - make ring id implicit from ib->fence->ring, up to each asic callback to then do ring specific scheduling if vm ib scheduling function v8: - add query for ib limit and kernel reserved virtual space - rename vm->size to max_pfn (maximum number of page) - update gem_va ioctl to also allow unmap operation - bump kernel version to allow userspace to query for vm support v9: - rebuild page table only when bind and incrementaly depending on bo referenced by cs and that have been moved - allow virtual address space to grow - use sa allocator for vram page table - return invalid when querying vm limit on non cayman GPU - dump vm fault register on lockup v10: agd5f: - Move the vm schedule_ib callback to a standalone function, remove the callback and use the existing ib_execute callback for VM IBs. v11: - rebase on top of lastest Linus v12: agd5f: - remove spurious backslash - set IB vm_id to 0 in radeon_ib_get() v13: agd5f: - fix handling of RADEON_CHUNK_ID_FLAGS v14: - fix va destruction - fix suspend resume - forbid bo to have several different va in same vm v15: - rebase v16: - cleanup left over of vm init/fini v17: agd5f: - cs checker v18: agd5f: - reworks the CS ioctl to better support multiple rings and VM. Rather than adding a new chunk id for VM, just re-use the IB chunk id and add a new flags for VM mode. Also define additional dwords for the flags chunk id to define the what ring we want to use (gfx, compute, uvd, etc.) and the priority. v19: - fix cs fini in weird case of no ib - semi working flush fix for ni - rebase on top of sa allocator changes v20: agd5f: - further CS ioctl cleanups from Christian's comments v21: agd5f: - integrate CS checker improvements v22: agd5f: - final cleanups for release, only allow VM CS on cayman Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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b15ba51207e54245409d6f46e20dab36f906eed1 |
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15-Nov-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: introduce a sub allocator and convert ib pool to it v4 Somewhat specializaed sub-allocator designed to perform sub-allocation for command buffer not only for current cs ioctl but for future command submission ioctl as well. Patch also convert current ib pool to use the sub allocator. Idea is that ib poll buffer can be share with other command buffer submission not having 64K granularity. v2 Harmonize pool handling and add suspend/resume callback to pin/unpin sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman, rs480, rs690, rs880) v3 Simplify allocator v4 Fix radeon_ib_get error path to properly free fence Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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1b37078b7ddf35cab12ac6544187e3636d50c0dc |
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18-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add support for per-ring fence interrupts Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
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b40e7e1608c332767e6b94bed7af84b30418e739 |
|
17-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add cayman specific fence_ring_emit cayman is wb only and doesn't have a VC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
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78c5560a08114d7bbbce04cee1628049a22ea104 |
|
17-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add some new ring params to better handle other ring types Some rptr/wptrs fields have different offsets and not all rings are pm4 so add a new nop field. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
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30eb77f4e6ba20f797af4ff79807fae7cb67429e |
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20-Nov-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon: precompute fence cpu/gpu addr once v3 Add a start fence driver helper function which will be call once for each ring and will compute cpu/gpu addr for fence depending on wether to use wb buffer or scratch reg. This patch replace initialize fence driver separately which was broken in regard of GPU lockup. The fence list for created, emited, signaled must be initialize once and only from the asic init callback not from the startup call back which is call from the gpu reset. v2: With this in place we no longer need to know the number of rings in fence_driver_init, also writing to the scratch reg before knowing its offset is a bad idea. v3: rebase on top of change to previous patch in the serie Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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e32eb50dbe43862606a51caa94368ec6bd019434 |
|
23-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: rename struct radeon_cp to radeon_ring That naming seems to make more sense, since we not only want to run PM4 rings with it. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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d6d2730c71a5d41a121a7b567bf7ff9c5d4cd3ab |
|
20-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: disable compute rings on cayman for now Disable the additional compute rings on cayman until their setup is fully implemented. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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bf85279958da96cb4b11aac89b34f0424c3c120e |
|
13-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make cp variable an array Replace cp, cp1 and cp2 members with just an array of radeon_cp structs. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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5596a9db156107b01ceb7db4d50cc091117da627 |
|
13-Oct-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make ring rptr and wptr register offsets variable Every ring seems to have the concept of read and write pointers. Make the register offset variable so we can use the functions for different types of rings. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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7b1f2485db253aaa0081e1c5213533e166130732 |
|
23-Sep-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon: make all functions work with multiple rings. Give all asic and radeon_ring_* functions a radeon_cp parameter, so they know the ring to work with. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
15d3332f31afd571a6d23971dbc8d8db2856e661 |
|
15-Sep-2011 |
Christian König <deathsimple@vodafone.de> |
drm/radeon/kms: add support for semaphores v3 They are used to sync between rings, while fences sync between a ring and the cpu. v2 Fix radeon_semaphore_driver_fini when no semaphore were allocated. v3 Initialize list early on to avoid issue in case or early error Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
7465280c076d6440e5908c158c83b542dc063a30 |
|
25-Aug-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add support for multiple fence queues v2 For supporting multiple CP ring buffers, async DMA engines and UVD. We still need a way to synchronize between engines. v2 initialize unused fence driver ring to avoid issue in suspend/unload Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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c9a1be96277b3b2d2e8aff2ba69d7817ea8e46c9 |
|
03-Nov-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: consolidate GART code, fix segfault after GPU lockup V2 After GPU lockup VRAM gart table is unpinned and thus its pointer becomes unvalid. This patch move the unpin code to a common helper function and set pointer to NULL so that page update code can check if it should update GPU page table or not. That way bo still bound to GART can be unbound (pci_unmap_page for all there page) properly while there is no need to update the GPU page table. V2 move the test for null gart out of the loop, small optimization Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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0e2c978ef2248156f36db7fcda8c7b67998ec58a |
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02-Nov-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: don't poll forever if MC GDDR link training fails Bail if we hit the timeout limit. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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16cdf04d30c24a6e698863351c11d9a8da2591ed |
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28-Oct-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: allocate vram scratch page on 6xx+ The vram scratch was originally only used on some 7xx asics to work around a hw bug. Allocate the scratch page on all 6xx+ radeons and set the MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR to point to it. We shouldn't ever hit it since we limit the system aperture to vram or vram and AGP, but better safe than sorry. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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e0cd3608135b2ed8eddbe3fdf048d22e0593d836 |
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30-Aug-2011 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
gpu: add module.h to drivers/gpu files as required. So that we don't get build failures once the implicit module.h presence is removed. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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6ddddfe7341a6fa2db22d63084bfb1df9cce0724 |
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14-Oct-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: make r600-NI blit suspend code common r600-NI shared the same blit suspend code. Clean it up and make it a shared function. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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fb3d9e97e1ad5f2c19b68fe5a0c6a95bf57c65c3 |
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13-Oct-2011 |
Ilija Hadzic <ihadzic@research.bell-labs.com> |
drm/radeon/kms: blit code commoning factor out most of evergreen blit code and use the refactored code from r600 that is now common for both r600 and evergreen Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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b07759bf41d52aaecd5de92c7d725d6834b23349 |
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20-Sep-2011 |
Ilija Hadzic <ihadzic@research.bell-labs.com> |
drm/radeon: allow pcie gen2 speed on Cayman Looks like the same pcie gen2 speed initialization for Evergreen also works on Cayman and seems to come up fine, so enable it if the module parameter says so Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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12d5180bd7e683a4ae80830b82ba67e7b7fac7b2 |
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04-Oct-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: fix channel_remap setup (v2) Most asics just use the hw default value which requires no explicit programming. For those that need a different value, the vbios will program it properly. As such, there's no need to program these registers explicitly in the driver. Changing MC_SHARED_CHREMAP requires a reload of all data in vram otherwise its contents will be scambled. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=40103 v2: drop now unused channel_remap functions. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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87463ff83bcda210d8f0ae440bd64d1548f852e7 |
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13-Sep-2011 |
Michel Dänzer <michel.daenzer@amd.com> |
drm/radeon: Don't read from CP ring write pointer registers. Apparently this doesn't always work reliably, e.g. at resume time. Just initialize to 0, so the ring is considered empty. Tested with hibernation on Sumo and Cayman cards. Should fix https://bugs.launchpad.net/ubuntu/+source/linux/+bug/820746/ . Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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fcf4de5acf09889e3f0c131ebe385c983006d71b |
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31-Aug-2011 |
Tormod Volden <debian.tormod@gmail.com> |
drm/radeon: Print gart initialization details on all chipsets This was previously done for r300 only. Use %016llX instead of %08X for printing the table address. Also fix typos in gart warning messages. Signed-off-by: Tormod Volden <debian.tormod@gmail.com> Reviewed-by: Michel Dänzer <michel@daenzer.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
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d054ac16eeb658bccadb06b12c39cee22243b10f |
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01-Sep-2011 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: make sure pci max read request size is valid on evergreen+ (v2) If the bios or OS sets the pci max read request size to 0 or an invalid value (6,7), it can result in a hang or slowdown. Check and set it to something sane if it's invalid. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=42162 v2: use pci reg defines from include/linux/pci_regs.h Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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a49a50dad48586d42ebac1a6730c3a3cd5603421 |
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24-Aug-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: evergreen & ni reset SPI block on CP resume For some reason SPI block is in broken state after module unloading. This lead to broken rendering after reloading module. Fix this by reseting SPI block in CP resume function Signed-off-by: Jerome Glisse <jglisse@redhat.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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e55b9422e186d208f162f056ee28b6eb6b9b81a9 |
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15-Jul-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add info query for backend map The 3D driver need to get the pipe to backend map to certain things. Add a query to get the info. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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ccd6895d401efad0c0e41d0e93fba4ef3085e268 |
|
06-Jul-2011 |
Jerome Glisse <jglisse@redhat.com> |
drm/radeon/kms: free ib pool on module unloading ib pool weren't free for various newer asic on module unload. This doesn't cause much arm but still could be candidate for stable. Signed-off-by: Jerome Glisse <jglisse@redhat.com> cc: stable@kernel.org Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
cb92d452ba665205ad6bfb424c0ef009cf26587d |
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25-May-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add blit support for cayman (v2) Allows us to use the 3D engine for memory management and allows us to use vram beyond the BAR aperture. v2: fix copy paste typo Reported-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
|
cde5083b051e9c66c99a8764aefbc13349e7730d |
|
19-May-2011 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: fix tile_config value reported to userspace on cayman. cayman is reporting the wrong tile config value to userspace, this causes piglit mipmap generation tests to fail. Reviewed-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
|
c289cff10a265ec4afe4396425297ff979a840b5 |
|
19-May-2011 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/kms: fix incorrect comparison in cayman setup code. This was leading to a bogus value being programmed to the backend routing register. Reviewed-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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0b65f83f9d2fab47b9b6040fe75fc2cfc73032d4 |
|
19-May-2011 |
Dave Airlie <airlied@redhat.com> |
drm/radeon/cayman: setup hdp to invalidate and flush when asked On cayman we need to set the bit to cause HDP flushes to invalidate the HDP cache also. Reviewed-by: Alex Deucher <alexdeucher@gmail.com> cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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1f03128251b77bfc68d1578a4f11316eb3806238 |
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10-May-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: fix cayman acceleration The TCC disable setup was incorrect. This prevents the GPU from hanging when draw commands are issued. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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285e042dcd9fe9a9b7fbfdc215e4d076791ded8e |
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09-May-2011 |
Dave Airlie <airlied@redhat.com> |
drm/radeon: fix cayman struct accessors. We are accessing totally the wrong struct in this case, and putting uninitialised values into the GPU, which it doesn't like unsurprisingly. Signed-off-by: Dave Airlie <airlied@redhat.com>
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9b91d18d20fbd3e907cee71d1acaba7943de887a |
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03-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/cayman: always set certain VGT regs at CP init These should be handled by the clear_state setup, but set them directly as well just to be sure. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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755d819e0cf2e09e0958c77b72aa3ce2142411c2 |
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03-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms/cayman: add asic init/startup/fini/suspend/resume functions Cayman is different enough from evergreen to warrant it's own functions. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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b9952a8ae5814b0ef2a6596c7443efd85b92e069 |
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03-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add cayman asic reset support Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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0c88a02ef6b7e29a811f0d56367cc2268c4ef433 |
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03-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add support for CP setup on cayman asics Cayman asics have 3 ring buffers: ring 0 supports both gfx and compute rings 1 and 2 are compute only At the moment we only support ring 0. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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fa8198eac871edef38e969e2c6a68649e0cd36e0 |
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03-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add support for cayman gart setup This patch sets up the gart in legacy mode. We probably want to switch to full VM mode at some point. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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fecf1d072f96114266ed3aae8c4fb93f9c179b00 |
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03-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add gpu_init function for cayman This may some work to get accel going. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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9b8253ce204ad9fcd2aec315066492dfbc73e409 |
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03-Mar-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add ucode loader for cayman The MC ucode is no longer loaded by the vbios tables as on previous asics. It now must be loaded by the driver. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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0af62b0168043896a042b005ff88caa77dd94d04 |
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07-Jan-2011 |
Alex Deucher <alexdeucher@gmail.com> |
drm/radeon/kms: add ucode loader for NI The MC ucode is no longer loaded by the vbios tables as on previous asics. It now must be loaded by the driver. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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