| 6a918bade9dab40aaef80559bd1169c69e8d69cb |
|
11-Mar-2012 |
Mike Dunn <mikedunn@newsguy.com> |
mtd: flash drivers set ecc strength
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the
maximum number of bit errors that can be corrected in one writesize region.
Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl,
which is the maximum number of bit errors that can be corrected in one ecc step.
Nand infrastructure code translates this to 'ecc_strength'.
Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc
modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the
driver for all other modes.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 42d7fbe223ab878b23de9e3b0166f8cd665a2aa5 |
|
09-Mar-2012 |
Artem Bityutskiy <artem.bityutskiy@linux.intel.com> |
mtd: do not use plain 0 as NULL
The first 3 arguments of 'mtd_device_parse_register()' are pointers,
but many callers pass '0' instead of 'NULL'. Fix this globally. Thanks
to coccinelle for making it easy to do with the following semantic patch:
@@
expression mtd, types, parser_data, parts, nr_parts;
@@
(
-mtd_device_parse_register(mtd, 0, parser_data, parts, nr_parts)
+mtd_device_parse_register(mtd, NULL, parser_data, parts, nr_parts)
|
-mtd_device_parse_register(mtd, types, 0, parts, nr_parts)
+mtd_device_parse_register(mtd, types, NULL, parts, nr_parts)
|
-mtd_device_parse_register(mtd, types, parser_data, 0, nr_parts)
+mtd_device_parse_register(mtd, types, parser_data, NULL, nr_parts)
)
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 47882d78250a8b92a9837d14bab32915622a9f12 |
|
04-Dec-2011 |
Heiko Schocher <hs@denx.de> |
mtd: davinci: if no amif timing is passed, don; t setup cscfg register
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 5b55b1eb21a5aba9c6cf4e0325ac9e4dffa89435 |
|
02-Jun-2011 |
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> |
mtd: davinci_nand.c: use mtd_device_parse_register
Replace custom invocations of parse_mtd_partitions and mtd_device_register
with common mtd_device_parse_register call. This would bring: standard
handling of all errors, fallback to default partitions, etc.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
|
| 3b36013cf9cc1a1da93ad6bb8f6d3b0221f67e42 |
|
08-Jun-2011 |
Axel Lin <axel.lin@gmail.com> |
mtd: davinci_nand: remove redundant mtd_device_unregister
mtd_device_unregister is done in nand_release(),
thus no need to call it in nand_davinci_remove().
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
|
| 4e243a04c39b009e42ff4a4682ed47b850997dc1 |
|
29-May-2011 |
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> |
mtd: davinci_nand don't specify default parsing options
Since 'cmdline, NULL' is now a default for parse_mtd_partitions, don't specify
this in every driver, instead pass NULL to force parse_mtd_partitions
to use default.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
|
| bb9ebd4e714385a2592a482845865ef2d58b2868 |
|
01-Jun-2011 |
Brian Norris <computersforpeace@gmail.com> |
mtd: nand: rename NAND_USE_FLASH_BBT
Recall the recently added prefix requirements:
* "NAND_" for flags in nand.h, used in nand_chip.options
* "NAND_BBT_" for flags in bbm.h, used in nand_chip.bbt_options
or in nand_bbt_descr.options
Thus, I am changing NAND_USE_FLASH_BBT to NAND_BBT_USE_FLASH.
Again, this flag is found in bbm.h and so should NOT be used in the
"nand_chip.options" field.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
|
| a40f73419f02e40555f692785ea1c1813d5b4c12 |
|
01-Jun-2011 |
Brian Norris <computersforpeace@gmail.com> |
mtd: nand: consolidate redundant flash-based BBT flags
This patch works with the following three flags from two headers (nand.h
and bbm.h):
(1) NAND_USE_FLASH_BBT (nand.h)
(2) NAND_USE_FLASH_BBT_NO_OOB (nand.h)
(3) NAND_BBT_NO_OOB (bbm.h)
These flags are all related and interdependent, yet they were in
different headers. Flag (2) is simply the combination of (1) and (3) and
can be eliminated.
This patch accomplishes the following:
* eliminate NAND_USE_FLASH_BBT_NO_OOB (i.e., flag (2))
* move NAND_USE_FLASH_BBT (i.e., flag (1)) to bbm.h
It's important to note that because (1) and (3) are now both found in
bbm.h, they should NOT be used in the "nand_chip.options" field.
I removed a small section from the mtdnand DocBook because it referes to
NAND_USE_FLASH_BBT in nand.h, which has been moved to bbm.h.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
|
| 098771158813fb391dd6c1c8b907599db91fb0c7 |
|
23-May-2011 |
Jamie Iles <jamie@jamieiles.com> |
mtd: davinci_nand: convert to mtd_device_register()
Convert to mtd_device_register() and remove the check for
mtd_has_partitions() as partitioning is always available.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| f43272c482661bc88347bba237976eecfc1dbf5b |
|
07-Mar-2011 |
Sandeep Paulraj <s-paulraj@ti.com> |
mtd: DaVinci: Removed header file that is not required
The DaVinci NAND driver was including the mach-types.h header
file.
This prevented the DaVinci NAND driver from getting used
in a DSP only device. The linux port on c6x devices can make
use of the same driver and does not define a corresponding
header file.
This header file was required in the driver because earlier there was code
dependent on a machine_* check. This piece of code has now been factored out
and is in arch/arm/mach-davinci/aemif.c
Thus removing the header file is harmless
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 2bdb053a8119355eada46dfab88782449a26b39d |
|
03-Sep-2010 |
Wolfram Sang <w.sang@pengutronix.de> |
mtd: davinci: relax a timeout for ECC-initialization
Sudhakar found out that 100µs are enough. Sadly, his updated patch was
overlooked and an older version still using 100ms was merged. Fix this.
Reference: http://patchwork.ozlabs.org/patch/59180/
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| eea116ed0497dc9c4a981b8c7017d758fc835ded |
|
25-Aug-2010 |
Wolfram Sang <w.sang@pengutronix.de> |
mtd: davinci: fix comment to match the code
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| cc26c3cd3d1cf40a07f2b19ac4c53d517bee52a5 |
|
25-Aug-2010 |
Brian Norris <computersforpeace@gmail.com> |
mtd: nand: expand nand_ecc_layout, deprecate ioctl ECCGETLAYOUT
struct nand_ecclayout is too small for many new chips; OOB regions can be as
large as 448 bytes and may increase more in the future. Thus, copying that
struct to user-space with the ECCGETLAYOUT ioctl is not a good idea; the ioctl
would have to be updated every time there's a change to the current largest
size.
Instead, the old nand_ecclayout is renamed to nand_ecclayout_user and a
new struct nand_ecclayout is created that can accomodate larger sizes and
expand without affecting the user-space. struct nand_ecclayout can still
be used in board drivers without modification -- at least for now.
A new function is provided to convert from the new to the old in order to
allow the deprecated ioctl to continue to work with truncated data. Perhaps
the ioctl, the conversion process, and the struct nand_ecclayout_user can be
removed altogether in the future.
Note: There are comments in nand/davinci_nand.c::nand_davinci_probe()
regarding this issue; this driver (and maybe others) can be updated to
account for extra space. All kernel drivers can use the expanded
nand_ecclayout as a drop-in replacement and ignore its benefits.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| a88dbc5bfdd26132bbf0ad19dd672e036971d74d |
|
09-Aug-2010 |
Sekhar Nori <nsekhar@ti.com> |
nand: davinci: add support for timing configuration
This patch modifies the DaVinci NAND driver to use the
new AEMIF timing setup API to configure the NAND access
timings.
Earlier, AEMIF configuration was being done as a special
case for DM644x board, but now more boards emerge which have
capability to boot for other media (SPI flash, NOR flash) and
have the kernel access NAND flash. This means that kernel cannot
always depend on the bootloader to setup the NAND.
Also, on platforms such as da850/omap-l138, the aemif input
frequency changes as cpu frequency changes; necessiating
re-calculation of timimg values as part of cpufreq transtitions.
This patch forms the basis for adding that support.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
|
| 8060ef4da9e73f461adf2ba1922ea5400a61cf98 |
|
09-Aug-2010 |
Sekhar Nori <nsekhar@ti.com> |
davinci: add support for aemif timing configuration
This patch adds support to configure the AEMIF interface
with supplied timing values.
Since this capability is useful both from NOR and NAND
flashes, it is provided as a new interface and in a file
of its own.
AEMIF timing configuration is required in cases:
1) Where the AEMIF clock rate can change at runtime (a side
affect of cpu frequency change).
2) Where U-Boot does not support NAND/NOR but supports other
media like SPI Flash or MMC/SD and thus does not care about
setting up the AEMIF timing for kernel to use.
3) Where U-Boot just hasn't configured the timing values and
cannot be upgraded because the box is already in the field.
Since there is now a header file for AEMIF interface, the
common (non-NAND specific) defines for AEMIF registers have
been moved from nand.h into the newly created aemif.h
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
|
| 1c3275b656045aff9a75bb2c9f3251af1043ebb3 |
|
21-Jul-2010 |
Sudhakar Rajashekhara <sudhakar.raj@ti.com> |
mtd: nand: davinci: correct 4-bit error correction
On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after setting the
4BITECC_ADD_CALC_START bit in the NAND Flash control register to 1 and
before waiting for the NAND Flash status register to be equal to 1, 2 or
3, we have to wait till the ECC HW goes to correction state. Without this
wait, ECC correction calculations will not be proper.
This has been tested on DA830/OMAP-L137, DA850/OMAP-L138, DM355 and DM365
EVMs.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 5a0e3ad6af8660be21ca98a971cd00f331318c05 |
|
24-Mar-2010 |
Tejun Heo <tj@kernel.org> |
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
|
| 5e81e88a4c140586d9212999cea683bcd66a15c6 |
|
26-Feb-2010 |
David Woodhouse <David.Woodhouse@intel.com> |
mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| d8bc55553c416c877267c1efd65b099164acbe3f |
|
14-Dec-2009 |
H Hartley Sweeten <hartleys@visionengravers.com> |
mtd: davinci_nand.c: use resource_size()
The ioremap'ed sizes are off by 1; use resource_size() for correct value.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| f611a79fe9859a30f2a7ae94b4d24f8e2dd75c91 |
|
13-Oct-2009 |
Mark A. Greer <mgreer@mvista.com> |
mtd: Add bad block table overrides to Davinci NAND driver
The existing NAND infrastructure allows the default main and
mirror bad block tables to be overridden in nand_default_bbt().
However, the davinci_nand driver does not support this. Add
that support by adding fields to the davinci driver's platform
data so platform code can pass in their own bbt's and make the
davinci_nand driver honor them.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 5cd0be8ec946ee3901e7f651a795225c6badff8f |
|
01-Oct-2009 |
Hemant Pedanekar <hemantp@ti.com> |
mtd: nand: davinci: fix to use mask_ale from pdata
Correct typo to use mask_ale from platform data when set to non-zero.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| f12a9473283e68ae708e9ada37cb352ea2652397 |
|
18-Sep-2009 |
Sneha Narnakaje <nsnehaprabha@ti.com> |
mtd: nand: DaVinci: Add 4-bit ECC support for large page NAND chips
This patch adds 4-bit ECC support for large page NAND chips using the new
ECC mode NAND_ECC_HW_OOB_FIRST. The platform data from board-dm355-evm
has been adjusted to use this mode.
The patches have been verified on DM355 device with 2KiB-page Micron
devices using mtd-tests and JFFS2. Error correction up to 4 bits has
also been verified using nandwrite/nanddump utilities.
Reviewed-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| cd24f8c1e7e27a2c6051a9a338d4704a2431dbf0 |
|
05-Jun-2009 |
Kevin Hilman <khilman@deeprootsystems.com> |
mtd: davinci nand: update clock naming
DaVinci clock support has been updated in mainline.
Update clock names accordingly.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| f19e8999a5631e3af0e1ca5127af80a25aba1fd7 |
|
13-May-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
mtd: davinci_nand: cmdlinepart uses MTD IDs
Remove some legacy code from the davinci_nand driver, which made
cmdlinepart ignore the the MTD ID passed to it. Boards can have
multiple NAND chips, and some do (like the DM357 EVM), so this
dated hack is undesirable.
Correct labels are like "davinci_nand.0" (for chipselect 0).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 6a4123e581b3112ff4ea7439ab9ae5cb271a9dbd |
|
22-Apr-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
mtd: nand: davinci_nand, 4-bit ECC for smallpage
Minimal support for the 4-bit ECC engine found on DM355, DM365,
DA830/OMAP-L137, and similar recent DaVinci-family chips.
This is limited to small-page flash for now; there are some page
layout issues for large page chips. Note that most boards using
this engine (like the DM355 EVM) include 2GiB large page chips.
Sanity tested on DM355 EVM after swapping the socketed NAND for
a small-page one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 533a0149148ccaa0199a1ee6492cd860e3c8b456 |
|
22-Apr-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
mtd: nand: minor davinci_nand cleanup
Make the DaVinci NAND driver require platform_data with
board-specific configuration. We can't actually do any
kind of sane job of configuring it otherwise.
Also fix the comment about picking the "best" ECC mode.
We can't do those any more; that relied on knowing what kind
of CPU we're using (they don't all support 4-bit ECC), and
current policy is that drivers not have cpu_is_*() checks.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| 87f39f0493edf7051b1b87c6e9eb7f9a74be8e85 |
|
26-Mar-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
[MTD] support driver model updates
Follow-on patch to the previous driver model patch for the MTD
framework. This one makes various MTD drivers connect to the
driver model tree, so /sys/devices/virtual/mtd/* nodes are no
longer present ... mostly drivers used on boards I have handy.
Based on a patch from Kay Sievers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| a4b6d516a6079c6ba8dc97d185371439035a35d0 |
|
04-Mar-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
[MTD] partitioning utility predicates
Move mtd_has_partitions() and mtd_has_cmdlinepart() inlines from a
DaVinci-specific driver to the <linux/mtd/partitions.h> header.
Use those to eliminate #ifdefs in two drivers which had their own
definitions of mtd_has_partitions().
Quite a lot of other MTD drivers could benefit from using use one or both
of these to remove #ifdeffery. Maybe some Janitors would like to help.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
| d5e539ad7d8305f12d04b4a278f8cf791e3de4db |
|
04-Mar-2009 |
Kevin Hilman <khilman@deeprootsystems.com> |
[MTD] [NAND] davinci: drop usage of cpu_is_* macro
Usage of davinci-specific cpu_is macros is not allowed in drivers.
These options should be passed in through platform_data.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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| ff4569c752c577c7e71e03c9d59e6ef85ca763c0 |
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04-Mar-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
[MTD] [NAND] davinci_nand driver
This is a device driver for the NAND flash controller found on the various
DaVinci family chips. It handles up to four SoC chipselects, and some
flavors of secondary chipselect (e.g. based on upper bits of the address
bus) as used with some multichip packages. (Including the 2 GiB chips
used on some TI devel boards.)
The 1-bit ECC hardware is supported (3 bytes ECC per 512 bytes data); but
not yet the newer 4-bit ECC (10 bytes ECC per 512 bytes data), as
available on chips like the DM355 or OMAP-L137 and needed with the more
error-prone MLC NAND chips.
This is a cleaned-up version of code that's been in use for several years
now; sanity checked with the new drivers/mtd/tests.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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