| 90ab5ee94171b3e28de6bb42ee30b527014e0be7 |
|
13-Jan-2012 |
Rusty Russell <rusty@rustcorp.com.au> |
module_param: make bool parameters really bool (drivers & misc)
module_param(bool) used to counter-intuitively take an int. In
fddd5201 (mid-2009) we allowed bool or int/unsigned int using a messy
trick.
It's time to remove the int/unsigned int option. For this version
it'll simply give a warning, but it'll break next kernel version.
Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 0918472ceeffad234df5589e45b646a94476f835 |
|
17-May-2011 |
Huang Ying <ying.huang@intel.com> |
PCI: PCIe AER: add aer_recover_queue
In addition to native PCIe AER, now APEI (ACPI Platform Error
Interface) GHES (Generic Hardware Error Source) can be used to report
PCIe AER errors too. To add support to APEI GHES PCIe AER recovery,
aer_recover_queue is added to export the recovery function in native
PCIe AER driver.
Recoverable PCIe AER errors are reported via NMI in APEI GHES. Then
APEI GHES uses irq_work to delay the error processing into an IRQ
handler. But PCIe AER recovery can be very time-consuming, so
aer_recover_queue, which can be used in IRQ handler, delays the real
recovery action into the process context, that is, work queue.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 50c1126ee1990920705a067a6f3f9bb892369b08 |
|
03-Aug-2010 |
Bill Pemberton <wfp5p@virginia.edu> |
PCI: aerdrv: fix uninitialized variable warning
quiet the warning about use of uninitialized e_src in
aer_isr() e_src is initialized by get_e_source()
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 28eb5f274a305bf3a13b2c80c4804d4515d05c64 |
|
21-Aug-2010 |
Rafael J. Wysocki <rjw@sisk.pl> |
PCI: PCIe: Ask BIOS for control of all native services at once
After commit 852972acff8f10f3a15679be2059bb94916cba5d (ACPI: Disable
ASPM if the platform won't provide _OSC control for PCIe) control of
the PCIe Capability Structure is unconditionally requested by
acpi_pci_root_add(), which in principle may cause problems to
happen in two ways. First, the BIOS may refuse to give control of
the PCIe Capability Structure if it is not asked for any of the
_OSC features depending on it at the same time. Second, the BIOS may
assume that control of the _OSC features depending on the PCIe
Capability Structure will be requested in the future and may behave
incorrectly if that doesn't happen. For this reason, control of
the PCIe Capability Structure should always be requested along with
control of any other _OSC features that may depend on it (ie. PCIe
native PME, PCIe native hot-plug, PCIe AER).
Rework the PCIe port driver so that (1) it checks which native PCIe
port services can be enabled, according to the BIOS, and (2) it
requests control of all these services simultaneously. In
particular, this causes pcie_portdrv_probe() to fail if the BIOS
refuses to grant control of the PCIe Capability Structure, which
means that no native PCIe port services can be enabled for the PCIe
Root Complex the given port belongs to. If that happens, ASPM is
disabled to avoid problems with mishandling it by the part of the
PCIe hierarchy for which control of the PCIe Capability Structure
has not been received.
Make it possible to override this behavior using 'pcie_ports=native'
(use the PCIe native services regardless of the BIOS response to the
control request), or 'pcie_ports=compat' (do not use the PCIe native
services at all).
Accordingly, rework the existing PCIe port service drivers so that
they don't request control of the services directly.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| f6735590e9f441762ab5afeff64ded99e5b19a68 |
|
27-May-2010 |
Linus Torvalds <torvalds@linux-foundation.org> |
PCI aerdrv: fix annoying warnings
Some compiler generates following warnings:
In function 'aer_isr':
warning: 'e_src.id' may be used uninitialized in this function
warning: 'e_src.status' may be used uninitialized in this function
Avoid status flag "int ret" and return constants instead, so that
gcc sees the return value matching "it is initialized" better.
Acked-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 9a90e09854a3c7cc603ab8fc9163f77bb1f66cfa |
|
28-May-2010 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6: (27 commits)
ACPI: Don't let acpi_pad needlessly mark TSC unstable
drivers/acpi/sleep.h: Checkpatch cleanup
ACPI: Minor cleanup eliminating redundant PMTIMER_TICKS to NS conversion
ACPI: delete unused c-state promotion/demotion data strucutures
ACPI: video: fix acpi_backlight=video
ACPI: EC: Use kmemdup
drivers/acpi: use kasprintf
ACPI, APEI, EINJ injection parameters support
Add x64 support to debugfs
ACPI, APEI, Use ERST for persistent storage of MCE
ACPI, APEI, Error Record Serialization Table (ERST) support
ACPI, APEI, Generic Hardware Error Source memory error support
ACPI, APEI, UEFI Common Platform Error Record (CPER) header
Unified UUID/GUID definition
ACPI Hardware Error Device (PNP0C33) support
ACPI, APEI, PCIE AER, use general HEST table parsing in AER firmware_first setup
ACPI, APEI, Document for APEI
ACPI, APEI, EINJ support
ACPI, APEI, HEST table parsing
ACPI, APEI, APEI supporting infrastructure
...
|
| affb72c3a8984ba55e055b0a0228c3ea1a056758 |
|
18-May-2010 |
Huang Ying <ying.huang@intel.com> |
ACPI, APEI, PCIE AER, use general HEST table parsing in AER firmware_first setup
Now, a dedicated HEST tabling parsing code is used for PCIE AER
firmware_first setup. It is rebased on general HEST tabling parsing
code of APEI. The firmware_first setup code is moved from PCI core to
AER driver too, because it is only AER related.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Len Brown <len.brown@intel.com>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| caa5afbd4831c649b951ae1227a7985f47547e31 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: trivial cleanup for aerdrv_core.c
Style cleanup for pci_{en,dis}able_pcie_error_reporting().
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 89713422a768458a0d375f0c2f3586cd5ccde6a1 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: introduce default_downstream_reset_link
I noticed that when I inject a fatal error to an endpoint via
aer-inject, aer_root_reset() is called as reset_link for a
downstream port at upstream of the endpoint:
pcieport 0000:00:06.0: AER: Uncorrected (Fatal) error received: id=5401
:
pcieport 0000:52:02.0: Root Port link has been reset
It externally appears to be working, but internally issues some
accesses to PCI_ERR_ROOT_COMMAND/STATUS registers that is for
root port so not available on downstream port.
This patch introduces default_downstream_reset_link that is
a version of aer_root_reset() with no accesses to root port's
register. It is used for downstream ports that has no reset_link
function its specific.
This patch also updates related description in pcieaer-howto.txt.
Some minor fixes are included.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 517cae3829ae8cc3033c24f60e64eb251b2f0d14 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: rework find_aer_service
The structure find_aer_service_data is no longer useful.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Reviewed-by: Jin Dongming <jin.dongming@np.css.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 4f7ccf6a6085eefd2517b8c7090608c64b01ab67 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: remove is_downstream
The pcie->port of port service device points the port associated
the service with. The find_aer_service iterates over children of
given port udev.
So it is clear that the pcie->port of port service of given port
udev must always point the udev.
Therefore we can know the type of udev without checking its children.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 17e21854bd59862f4ee47d1c7e828549f782711b |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: rework do_recovery
Move dev_printks for debug into do_recovery().
This allows do_recovery() to return void.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 88da13bfabbffb8f89574eb168b9da9a0abc693f |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: rework get_e_source()
Current get_e_source() returns pointer to an element of array.
However since it also progress consume counter, it is possible
that the element is overwritten by newly produced data before
the element is really consumed.
This patch changes get_e_source() to copy contents of the element
to address pointed by its caller. Once copied the element in
array can be consumed.
And relocate this function to more innocuous place.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 7c4ec94f72cefec1c1b42219469794a34864a1ee |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: rework aer_isr_one_error()
Divide tricky for-loop into readable if-blocks.
The logic to set multi_error_valid (to force walking pci bus
hierarchy to find 2nd~ error devices) is changed too, to check
MULTI_{,_UN}COR_RCV bit individually and to force walk only when
it is required.
And rework setting e_info->severity for uncorrectable, not to use
magic numbers.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 4a0c096efd4383fc98aa40e195363f600ba814f8 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: rework add_error_device
Stop iteration if we cannot register any more.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| bd17d4742d5a8cbedd41a1d44c0cdee84a532363 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: remove compare_device_id
Inline too-simple subroutine only used here.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| c887275e6a5b857b72c798e4a6019160a860e2ef |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: introduce is_error_source
Take core part of find_device_iter() to make a new function
is_error_source() that checks given device has report an error
or not.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 98ca3964fe8da0d742331af80952443af5cff464 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: rework find_source_device
Return bool to indicate that the source device is found or not.
This allows us to skip calling aer_process_err_devices() if we can.
And move dev_printk for debug into this function.
v2: return bool instead of int
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 843f4697eea576c24f057bbdb199115bbb6b10bc |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: make aer_{en,dis}able_rootport static
These functions are only called from init/remove path of aerdrv,
so move them from aerdrv_core.c to aerdrv.c, to make them static.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 460d298d521910483dcdc09920ca4c4a63b16730 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: cleanup inconsistent functions
This cleanup solves some minor naming issues by removing unuseful
function aer_delete_rootport() and by renaming disable_root_aer()
to aer_disable_rootport().
- Inconsistent location of alloc & free:
The struct rpc is allocated in aer_alloc_rpc() at aerdrv.c
while it is implicitly freed in aer_delete_rootport() at
aerdrv_core.c.
- Inconsistent function name:
It makes a bit confusion that aer_delete_rootport() is seemed
to be paired with aer_enable_rootport(), i.e. there is neither
"add" against "delete" nor "disable" against "enable".
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| c6d34eddecb34fd84f9fb2ea26a63cfde5662f49 |
|
15-Apr-2010 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: aerdrv: RsvdP of PCI_ERR_ROOT_COMMAND
Handle preserved bits properly.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 5a0e3ad6af8660be21ca98a971cd00f331318c05 |
|
24-Mar-2010 |
Tejun Heo <tj@kernel.org> |
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 45e829ea412760d2404d7dfc42528df46aedbf62 |
|
03-Dec-2009 |
Stefan Assmann <sassmann@redhat.com> |
PCI: change PCI nomenclature in drivers/pci/ (comment changes)
Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
terms listed in the "Trademark and Logo Usage Guidelines".
http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf
Patch is limited to drivers/pci/ and changes concern comments only.
Signed-off-by: Stefan Assmann <sassmann@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 638bba08282fb50ba4ebde073ad70551b929e0f2 |
|
03-Dec-2009 |
Andrew Patterson <andrew.patterson@hp.com> |
PCI: remove ifdefed pci_cleanup_aer_correct_error_status
The pci_cleanup_aer_correct_error_status() function has been
#if 0'd out since 2.6.25. Time to remove the dead code.
Signed-off-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 6cdfd995a65a52e05b99e3a72a9b979abe73b312 |
|
03-Dec-2009 |
Andrew Patterson <andrew.patterson@hp.com> |
PCI: unconditionally clear AER uncorr status register during cleanup
The current implementation of pci_cleanup_aer_uncorrect_error_status
only clears either fatal or non-fatal error status bits depending
on the state of the I/O channel. This implementation will then often
leave some bits set after PCI error recovery completes. The uncleared bit
settings will then be falsely reported the next time an AER interrupt is
generated for that hierarchy. An easy way to illustrate this issue is to
use the aer-inject module to simultaneously inject both an uncorrectable
non-fatal and uncorrectable fatal error. One of the errors will not be
cleared.
This patch resolves this issue by unconditionally clearing all bits in
the AER uncorrectable status register. All settings and corrective action
strategies are saved and determined before
pci_cleanup_aer_uncorrect_error_status is called, so this change should not
affect errory handling functionality.
Signed-off-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 694f88ef7ada0d99e304f687ba92e268a594358b |
|
25-Nov-2009 |
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> |
PCI: portdrv: remove unnecessary struct pcie_port_data
Remove 'port_type' field in struct pcie_port_data(), because we can
get port type information from struct pci_dev. With this change, this
patch also does followings:
- Remove struct pcie_port_data because it no longer has any field.
- Remove portdrv private definitions about port type (PCIE_RC_PORT,
PCIE_SW_UPSTREAM_PORT and PCIE_SW_DOWNSTREAM_PORT), and use generic
definitions instead.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 39a53062cb5b2ceca6035f3ed67317672f0bcf3b |
|
11-Nov-2009 |
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> |
PCIe AER: use pci_pcie_cap()
Use pcie_cap() instead of pci_find_capability() to get PCIe capability
offset in PCIe AER driver. This avoids unnecessary search in PCI
configuration space.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 0584396157ad2d008e2cc76b4ed6254151183a25 |
|
02-Nov-2009 |
Matt Domsch <Matt_Domsch@dell.com> |
PCI: PCIe AER: honor ACPI HEST FIRMWARE FIRST mode
Feedback from Hidetoshi Seto and Kenji Kaneshige incorporated. This
correctly handles PCI-X bridges, PCIe root ports and endpoints, and
prints debug messages when invalid/reserved types are found in the
HEST. PCI devices not in domain/segment 0 are not represented in
HEST, thus will be ignored.
Today, the PCIe Advanced Error Reporting (AER) driver attaches itself
to every PCIe root port for which BIOS reports it should, via ACPI
_OSC.
However, _OSC alone is insufficient for newer BIOSes. Part of ACPI
4.0 is the new APEI (ACPI Platform Error Interfaces) which is a way
for OS and BIOS to handshake over which errors for which components
each will handle. One table in ACPI 4.0 is the Hardware Error Source
Table (HEST), where BIOS can define that errors for certain PCIe
devices (or all devices), should be handled by BIOS ("Firmware First
mode"), rather than be handled by the OS.
Dell PowerEdge 11G server BIOS defines Firmware First mode in HEST, so
that it may manage such errors, log them to the System Event Log, and
possibly take other actions. The aer driver should honor this, and
not attach itself to devices noted as such.
Furthermore, Kenji Kaneshige reminded us to disallow changing the AER
registers when respecting Firmware First mode. Platform firmware is
expected to manage these, and if changes to them are allowed, it could
break that firmware's behavior.
The HEST parsing code may be replaced in the future by a more
feature-rich implementation. This patch provides the minimum needed
to prevent breakage until that implementation is available.
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Reviewed-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Matt Domsch <Matt_Domsch@dell.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| b1c089b7caf18905bd1d87136cf7b8c837254932 |
|
07-Sep-2009 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: pcie, aer: report all error before recovery
This patch is required not to lost error records by action invoked on
error recovery, such as slot reset etc.
Following sample (real machine + dummy record injected by aer-inject)
shows that record of 28:00.1 could not be retrieved by recovery of 28:00.0:
- Before:
pcieport-driver 0000:00:02.0: AER: Multiple Uncorrected (Non-Fatal) error received: id=2801
e1000e 0000:28:00.0: PCIE Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, id=2800(Receiver ID)
e1000e 0000:28:00.0: device [8086:1096] error status/mask=00001000/00100000
e1000e 0000:28:00.0: [12] Poisoned TLP (First)
e1000e 0000:28:00.0: TLP Header: 00000000 00000001 00000002 00000003
e1000e 0000:28:00.0: broadcast error_detected message
e1000e 0000:28:00.0: broadcast slot_reset message
e1000e 0000:28:00.0: setting latency timer to 64
e1000e 0000:28:00.0: restoring config space at offset 0x1 (was 0x100547, writing 0x100147)
e1000e 0000:28:00.0: PME# disabled
e1000e 0000:28:00.0: PME# disabled
e1000e 0000:28:00.1: setting latency timer to 64
e1000e 0000:28:00.1: restoring config space at offset 0x1 (was 0x100547, writing 0x100147)
e1000e 0000:28:00.1: PME# disabled
e1000e 0000:28:00.1: PME# disabled
e1000e 0000:28:00.0: broadcast resume message
e1000e 0000:28:00.0: AER driver successfully recovered
e1000e: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: RX/TX
- After:
pcieport-driver 0000:00:02.0: AER: Multiple Uncorrected (Non-Fatal) error received: id=2801
e1000e 0000:28:00.0: PCIE Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, id=2800(Receiver ID)
e1000e 0000:28:00.0: device [8086:1096] error status/mask=00001000/00100000
e1000e 0000:28:00.0: [12] Poisoned TLP (First)
e1000e 0000:28:00.0: TLP Header: 00000000 00000001 00000002 00000003
e1000e 0000:28:00.1: PCIE Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, id=2801(Receiver ID)
e1000e 0000:28:00.1: device [8086:1096] error status/mask=00081000/00100000
e1000e 0000:28:00.1: [12] Poisoned TLP (First)
e1000e 0000:28:00.1: [19] ECRC
e1000e 0000:28:00.1: TLP Header: 00000000 00000001 00000002 00000003
e1000e 0000:28:00.1: Error of this Agent(2801) is reported first
e1000e 0000:28:00.0: broadcast error_detected message
e1000e 0000:28:00.0: broadcast slot_reset message
e1000e 0000:28:00.0: setting latency timer to 64
e1000e 0000:28:00.0: restoring config space at offset 0x1 (was 0x100547, writing 0x100147)
e1000e 0000:28:00.0: PME# disabled
e1000e 0000:28:00.0: PME# disabled
e1000e 0000:28:00.1: setting latency timer to 64
e1000e 0000:28:00.1: restoring config space at offset 0x1 (was 0x100547, writing 0x100147)
e1000e 0000:28:00.1: PME# disabled
e1000e 0000:28:00.1: PME# disabled
e1000e 0000:28:00.0: broadcast resume message
e1000e 0000:28:00.0: AER driver successfully recovered
e1000e: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: RX/TX
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 79e4b89be81b5e53bc4cb51788ca7a45cadb4ef3 |
|
07-Sep-2009 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: pcie, aer: change error print format
Use dev_printk like format.
Sample (real machine + dummy error injected by aer-inject):
- Before:
+------ PCI-Express Device Error ------+
Error Severity : Corrected
PCIE Bus Error type : Data Link Layer
Bad TLP :
Receiver ID : 2800
VendorID=8086h, DeviceID=1096h, Bus=28h, Device=00h, Function=00h
+------ PCI-Express Device Error ------+
Error Severity : Corrected
PCIE Bus Error type : Data Link Layer
Bad TLP :
Bad DLLP :
Receiver ID : 2801
VendorID=8086h, DeviceID=1096h, Bus=28h, Device=00h, Function=01h
Error of this Agent(2801) is reported first
- After:
pcieport-driver 0000:00:02.0: AER: Multiple Corrected error received: id=2801
e1000e 0000:28:00.0: PCIE Bus Error: severity=Corrected, type=Data Link Layer, id=2800(Receiver ID)
e1000e 0000:28:00.0: device [8086:1096] error status/mask=00000040/00000000
e1000e 0000:28:00.0: [ 6] Bad TLP
e1000e 0000:28:00.1: PCIE Bus Error: severity=Corrected, type=Data Link Layer, id=2801(Receiver ID)
e1000e 0000:28:00.1: device [8086:1096] error status/mask=000000c0/00000000
e1000e 0000:28:00.1: [ 6] Bad TLP
e1000e 0000:28:00.1: [ 7] Bad DLLP
e1000e 0000:28:00.1: Error of this Agent(2801) is reported first
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 273024ded7b364e1305a31bf4eb197870284f279 |
|
07-Sep-2009 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: pcie, aer: flags to bits
Compact struct and codes.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| e7a0d92b19f438011ad76c41755b56ec2ef05f64 |
|
07-Sep-2009 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: pcie, aer: report multiple/first error on a device
Multiple bits might be set in the Uncorrectable Error Status
register. But aer_print_error_source() only report a error of
the lowest bit set in the error status register.
So print strings for all bits unmasked and set.
And check First Error Pointer to mark the error occured first.
This FEP is not valid when the corresponing bit of the Uncorrectable
Error Status register is not set, or unimplemented or undefined.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 0d90c3ac0bb89acfbf481c8b06749b00eade6545 |
|
07-Sep-2009 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: pcie, aer: refer mask state in mask register properly
ERR_{,UN}CORRECTABLE_ERROR_MASK are set of error bits which linux know,
set of PCI_ERR_COR_* and PCI_ERR_UNC_* defined in linux/pci_regs.h.
This masks make aerdrv not to report errors of unknown bit, while aerdrv
have ability to report such undefined errors as "Unknown Error Bit %2d".
OTOH aerdrv_errprint does not have any check of setting in mask register.
So it could report masked wrong error by finding bit in status without
knowing that the bit is masked in the mask register.
This patch changes aerdrv to use mask state in mask register propely
instead of defined/hardcoded ERR_{,UN}CORRECTABLE_ERROR_MASK.
This change prevents aerdrv from reporting masked error, and also enable
reporting unknown errors.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 1b4ffcf8432f7945e0bd0571f10a2f2bd1dbd850 |
|
07-Sep-2009 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: pcie, aer: init struct aer_err_info for reuse
In case of multiple errors, struct aer_err_info would be reused among
all reported devices. So the info->status should be initialized before
recycled. Otherwise error of one device might be reported as the error
of another device. Also info->flags has similar problem on reporting
TLP header.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| c9a918838c07cbef934c8ef818d8f0e719015c3a |
|
07-Sep-2009 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: pcie, aer: checkpatch style cleanup in pcie/aer/*
Before:
drivers/pci/pcie/aer/aer_inject.c
total: 4 errors, 4 warnings, 473 lines checked
drivers/pci/pcie/aer/aerdrv.c
total: 5 errors, 2 warnings, 333 lines checked
drivers/pci/pcie/aer/aerdrv.h
total: 1 errors, 0 warnings, 139 lines checked
drivers/pci/pcie/aer/aerdrv_core.c
total: 4 errors, 3 warnings, 872 lines checked
drivers/pci/pcie/aer/aerdrv_errprint.c
total: 12 errors, 11 warnings, 248 lines checked
After:
drivers/pci/pcie/aer/aer_inject.c
total: 0 errors, 0 warnings, 466 lines checked
drivers/pci/pcie/aer/aerdrv.c
total: 0 errors, 0 warnings, 335 lines checked
drivers/pci/pcie/aer/aerdrv.h
total: 0 errors, 0 warnings, 139 lines checked
drivers/pci/pcie/aer/aerdrv_core.c
total: 0 errors, 0 warnings, 869 lines checked
drivers/pci/pcie/aer/aerdrv_errprint.c
total: 0 errors, 10 warnings, 247 lines checked
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 3d5505c56db5c8d1eeca45c325b19e95115afdea |
|
16-Jun-2009 |
Zhang, Yanmin <yanmin_zhang@linux.intel.com> |
PCI AER: multiple error support
When a root port receives the same errors more than once before the
kernel process them, the Multiple Error Messages Received flags are set
by hardware. Because the root port could only save one kind of
correctable error source id and another uncorrectable error source id at
the same time, the second message sender id is lost if the 2 messages
are sent from 2 different devices. This patch makes the kernel search
all devices under the root port when multiple messages are received.
Reviewed-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Zhang Yanmin <yanmin_zhang@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 28eb27cf0839a30948335f9b2edda739f48b7a2e |
|
16-Jun-2009 |
Zhang, Yanmin <yanmin_zhang@linux.intel.com> |
PCI AER: support invalid error source IDs
When the bus id part of error source id is equal to 0 or nosourceid=1,
make the kernel probe the AER status registers of all devices under the
root port to find the initial error reporter.
Reviewed-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Zhang Yanmin <yanmin_zhang@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 70298c6e6c1ba68346336b4ea54bd5c0abbf73c8 |
|
16-Jun-2009 |
Zhang, Yanmin <yanmin_zhang@linux.intel.com> |
PCI AER: support Multiple Error Received and no error source id
Based on PCI Express AER specs, a root port might receive multiple
TLP errors while it could only save a correctable error source id
and an uncorrectable error source id at the same time. In addition,
some root port hardware might be unable to provide a correct source
id, i.e., the source id, or the bus id part of the source id provided
by root port might be equal to 0.
The patchset implements the support in kernel by searching the device
tree under the root port.
Patch 1 changes parameter cb of function pci_walk_bus to return a value.
When cb return non-zero, pci_walk_bus stops more searching on the
device tree.
Reviewed-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Zhang Yanmin <yanmin_zhang@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 43c16408842b0eeb367c23a6fa540ce69f99e347 |
|
23-Apr-2009 |
Andrew Patterson <andrew.patterson@hp.com> |
PCI: Add support for turning PCIe ECRC on or off
Adds support for PCI Express transaction layer end-to-end CRC checking
(ECRC). This patch will enable/disable ECRC checking by setting/clearing
the ECRC Check Enable and/or ECRC Generation Enable bits for devices that
support ECRC.
The ECRC setting is controlled by the "pci=ecrc=<policy>" command-line
option. If this option is not set or is set to 'bios", the enable and
generation bits are left in whatever state that firmware/BIOS set them to.
The "off" setting turns them off, and the "on" option turns them on (if the
device supports it).
Turning ECRC on or off can be a data integrity versus performance
tradeoff. In theory, turning it on will catch more data errors, turning
it off means possibly better performance since CRC does not need to be
calculated by the PCIe hardware and packet sizes are reduced.
Signed-off-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 22106368c999246c414610dcaacd485e741605b1 |
|
13-Jan-2009 |
Rafael J. Wysocki <rjw@sisk.pl> |
PCI: PCIe portdrv: Remove struct pcie_port_service_id
The PCI Express port driver uses 'struct pcie_port_service_id' for
matching port service devices and drivers, but this structure
contains fields that duplicate information from the port device
itself (vendor, device, subvendor, subdevice) and fields that are not
used by any existing port service driver (class, class_mask,
drvier_data). Also, both existing port service drivers (AER and
PCIe HP) don't even use the vendor and device fields for device
matching. Therefore 'struct pcie_port_service_id' can be removed
altogether and the only useful members of it (port_type, service) can
be introduced directly into the port service device and port service
driver structures. That simplifies the code quite a bit and reduces
its size.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| cb4cb4ac7338c28b047760be187355ed9c783e72 |
|
06-Mar-2009 |
Alex Chiang <achiang@hp.com> |
PCIe: AER: during disable, check subordinate before walking
Commit 47a8b0cc (Enable PCIe AER only after checking firmware
support) wants to walk the PCI bus in the remove path to disable
AER, and calls pci_walk_bus for downstream bridges.
Unfortunately, in the remove path, we remove devices and bridges
in a depth-first manner, starting with the furthest downstream
bridge and working our way backwards.
The furthest downstream bridges will not have a dev->subordinate,
and we hit a NULL deref in pci_walk_bus.
Check for dev->subordinate first before attempting to walk the
PCI hierarchy below us.
Acked-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Alex Chiang <achiang@hp.com>
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 1f9f13c8d59c1d8da1a602b71d1ab96d1d37d69e |
|
21-Feb-2009 |
Andrew Patterson <andrew.patterson@hp.com> |
PCI: Enable PCIe AER only after checking firmware support
The PCIe port driver currently sets the PCIe AER error reporting bits for
any root or switch port without first checking to see if firmware will grant
control. This patch moves setting these bits to the AER service driver
aer_enable_port routine. The bits are then set for the root port and any
downstream switch ports after the check for firmware support (aer_osc_setup)
is made. The patch also unsets the bits in a similar fashion when the AER
service driver is unloaded.
Reviewed-by: Alex Chiang <achiang@hp.com>
Signed-off-by: Andrew Patterson <andrew.patterson@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@hobbes.lan>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| b0b801dd7de3d77bb143d3c98199b487df0fc63a |
|
01-Dec-2008 |
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> |
PCI: fix aer resume sanity check
What we have to check here before calling is err_handler->resume, not
->slot_reset. Looks like a copy & paste error from report_slot_reset.
Acked-by: Yanmin Zhang <yanmin.zhang@intel.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 270c66be9b4a6f2be53ef3aec5dc8e7b07782ec9 |
|
19-Oct-2008 |
Yu Zhao <yu.zhao@intel.com> |
PCI: fix AER capability check
The 'use pci_find_ext_capability everywhere' cleanup brought a new bug,
which makes the AER stop working. Fix it by actually using find_ext_cap
instead of just find_cap. Drop the unused config space size define while
we're at it.
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 0927678f55c9a50c296f7e6dae85e87b8236e155 |
|
19-Oct-2008 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
PCI: use pci_find_ext_capability everywhere
Remove some open coded (and buggy) versions of pci_find_ext_capability
in favor of the real routine in the PCI core.
Tested-by: Tomasz Czernecki <czernecki@gmail.com>
Acked-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 531f254e5cdadb894f04ed27107cdb34c15817ea |
|
13-Jun-2008 |
Bjorn Helgaas <bjorn.helgaas@hp.com> |
PCIE: aer: use dev_printk when possible
Convert printks to use dev_printk().
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 66bef8c059015ba2b36bb5759080336feb01e680 |
|
04-Mar-2008 |
Harvey Harrison <harvey.harrison@gmail.com> |
PCI: replace remaining __FUNCTION__ occurrences
__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 21c6847406784fde73ad5ea47c2c3434714d58d1 |
|
05-Feb-2008 |
Adrian Bunk <bunk@kernel.org> |
PCI: #if 0 pci_cleanup_aer_correct_error_status()
#if 0 the no longer used pci_cleanup_aer_correct_error_status().
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Cc: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| d885c6b75b60e0df8ab65c82d0c81f4238e664ce |
|
28-Nov-2007 |
Randy Dunlap <randy.dunlap@oracle.com> |
pci-aer: fix kernel-doc mistakes
Fix kernel-doc parameter names and ending block comments (change **/
to */).
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Acked-by: Linas Vepstas <linas@linas.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| f0dce411930d16a678173e534594bca160f5eaff |
|
06-Jun-2007 |
Stephen Hemminger <shemminger@linux-foundation.org> |
PCI aer: add pci_cleanup_aer_correct_aer_status
Function to clear bogus correctable errors. Analog to pci_aer_uncorrect_are_status.
The Marvell chips seem to start out with a bogus value that needs to be
cleared.
Yanmin ported it to 2.6.22-rc4 by fixing a fuzz patch applying info.
Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Acked-by: Zhang Yanmin <yanmin.zhang@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
/drivers/pci/pcie/aer/aerdrv_core.c
|
| 8d29bfb79e632fe318f4c01c9c2e8faacb89b800 |
|
06-Jun-2007 |
Zhang, Yanmin <yanmin_zhang@linux.intel.com> |
PCI: fix AER driver error information
Below patch fixes aer driver error information and enables aer driver
although CONFIG_ACPI=n.
As a matter of fact, the new patch is created from below 2 patches plus
a minor patch apply fuzz fixing. Because the second patch fixed a compilation
error introduced by the first patch, I merge them to facilitate bisect.
1) http://marc.info/?l=linux-kernel&m=117783233918191&w=2;
2) http://marc.info/?l=linux-mm-commits&m=118046936720790&w=2
Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com>
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
/drivers/pci/pcie/aer/aerdrv_core.c
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| 65f27f38446e1976cc98fd3004b110fedcddd189 |
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22-Nov-2006 |
David Howells <dhowells@redhat.com> |
WorkStruct: Pass the work_struct pointer instead of context data
Pass the work_struct pointer to the work function rather than context data.
The work function can use container_of() to work out the data.
For the cases where the container of the work_struct may go away the moment the
pending bit is cleared, it is made possible to defer the release of the
structure by deferring the clearing of the pending bit.
To make this work, an extra flag is introduced into the management side of the
work_struct. This governs auto-release of the structure upon execution.
Ordinarily, the work queue executor would release the work_struct for further
scheduling or deallocation by clearing the pending bit prior to jumping to the
work function. This means that, unless the driver makes some guarantee itself
that the work_struct won't go away, the work function may not access anything
else in the work_struct or its container lest they be deallocated.. This is a
problem if the auxiliary data is taken away (as done by the last patch).
However, if the pending bit is *not* cleared before jumping to the work
function, then the work function *may* access the work_struct and its container
with no problems. But then the work function must itself release the
work_struct by calling work_release().
In most cases, automatic release is fine, so this is the default. Special
initiators exist for the non-auto-release case (ending in _NAR).
Signed-Off-By: David Howells <dhowells@redhat.com>
/drivers/pci/pcie/aer/aerdrv_core.c
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| b19441af185559118e8247382ea4f2f76ebffc6d |
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28-Aug-2006 |
Greg Kroah-Hartman <gregkh@suse.de> |
PCI: fix __must_check warnings
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
/drivers/pci/pcie/aer/aerdrv_core.c
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| 6c2b374d74857e892080ee726184ec1d15e7d4e4 |
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31-Jul-2006 |
Zhang, Yanmin <yanmin.zhang@intel.com> |
PCI-Express AER implemetation: AER core and aerdriver
Patch 3 implements the core part of PCI-Express AER and aerdrv
port service driver.
When a root port service device is probed, the aerdrv will call
request_irq to register irq handler for AER error interrupt.
When a device sends an PCI-Express error message to the root port,
the root port will trigger an interrupt, by either MSI or IO-APIC,
then kernel would run the irq handler. The handler collects root
error status register and schedules a work. The work will call
the core part to process the error based on its type
(Correctable/non-fatal/fatal).
As for Correctable errors, the patch chooses to just clear the correctable
error status register of the device.
As for the non-fatal error, the patch follows generic PCI error handler
rules to call the error callback functions of the endpoint's driver. If
the device is a bridge, the patch chooses to broadcast the error to
downstream devices.
As for the fatal error, the patch resets the pci-express link and
follows generic PCI error handler rules to call the error callback
functions of the endpoint's driver. If the device is a bridge, the patch
chooses to broadcast the error to downstream devices.
Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
/drivers/pci/pcie/aer/aerdrv_core.c
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