| e5cc6aa4b6ef34c3f054af8c61a4f73c157589c3 |
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27-Jan-2012 |
Marcin Tomczak <marcin.tomczak@intel.com> |
[SCSI] isci: enable clock gating
Enabling clock gating for power savings on entry to controller ready
state. Disable SCU clock gating for power savings on exit from the
controller ready state.
The gating is fully automated by silicon after setting the mode.
Signed-off-by: Marcin Tomczak <marcin.tomczak@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
/drivers/scsi/isci/registers.h
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| 13257cfbc57e9cf84fd9fe0cb7a909b3fb4f7482 |
|
02-Sep-2011 |
Dan Williams <dan.j.williams@intel.com> |
[SCSI] isci: fix sgpio register definitions
output_data_select registers are off by one u32
delete the macros we will never use.
Reported-by: Artur Wojcik <artur.wojcik@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
/drivers/scsi/isci/registers.h
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| 985af6f70dbb8a33b3af8a7c7df508d924650e37 |
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30-Jul-2011 |
Marcin Tomczak <marcin.tomczak@intel.com> |
[SCSI] isci: change sas phy timeouts from 54us to 59us
Need the following workaround in the driver for interoperability with
the older Intel SSD drives and any other SATA drive that may exhibit the
same behavior. This is a corner case where SCU speed is limited to
either 3G or 1.5G and the drive has a period of DC idle when it switches
speed during SATA speed negotiation. Workaround :change PHYTOV[31:24]
from 0x36 to 0x3B.
Signed-off-by: Marcin Tomczak <marcin.tomczak@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
/drivers/scsi/isci/registers.h
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| 63a3a15fb00ef49e50e98ff675094afcd92f113a |
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09-May-2011 |
Dan Williams <dan.j.williams@intel.com> |
isci: uplevel register hardware data structures and unsolicited frame handling
Reported-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
/drivers/scsi/isci/registers.h
|