876e0df902c726408c84b75dab673a90fd492e1d |
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23-Nov-2011 |
Geoff Levand <geoff@infradead.org> |
usb: Remove ehci_reset call from ehci_run Remove the ehci_reset() call done in the ehci_run() routine of the USB EHCI host controller driver and add an ehci_reset() call to the probe processing of all EHCI platform drivers that do not already call ehci_reset(). The call to ehci_reset() from ehci_run() was problematic for several platform drivers, and unnecessary for others. This change moves the decision to call ehci_reset() at driver startup to the platform driver code. Signed-off-by: Geoff Levand <geoff@infradead.org> Acked-by: Alan Stern <stern@rowland.harvard.edu>
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b5dd18d8747010e3f3eb1cc76a49f94291938559 |
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07-Sep-2011 |
Yong Zhang <yong.zhang0@gmail.com> |
USB: irq: Remove IRQF_DISABLED This flag is a NOOP and can be removed now. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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28f65c11f2ffb3957259dece647a24f8ad2e241b |
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09-Jun-2011 |
Joe Perches <joe@perches.com> |
treewide: Convert uses of struct resource to resource_size(ptr) Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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c430131a02d677aa708f56342c1565edfdacb3c0 |
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03-May-2011 |
Jan Andersson <jan@gaisler.com> |
USB: EHCI: Support controllers with big endian capability regs The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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1643accdaad4625c2877f7ceefa39c1cb3e90117 |
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08-Oct-2010 |
David Daney <ddaney@caviumnetworks.com> |
USB: Add EHCI and OHCH glue for OCTEON II SOCs. The OCTEON II SOC has USB EHCI and OHCI controllers connected directly to the internal I/O bus. This patch adds the necessary 'glue' logic to allow ehci-hcd and ohci-hcd drivers to work on OCTEON II. The OCTEON normally runs big-endian, and the ehci/ohci internal registers have host endianness, so we need to select USB_EHCI_BIG_ENDIAN_MMIO. The ehci and ohci blocks share a common clocking and PHY infrastructure. Initialization of the host controller and PHY clocks is common between the two and is factored out into the octeon2-common.c file. Setting of USB_ARCH_HAS_OHCI and USB_ARCH_HAS_EHCI is done in arch/mips/Kconfig in a following patch. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-usb@vger.kernel.org To: dbrownell@users.sourceforge.net Patchwork: http://patchwork.linux-mips.org/patch/1675/ Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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