Lines Matching refs:R1
133 unsigned char stat = read_zsreg(uap, R1);
146 write_zsreg(uap, R1,
147 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
191 /* Rewrite R1, this time without IRQ enabled masked. */
192 write_zsreg(uap, R1, regs[R1]);
227 write_zsreg(uap, R1, uap->curregs[1]);
248 r1 = read_zsreg(uap, R1);
403 * a closed channel. The interrupt mask in R1 is clear, but
407 * R3 interrup status bits are masked by R1 interrupt enable
678 uap->curregs[R1] &= ~RxINT_MASK;
863 write_zsreg(uap, R1, 0);
1159 || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1970 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
1976 write_zsreg(uap, R1, uap->curregs[1]);