Cross Reference: /drivers/usb/host/xhci-hub.c

Lines Matching defs:port_array
397 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
404 		*port_array = xhci->usb3_ports;
407 		*port_array = xhci->usb2_ports;
413 void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
418 	temp = xhci_readl(xhci, port_array[port_id]);
422 	xhci_writel(xhci, temp, port_array[port_id]);
426 		__le32 __iomem **port_array, int port_id, u16 wake_mask)
430 	temp = xhci_readl(xhci, port_array[port_id]);
448 	xhci_writel(xhci, temp, port_array[port_id]);
452 void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
457 	temp = xhci_readl(xhci, port_array[port_id]);
461 		xhci_writel(xhci, temp, port_array[port_id]);
509 	__le32 __iomem **port_array;
515 	max_ports = xhci_get_ports(hcd, &port_array);
559 		temp = xhci_readl(xhci, port_array[wIndex]);
598 				xhci_set_link_state(xhci, port_array, wIndex,
662 		temp = xhci_readl(xhci, port_array[wIndex]);
671 			temp = xhci_readl(xhci, port_array[wIndex]);
674 				xhci_set_link_state(xhci, port_array, wIndex,
684 			temp = xhci_readl(xhci, port_array[wIndex]);
703 			xhci_set_link_state(xhci, port_array, wIndex, XDEV_U3);
709 			temp = xhci_readl(xhci, port_array[wIndex]);
713 			temp = xhci_readl(xhci, port_array[wIndex]);
737 			xhci_set_link_state(xhci, port_array, wIndex,
744 			temp = xhci_readl(xhci, port_array[wIndex]);
756 					port_array[wIndex]);
758 			temp = xhci_readl(xhci, port_array[wIndex]);
763 			xhci_writel(xhci, temp, port_array[wIndex]);
765 			temp = xhci_readl(xhci, port_array[wIndex]);
769 			xhci_set_remote_wake_mask(xhci, port_array,
771 			temp = xhci_readl(xhci, port_array[wIndex]);
778 			xhci_writel(xhci, temp, port_array[wIndex]);
780 			temp = xhci_readl(xhci, port_array[wIndex]);
786 		temp = xhci_readl(xhci, port_array[wIndex]);
792 		temp = xhci_readl(xhci, port_array[wIndex]);
801 			temp = xhci_readl(xhci, port_array[wIndex]);
810 				xhci_set_link_state(xhci, port_array, wIndex,
815 				xhci_set_link_state(xhci, port_array, wIndex,
837 					port_array[wIndex], temp);
841 					port_array[wIndex], temp);
872 	__le32 __iomem **port_array;
875 	max_ports = xhci_get_ports(hcd, &port_array);
893 		temp = xhci_readl(xhci, port_array[i]);
916 	__le32 __iomem **port_array;
920 	max_ports = xhci_get_ports(hcd, &port_array);
941 		t1 = xhci_readl(xhci, port_array[port_index]);
974 			xhci_writel(xhci, t2, port_array[port_index]);
984 			addr = port_array[port_index] + 1;
1000 	__le32 __iomem **port_array;
1005 	max_ports = xhci_get_ports(hcd, &port_array);
1029 		temp = xhci_readl(xhci, port_array[port_index]);
1037 				xhci_set_link_state(xhci, port_array,
1040 				xhci_set_link_state(xhci, port_array,
1047 				xhci_set_link_state(xhci, port_array,
1058 			xhci_test_and_clear_bit(xhci, port_array, port_index,
1066 			xhci_writel(xhci, temp, port_array[port_index]);
1076 			addr = port_array[port_index] + 1;