Searched defs:cfg2 (Results 1 - 9 of 9) sorted by relevance

/drivers/media/video/
H A Datmel-isi.c121 u32 cfg2, cr; local
147 cfg2 = isi_readl(isi, ISI_CFG2);
148 cfg2 |= cr;
150 cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK);
151 cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) &
154 cfg2 &= ~(ISI_CFG2_IM_VSIZE_MASK);
155 cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET)
157 isi_writel(isi, ISI_CFG2, cfg2);
/drivers/staging/comedi/drivers/
H A Dni_at_ao.c176 unsigned short cfg2; member in struct:atao_private
323 devpriv->cfg2 = 0;
324 outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
461 outw(devpriv->cfg2 | ((bit & bitstring) ? SDATA : 0),
463 outw(devpriv->cfg2 | SCLK | ((bit & bitstring) ? SDATA : 0),
467 outw(devpriv->cfg2 | (((chan >> 3) + 1) << 14),
469 outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
/drivers/hwmon/
H A Dadt7462.c90 #define ADT7462_PIN26_MASK 0x0C /* cfg2 */
222 u8 cfg2; member in struct:adt7462_data
803 data->cfg2 = i2c_smbus_read_byte_data(client, ADT7462_REG_CFG2);
1105 return sprintf(buf, "%d\n", (data->cfg2 & ADT7462_FSPD_MASK ? 1 : 0));
1127 data->cfg2 = reg;
/drivers/staging/rts_pstor/
H A Dsd.c3352 u8 cfg2; local
3449 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3453 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO;
3456 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3481 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3485 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO;
3488 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3524 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3528 cfg2 |= SD_NO_CHECK_WAIT_CRC_TO;
3531 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
[all...]
/drivers/scsi/
H A Ddc395x.c198 u8 cfg2; /* Target configuration byte 2 */ member in struct:NVRamTarget
4201 *d_eeprom = 0x00000077; /* cfg3,cfg2,period,cfg0 */
/drivers/staging/et131x/
H A Det131x.c1012 u32 cfg2; local
1018 cfg2 = readl(&mac->cfg2);
1022 cfg2 &= ~0x300;
1024 cfg2 |= 0x200;
1028 cfg2 |= 0x100;
1044 cfg2 |= 0x7016;
1045 cfg2 &= ~0x0021;
1049 cfg2 |= 0x01;
1056 writel(cfg2,
[all...]
H A Det131x.h1127 u32 cfg2; /* 0x5004 */ member in struct:mac_regs
/drivers/net/ethernet/broadcom/
H A Dtg3.c13168 u32 nic_phy_id, ver, cfg2 = 0, cfg4 = 0, eeprom_phy_id; local
13180 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2);
13209 led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
13299 if (cfg2 & (1 << 17))
13304 if (cfg2 & (1 << 18))
13310 (cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN))
/drivers/net/ethernet/realtek/
H A Dr8169.c6046 u8 cfg2; local
6048 cfg2 = RTL_R8(Config2) & ~MSIEnable;
6053 cfg2 |= MSIEnable;
6058 RTL_W8(Config2, cfg2);

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