Searched defs:mii_control (Results 1 - 4 of 4) sorted by relevance

/drivers/net/ethernet/amd/
H A Dau1000_eth.h80 u32 mii_control; member in struct:mac_reg
H A Dau1000_eth.c174 u32 *const mii_control_reg = &aup->mac->mii_control;
177 u32 mii_control; local
187 mii_control = MAC_SET_MII_SELECT_REG(reg) |
190 writel(mii_control, mii_control_reg);
207 u32 *const mii_control_reg = &aup->mac->mii_control;
210 u32 mii_control; local
220 mii_control = MAC_SET_MII_SELECT_REG(reg) |
224 writel(mii_control, mii_control_reg);
/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c4795 u16 mii_control; local
4799 MDIO_COMBO_IEEE0_MII_CONTROL, &mii_control);
4805 (mii_control |
4818 &mii_control);
4820 if (!(mii_control & MDIO_COMBO_IEEO_MII_CONTROL_RESET)) {
5132 u16 mii_control; local
5141 &mii_control);
5146 (mii_control |
5154 &mii_control);
5156 "bnx2x_restart_autoneg mii_control befor
5193 u16 mii_control; local
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/drivers/net/ethernet/nvidia/
H A Dforcedeth.c1391 u32 mii_status, mii_control, mii_control_1000, reg; local
1461 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
1462 mii_control |= BMCR_ANENABLE;
1468 mii_control |= BMCR_ANRESTART;
1469 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
1478 if (phy_reset(dev, mii_control)) {
1521 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
1522 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
1524 mii_control |= BMCR_PDOWN;
1525 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control))
5956 u16 phy_reserved, mii_control; local
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