/drivers/net/ethernet/chelsio/cxgb3/ |
H A D | mc5.c | 40 /* DBGI command mode */ 52 /* IDT LAR register address and value for 144-bit mode (low 32 bits) */ 153 if (mc5->mode == MC5_MODE_144_BIT) { 170 mc5->mode == MC5_MODE_144_BIT ? 205 /* Set DBGI command mode for IDT TCAM. */ 269 /* Set DBGI command mode for IDT TCAM. */ 303 /* Put MC5 in DBGI mode. */ 307 V_TMMODE(mc5->mode == MC5_MODE_72_BIT) | F_DBGIEN); 310 /* Put MC5 in M-Bus mode. */ 314 V_TMMODE(mc5->mode 417 t3_mc5_prep(struct adapter *adapter, struct mc5 *mc5, int mode) argument [all...] |
/drivers/net/wireless/ath/ath5k/ |
H A D | ani.c | 242 /* AP mode */ 249 /* STA and IBSS mode */ 251 /* TODO: for IBSS mode it would be better to keep a beacon RSSI average 281 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal 315 /* AP mode */ 321 /* STA and IBSS mode (see TODO above) */ 480 * always do this to calculate the busy time also in manual mode */ 638 * @mode: One of enum ath5k_ani_mode 640 * Initialize ANI according to mode. 643 ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode) argument [all...] |
/drivers/usb/dwc3/ |
H A D | core.c | 106 void dwc3_set_mode(struct dwc3 *dwc, u32 mode) argument 112 reg |= DWC3_GCTL_PRTCAPDIR(mode); 367 * and falls back to high-speed mode which causes 418 u8 mode; local 487 mode = DWC3_MODE(dwc->hwparams.hwparams0); 489 switch (mode) { 521 dev_err(dev, "Unsupported mode of operation %d\n", mode); 524 dwc->mode = mode; [all...] |
/drivers/spi/ |
H A D | Kconfig | 131 mode. 145 mode. 170 mode. 186 mode. 193 Controller in master SPI mode. 200 Controller in SPI master mode. 211 This enables using the Freescale SPI controllers in master mode. 212 MPC83xx platform uses the controller in cpu mode or CPM/QE mode. 213 MPC8569 uses the controller in QE mode, MPC861 [all...] |
H A D | spi-fsl-espi.c | 29 __be32 mode; /* 0x000 - eSPI mode register */ member in struct:fsl_espi_reg 36 __be32 csmode[4]; /* 0x020 - 0x02c eSPI cs mode register */ 49 /* eSPI Controller mode register definitions */ 55 /* eSPI Controller CS mode register definitions */ 67 /* Default mode/csmode for eSPI controller */ 92 __be32 __iomem *mode = ®_base->csmode[spi->chip_select]; local 93 __be32 __iomem *espi_mode = ®_base->mode; 100 /* Turn off SPI unit prior changing mode */ 103 mpc8xxx_spi_write_reg(mode, c [all...] |
/drivers/video/ |
H A D | imxfb.c | 116 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */ 159 struct imx_fb_videomode *mode; member in struct:imxfb_info 245 * If inverse mode was selected, invert all the colours 296 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) { 297 if (!strcmp(m->mode.name, fb_mode)) 327 var->xres = imxfb_mode->mode.xres; 328 var->yres = imxfb_mode->mode.yres; 330 var->pixclock = imxfb_mode->mode.pixclock; 331 var->hsync_len = imxfb_mode->mode.hsync_len; 332 var->left_margin = imxfb_mode->mode [all...] |
H A D | amba-clcd.c | 175 * we're operating in 444, 5551 or 565 mode. 377 * to e.g. a video mode which doesn't support it. Implements VESA suspend 478 fb->fb.var.xres = fb->panel->mode.xres; 479 fb->fb.var.yres = fb->panel->mode.yres; 480 fb->fb.var.xres_virtual = fb->panel->mode.xres; 481 fb->fb.var.yres_virtual = fb->panel->mode.yres; 484 fb->fb.var.pixclock = fb->panel->mode.pixclock; 485 fb->fb.var.left_margin = fb->panel->mode.left_margin; 486 fb->fb.var.right_margin = fb->panel->mode.right_margin; 487 fb->fb.var.upper_margin = fb->panel->mode [all...] |
H A D | vga16fb.c | 61 int palette_blanked, vesa_blanked, mode, isVGA; member in struct:vga16fb_par 119 Bits 0-1 are write mode, bit 3 is read mode. */ 120 static inline int setmode(int mode) argument 125 vga_io_w(VGA_GFX_D, mode); 196 } else if (par->mode & MODE_TEXT) { 322 int mode; local 332 mode = MODE_SKIP4 | MODE_CFB; 337 mode = 0; 345 mode 700 vga_vesa_blank(struct vga16fb_par *par, int mode) argument [all...] |
/drivers/video/backlight/ |
H A D | corgi_lcd.c | 94 int mode; member in struct:corgi_lcd 191 static void lcdtg_set_phadadj(struct corgi_lcd *lcd, int mode) argument 195 switch(mode) { 278 lcdtg_set_phadadj(lcd, lcd->mode); 287 switch (lcd->mode) { 341 int mode = CORGI_LCD_MODE_QVGA; local 344 mode = CORGI_LCD_MODE_VGA; 346 if (lcd->mode == mode) 349 lcdtg_set_phadadj(lcd, mode); [all...] |
/drivers/ata/ |
H A D | pata_optidma.c | 103 * optidma_mode_setup - set mode data 106 * @mode: Mode to set 108 * Called to do the DMA or PIO mode setup. Timing numbers are all 116 static void optidma_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode) argument 138 /* Switch from IDE to control mode */ 145 * need to look at slowest of PIO/DMA mode of either device 148 if (mode >= XFER_MW_DMA_0) 168 if (mode < XFER_MW_DMA_0) { 171 } else if (mode < XFER_UDMA_0) { 181 /* Switch back to IDE mode */ 201 optiplus_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode) argument [all...] |
/drivers/media/video/gspca/ |
H A D | kinect.c | 263 int mode; local 269 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv; 271 if (mode & FORMAT_Y10B) { 284 if (mode & FORMAT_UYVY) 289 if (mode & MODE_1280x1024) 294 if (mode & FPS_HIGH) 313 if (mode & (FORMAT_Y10B | MODE_1280x1024)) {
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/drivers/media/video/s5p-jpeg/ |
H A D | jpeg-hw.h | 50 static inline void jpeg_input_raw_mode(void __iomem *regs, unsigned long mode) argument 55 if (mode == S5P_JPEG_RAW_IN_565) 57 else if (mode == S5P_JPEG_RAW_IN_422) 78 static inline void jpeg_proc_mode(void __iomem *regs, unsigned long mode) argument 83 if (mode == S5P_JPEG_ENCODE) 93 static inline void jpeg_subsampling_mode(void __iomem *regs, unsigned int mode) argument 97 if (mode == V4L2_JPEG_CHROMA_SUBSAMPLING_420)
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/drivers/net/bonding/ |
H A D | bond_procfs.c | 67 bond_mode_name(bond->params.mode)); 69 if (bond->params.mode == BOND_MODE_ACTIVEBACKUP && 76 if (bond->params.mode == BOND_MODE_XOR || 77 bond->params.mode == BOND_MODE_8023AD) { 83 if (USES_PRIMARY(bond->params.mode)) { 123 if (bond->params.mode == BOND_MODE_8023AD) { 176 if (bond->params.mode == BOND_MODE_8023AD) {
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/drivers/usb/musb/ |
H A D | musbhsdma.c | 95 /* Tx => mode 1; Rx => mode 0 */ 120 u16 packet_sz, u8 mode, 130 dev_dbg(musb->controller, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n", 131 channel, packet_sz, dma_addr, len, mode); 133 if (mode) { 158 u16 packet_sz, u8 mode, 165 dev_dbg(musb->controller, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n", 168 packet_sz, dma_addr, len, mode); 176 packet_sz, &mode, 119 configure_channel(struct dma_channel *channel, u16 packet_sz, u8 mode, dma_addr_t dma_addr, u32 len) argument 157 dma_channel_program(struct dma_channel *channel, u16 packet_sz, u8 mode, dma_addr_t dma_addr, u32 len) argument [all...] |
/drivers/gpu/drm/gma500/ |
H A D | mdfld_intel_display.c | 126 struct drm_display_mode *mode, 365 * Sets the power management mode of the pipe and plane. 370 static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode) argument 385 dev_dbg(dev->dev, "mode = %d, pipe = %d\n", mode, pipe); 418 switch (mode) { 474 /*perform w/a in video mode only on pipe A or C*/ 758 struct drm_display_mode *mode, 803 android_hdmi_crtc_mode_set(crtc, mode, adjusted_mode, 871 mode 125 psb_intel_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) argument 757 mdfld_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, int x, int y, struct drm_framebuffer *old_fb) argument [all...] |
H A D | cdv_intel_lvds.c | 229 static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode) argument 232 if (mode == DRM_MODE_DPMS_ON) 248 struct drm_display_mode *mode) 256 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 260 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 264 if (mode->hdisplay > fixed_mode->hdisplay) 266 if (mode->vdisplay > fixed_mode->vdisplay) 273 struct drm_display_mode *mode, 295 * to the adjusted mode. The CRTC will be set up for this mode, 247 cdv_intel_lvds_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) argument 272 cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) argument 353 cdv_intel_lvds_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) argument 425 struct drm_display_mode *mode = local [all...] |
H A D | psb_intel_lvds.c | 253 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode) argument 257 if (mode == DRM_MODE_DPMS_ON) 349 struct drm_display_mode *mode) 361 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 365 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 369 if (mode->hdisplay > fixed_mode->hdisplay) 371 if (mode->vdisplay > fixed_mode->vdisplay) 378 struct drm_display_mode *mode, 416 * to the adjusted mode. The CRTC will be set up for this mode, 348 psb_intel_lvds_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) argument 377 psb_intel_lvds_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) argument 474 psb_intel_lvds_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) argument 549 struct drm_display_mode *mode = local [all...] |
/drivers/isdn/hisax/ |
H A D | avm_pci.c | 166 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel)) 168 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel)) 185 bcs->hw.hdlc.ctrl.sr.mode); 196 modehdlc(struct BCState *bcs, int mode, int bc) argument 202 debugl1(cs, "hdlc %c mode %d --> %d ichan %d --> %d", 203 'A' + hdlc, bcs->mode, mode, hdlc, bc); 205 switch (mode) { 207 bcs->mode = 1; 211 if (bcs->mode [all...] |
/drivers/net/ethernet/ |
H A D | ethoc.c | 55 /* mode register */ 60 #define MODER_IAM (1 << 4) /* individual address mode */ 61 #define MODER_PRO (1 << 5) /* promiscuous mode */ 102 /* control module mode register */ 107 /* MII mode register */ 279 u32 mode = ethoc_read(dev, MODER); local 280 mode |= MODER_RXEN | MODER_TXEN; 281 ethoc_write(dev, MODER, mode); 286 u32 mode = ethoc_read(dev, MODER); local 287 mode 337 u32 mode; local 795 u32 mode = ethoc_read(priv, MODER); local [all...] |
/drivers/net/wireless/p54/ |
H A D | fwio.c | 320 u16 mode; local 329 switch (priv->mode) { 331 mode = P54_FILTER_TYPE_STATION; 334 mode = P54_FILTER_TYPE_AP; 338 mode = P54_FILTER_TYPE_IBSS; 341 mode = P54_FILTER_TYPE_PROMISCUOUS; 344 mode = P54_FILTER_TYPE_HIBERNATE; 354 (mode != P54_FILTER_TYPE_PROMISCUOUS)) 355 mode |= P54_FILTER_TYPE_TRANSPARENT; 357 mode 393 p54_scan(struct p54_common *priv, u16 mode, u16 dwell) argument 602 u16 mode; local [all...] |
/drivers/gpu/drm/nouveau/ |
H A D | nv50_sor.c | 257 nv50_sor_dpms(struct drm_encoder *encoder, int mode) argument 265 NV_DEBUG_KMS(dev, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode); 267 nv_encoder->last_dpms = mode; 292 if (mode == DRM_MODE_DPMS_ON) 313 nouveau_dp_dpms(encoder, mode, nv_encoder->dp.datarate, &func); 330 nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, argument 369 struct drm_display_mode *mode) 386 if (mode->clock < 165000) 393 nouveau_hdmi_mode_set(encoder, mode); 368 nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode, struct drm_display_mode *mode) argument [all...] |
/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_kms.c | 515 if (clip.x1 >= unit->crtc.mode.hdisplay || 516 clip.y1 >= unit->crtc.mode.vdisplay || 530 clip.x2 = unit->crtc.mode.hdisplay - clip.x1; 531 clip.y2 = unit->crtc.mode.vdisplay - clip.y1; 649 "for requested mode.\n"); 675 DRM_ERROR("Invalid surface format for requested mode.\n"); 873 if (clip_x1 >= unit->crtc.mode.hdisplay || 874 clip_y1 >= unit->crtc.mode.vdisplay || 879 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay); 880 clip_y2 = min_t(int, clip_y2, unit->crtc.mode 1772 vmw_du_connector_dpms(struct drm_connector *connector, int mode) argument 1885 vmw_guess_mode_timing(struct drm_display_mode *mode) argument 1906 struct drm_display_mode *mode = NULL; local [all...] |
/drivers/hid/ |
H A D | hid-roccat-pyra.c | 376 .attr = { .name = "profile_settings", .mode = 0220 }, 381 .attr = { .name = "profile1_settings", .mode = 0440 }, 387 .attr = { .name = "profile2_settings", .mode = 0440 }, 393 .attr = { .name = "profile3_settings", .mode = 0440 }, 399 .attr = { .name = "profile4_settings", .mode = 0440 }, 405 .attr = { .name = "profile5_settings", .mode = 0440 }, 411 .attr = { .name = "profile_buttons", .mode = 0220 }, 416 .attr = { .name = "profile1_buttons", .mode = 0440 }, 422 .attr = { .name = "profile2_buttons", .mode = 0440 }, 428 .attr = { .name = "profile3_buttons", .mode [all...] |
/drivers/media/radio/wl128x/ |
H A D | fmdrv_rx.c | 402 /* Reads current mute mode (Mute Off/On/Attenuate)*/ 451 /* Configures mute mode (Mute Off/On/Attenuate) */ 472 /* Gets RF dependent soft mute mode enable/disable status */ 488 /* Sets RF dependent soft mute mode */ 581 int fm_rx_set_stereo_mono(struct fmdev *fmdev, u16 mode) argument 586 if (mode != FM_STEREO_MODE && mode != FM_MONO_MODE) { 587 fmerr("Invalid mode\n"); 591 /* Set stereo/mono mode */ 592 payload = (u16)mode; 609 fm_rx_get_stereo_mono(struct fmdev *fmdev, u16 *mode) argument 631 fm_rx_set_deemphasis_mode(struct fmdev *fmdev, u16 mode) argument [all...] |
/drivers/gpu/drm/i915/ |
H A D | intel_drv.h | 62 /* maximum connectors per crtcs in the mode set */ 109 * timings in the mode to prevent the crtc fixup from overwriting them. 114 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode, argument 117 mode->clock *= multiplier; 118 mode->private_flags |= multiplier; 122 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode) argument 124 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT; 159 bool active; /* is the crtc on? independent of the dpms mode */ 308 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, 320 struct drm_display_mode *mode, [all...] |