/drivers/gpio/ |
H A D | gpio-stmpe.c | 45 static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) argument 49 u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); 50 u8 mask = 1 << (offset % 8); 60 static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) argument 65 u8 reg = stmpe->regs[which] - (offset / 8); 66 u8 mask = 1 << (offset % 8); 79 unsigned offset, int val) 83 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); 84 u8 mask = 1 << (offset % 8); 86 stmpe_gpio_set(chip, offset, va 78 stmpe_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int val) argument 91 stmpe_gpio_direction_input(struct gpio_chip *chip, unsigned offset) argument 102 stmpe_gpio_to_irq(struct gpio_chip *chip, unsigned offset) argument 109 stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) argument 135 int offset = d->irq - stmpe_gpio->irq_base; local 202 int offset = d->irq - stmpe_gpio->irq_base; local 212 int offset = d->irq - stmpe_gpio->irq_base; local [all...] |
H A D | gpio-wm831x.c | 38 static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) argument 47 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, 52 static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) argument 62 if (ret & 1 << offset) 68 static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) argument 73 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, 74 value << offset); 78 unsigned offset, int value) 88 ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, 95 wm831x_gpio_set(chip, offset, valu 77 wm831x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value) argument 100 wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) argument 111 wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset, unsigned debounce) argument [all...] |
H A D | gpio-langwell.c | 44 * structure, to get a bit offset for a pin (use GPDR as an example): 47 * reg = offset / 32; 48 * bit = offset % 32; 51 * so the bit of reg_addr is to control pin offset's GPDR feature 73 static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, argument 78 u8 reg = offset / 32; 85 static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, argument 90 u8 reg = offset / 16; 97 static int lnw_gpio_request(struct gpio_chip *chip, unsigned offset) argument 99 void __iomem *gafr = gpio_reg_2bit(chip, offset, GAF 110 lnw_gpio_get(struct gpio_chip *chip, unsigned offset) argument 117 lnw_gpio_set(struct gpio_chip *chip, unsigned offset, int value) argument 130 lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) argument 152 lnw_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) argument 176 lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) argument [all...] |
H A D | gpio-tc3589x.c | 45 static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset) argument 49 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; 50 u8 mask = 1 << (offset % 8); 60 static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val) argument 64 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; 65 unsigned pos = offset % 8; 72 unsigned offset, int val) 76 u8 reg = TC3589x_GPIODIR0 + offset / 8; 77 unsigned pos = offset % 8; 79 tc3589x_gpio_set(chip, offset, va 71 tc3589x_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int val) argument 84 tc3589x_gpio_direction_input(struct gpio_chip *chip, unsigned offset) argument 95 tc3589x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) argument 116 int offset = d->irq - tc3589x_gpio->irq_base; local 178 int offset = d->irq - tc3589x_gpio->irq_base; local 188 int offset = d->irq - tc3589x_gpio->irq_base; local [all...] |
H A D | gpio-janz-ttl.c | 60 static int ttl_get_value(struct gpio_chip *gpio, unsigned offset) argument 66 if (offset < 8) { 68 } else if (offset < 16) { 70 offset -= 8; 73 offset -= 16; 77 ret = *shadow & (1 << offset); 82 static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value) argument 88 if (offset < 8) { 91 } else if (offset < 16) { 94 offset [all...] |
/drivers/net/ethernet/intel/e1000e/ |
H A D | phy.c | 36 static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, 39 static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, 60 #define BM_PHY_REG_PAGE(offset) \ 61 ((u16)(((offset) >> PHY_PAGE_SHIFT) & 0xFFFF)) 62 #define BM_PHY_REG_NUM(offset) \ 63 ((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\ 64 (((offset) >> (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)) &\ 179 * @offset: register offset to be read 182 * Reads the MDI control register in the PHY at offset an 185 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) argument 245 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) argument 307 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data) argument 332 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data) argument 377 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, bool locked) argument 415 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) argument 429 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data) argument 444 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, bool locked) argument 481 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) argument 495 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data) argument 511 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, bool locked) argument 553 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) argument 568 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) argument 584 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, bool locked) argument 622 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) argument 636 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) argument 1575 u16 phy_data, offset, mask; local 1641 u16 data, offset, mask; local 1684 u16 phy_data, offset, mask; local 2396 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) argument 2455 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) argument 2513 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) argument 2557 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) argument 2700 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data, bool read, bool page_set) argument 2838 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, bool locked, bool page_set) argument 2903 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) argument 2917 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data) argument 2931 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data) argument 2946 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, bool locked, bool page_set) argument 3027 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) argument 3041 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data) argument 3055 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data) argument 3086 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, u16 *data, bool read) argument [all...] |
H A D | nvm.c | 312 * @offset: offset of word in the EEPROM to read 318 s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) argument 325 * A check for invalid values: offset too large, too many words, 326 * too many words for the offset, and not enough words. 328 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || 335 eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) + 352 * @offset: offset withi 361 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) argument 444 u16 offset; local [all...] |
/drivers/net/wireless/ath/ath5k/ |
H A D | eeprom.c | 75 u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; local 116 for (cksum = 0, offset = 0; offset < eep_max; offset++) { 117 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val); 187 static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset, argument 191 u32 o = *offset; 237 /* return new offset */ 238 *offset = o; 247 static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset, argument 470 u32 offset; local 508 ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max, struct ath5k_chan_pcal_info *pc, unsigned int mode) argument 546 ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset) argument 599 ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset) argument 795 int offset, ret; local 1020 u32 offset; local 1165 u32 offset = AR5K_EEPROM_CAL_DATA_START(ee->ee_misc4); local 1283 u32 offset; local 1473 u32 offset; local 1603 u32 offset; local 1706 u32 offset; local [all...] |
/drivers/video/ |
H A D | vfb.c | 222 var->red.offset = 0; 224 var->green.offset = 0; 226 var->blue.offset = 0; 228 var->transp.offset = 0; 233 var->red.offset = 0; 235 var->green.offset = 5; 237 var->blue.offset = 10; 239 var->transp.offset = 15; 242 var->red.offset = 0; 244 var->green.offset 420 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; local [all...] |
/drivers/tc/ |
H A D | tc.c | 44 long offset; local 52 offset = TC_OLDCARD; 55 err |= tc_preadb(pattern + 0, module + offset + TC_PATTERN0); 56 err |= tc_preadb(pattern + 1, module + offset + TC_PATTERN1); 57 err |= tc_preadb(pattern + 2, module + offset + TC_PATTERN2); 58 err |= tc_preadb(pattern + 3, module + offset + TC_PATTERN3); 64 offset = TC_NEWCARD; 68 module + offset + TC_PATTERN0); 70 module + offset + TC_PATTERN1); 72 module + offset [all...] |
/drivers/char/ |
H A D | nwflash.c | 76 * on 4 Meg flash the second byte is actually at offset 2... 129 printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, " 153 printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n", 222 printk(KERN_DEBUG "flash_write: writing offset %lX, " 273 * The memory devices use the full 32/64 bits of the offset, and so we cannot 280 static loff_t flash_llseek(struct file *file, loff_t offset, int orig) argument 286 printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n", 287 (unsigned int) offset, orig); 291 if (offset < 0) { 296 if ((unsigned int) offset > gbFlashSiz 445 unsigned int offset; local [all...] |
/drivers/misc/eeprom/ |
H A D | at25.c | 69 unsigned offset, 79 if (unlikely(offset >= at25->bin.size)) 81 if ((offset + count) > at25->bin.size) 82 count = at25->bin.size - offset; 92 *cp++ = offset >> 16; 94 *cp++ = offset >> 8; 97 *cp++ = offset >> 0; 122 count, offset, (int) status); 175 unsigned offset = (unsigned) off; local 190 *cp++ = offset >> 1 66 at25_ee_read( struct at25_data *at25, char *buf, unsigned offset, size_t count ) argument 274 at25_mem_read(struct memory_accessor *mem, char *buf, off_t offset, size_t count) argument 282 at25_mem_write(struct memory_accessor *mem, const char *buf, off_t offset, size_t count) argument [all...] |
/drivers/regulator/ |
H A D | wm8400-regulator.c | 115 int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; local 118 val = wm8400_reg_read(wm8400, WM8400_DCDC1_CONTROL_1 + offset); 125 int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; local 127 return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset, 134 int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; local 136 return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset, 153 int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; local 155 val = wm8400_reg_read(wm8400, WM8400_DCDC1_CONTROL_1 + offset); 166 int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; local 179 return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset, 186 int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; local 213 int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2; local [all...] |
/drivers/misc/ibmasm/ |
H A D | ibmasmfs.c | 265 static ssize_t command_file_read(struct file *file, char __user *buf, size_t count, loff_t *offset) argument 272 if (*offset < 0) 276 if (*offset != 0) 302 static ssize_t command_file_write(struct file *file, const char __user *ubuff, size_t count, loff_t *offset) argument 308 if (*offset < 0) 312 if (*offset != 0) 374 static ssize_t event_file_read(struct file *file, char __user *buf, size_t count, loff_t *offset) argument 382 if (*offset < 0) 386 if (*offset != 0) 417 static ssize_t event_file_write(struct file *file, const char __user *buf, size_t count, loff_t *offset) argument 458 r_heartbeat_file_read(struct file *file, char __user *buf, size_t count, loff_t *offset) argument 486 r_heartbeat_file_write(struct file *file, const char __user *buf, size_t count, loff_t *offset) argument 508 remote_settings_file_read(struct file *file, char __user *buf, size_t count, loff_t *offset) argument 542 remote_settings_file_write(struct file *file, const char __user *ubuff, size_t count, loff_t *offset) argument [all...] |
/drivers/gpu/drm/nouveau/ |
H A D | nv04_instmem.c | 25 u32 offset, length; local 77 offset = 0x20000; 80 offset = 0x11400; 84 ret = nouveau_gpuobj_new_fake(dev, offset, ~0, length, 90 offset += length; 101 if (offset < 0x40000) 102 offset = 0x40000; 105 ret = drm_mm_init(&dev_priv->ramin_heap, offset, 106 dev_priv->ramin_rsvd_vram - offset);
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H A D | nouveau_mm.c | 49 b->offset = a->offset; 52 a->offset += size; 79 next->offset = this->offset; 96 e = this->offset + this->length; 97 s = this->offset; 112 splitoff = s - this->offset; 130 nouveau_mm_init(struct nouveau_mm *mm, u32 offset, u32 length, u32 block) argument 145 node->offset [all...] |
H A D | nv50_cursor.c | 61 OUT_RING(evo, nv_crtc->cursor.offset >> 8); 118 nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset) argument 121 if (offset == nv_crtc->cursor.offset) 124 nv_crtc->cursor.offset = offset;
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/drivers/net/wireless/rtlwifi/ |
H A D | efuse.c | 56 static void efuse_shadow_read_1byte(struct ieee80211_hw *hw, u16 offset, 58 static void efuse_shadow_read_2byte(struct ieee80211_hw *hw, u16 offset, 60 static void efuse_shadow_read_4byte(struct ieee80211_hw *hw, u16 offset, 62 static void efuse_shadow_write_1byte(struct ieee80211_hw *hw, u16 offset, 64 static void efuse_shadow_write_2byte(struct ieee80211_hw *hw, u16 offset, 66 static void efuse_shadow_write_4byte(struct ieee80211_hw *hw, u16 offset, 73 static int efuse_pg_packet_read(struct ieee80211_hw *hw, u8 offset, 75 static int efuse_pg_packet_write(struct ieee80211_hw *hw, u8 offset, 242 u8 offset, wren; local 255 "read_efuse(): Invalid offset( 404 efuse_shadow_read(struct ieee80211_hw *hw, u8 type, u16 offset, u32 *value) argument 416 efuse_shadow_write(struct ieee80211_hw *hw, u8 type, u16 offset, u32 value) argument 432 u16 i, offset, base; local 537 efuse_shadow_read_1byte(struct ieee80211_hw *hw, u16 offset, u8 *value) argument 544 efuse_shadow_read_2byte(struct ieee80211_hw *hw, u16 offset, u16 *value) argument 554 efuse_shadow_read_4byte(struct ieee80211_hw *hw, u16 offset, u32 *value) argument 565 efuse_shadow_write_1byte(struct ieee80211_hw *hw, u16 offset, u8 value) argument 573 efuse_shadow_write_2byte(struct ieee80211_hw *hw, u16 offset, u16 value) argument 583 efuse_shadow_write_4byte(struct ieee80211_hw *hw, u16 offset, u32 value) argument 669 efuse_read_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, u8 efuse_data, u8 offset, u8 *tmpdata, u8 *readstate) argument 706 efuse_pg_packet_read(struct ieee80211_hw *hw, u8 offset, u8 *data) argument 750 efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, u8 efuse_data, u8 offset, int *continual, u8 *write_state, struct pgpkt_struct *target_pkt, int *repeat_times, int *result, u8 word_en) argument 922 efuse_pg_packet_write(struct ieee80211_hw *hw, u8 offset, u8 word_en, u8 *data) argument [all...] |
/drivers/crypto/amcc/ |
H A D | crypto4xx_sa.c | 39 u32 offset; local 46 offset = cts.bf.key_size 57 return sizeof(struct dynamic_sa_ctl) + offset * 4; 62 u32 offset; local 69 offset = cts.bf.key_size 84 return sizeof(struct dynamic_sa_ctl) + offset * 4;
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/drivers/staging/rtl8192u/ieee80211/ |
H A D | digest.c | 35 unsigned int offset = sg[i].offset; local 41 offset); 42 char *p = kmap_atomic(pg) + offset; 49 offset = 0; 78 char *p = kmap_atomic(sg[i].page) + sg[i].offset;
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H A D | scatterwalk.c | 51 rest_of_page = PAGE_CACHE_SIZE - (sg->offset & (PAGE_CACHE_SIZE - 1)); 53 walk->offset = sg->offset; 58 walk->data = kmap_atomic(walk->page) + walk->offset; 78 walk->offset = 0; 113 walk->offset += nbytes;
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/drivers/tty/serial/cpm_uart/ |
H A D | cpm_uart.h | 115 int offset; local 120 offset = val - mem; 121 return pinfo->dma_addr + offset; 131 int offset; local 136 offset = val - dma; 137 return pinfo->mem_addr + offset;
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/drivers/usb/storage/ |
H A D | freecom.c | 476 int offset = 0; local 481 offset = 0; 485 offset += sprintf (line+offset, " - "); 488 line[offset++] = buffer[j]; 490 line[offset++] = '.'; 492 line[offset] = 0; 494 offset = 0; 496 offset += sprintf (line+offset, " [all...] |
/drivers/staging/comedi/drivers/ |
H A D | ni_pcimio.c | 50 the analog input for offset, gain and 51 nonlinearity. The analog outputs are corrected for offset and gain. 1350 unsigned offset; local 1353 offset = M_Offset_AI_FIFO_Clear; 1356 offset = M_Offset_AI_Command_1; 1359 offset = M_Offset_AI_Command_2; 1362 offset = M_Offset_AI_Mode_1; 1365 offset = M_Offset_AI_Mode_2; 1368 offset = M_Offset_AI_Mode_3; 1371 offset 1505 unsigned offset; local 1541 unsigned offset; local 1582 unsigned offset; local [all...] |
/drivers/media/video/davinci/ |
H A D | vpss.c | 112 static inline u32 bl_regr(u32 offset) argument 114 return __raw_readl(oper_cfg.vpss_regs_base0 + offset); 117 static inline void bl_regw(u32 val, u32 offset) argument 119 __raw_writel(val, oper_cfg.vpss_regs_base0 + offset); 122 static inline u32 vpss_regr(u32 offset) argument 124 return __raw_readl(oper_cfg.vpss_regs_base1 + offset); 127 static inline void vpss_regw(u32 val, u32 offset) argument 129 __raw_writel(val, oper_cfg.vpss_regs_base1 + offset); 133 static inline u32 isp5_read(u32 offset) argument 135 return __raw_readl(oper_cfg.vpss_regs_base0 + offset); 139 isp5_write(u32 val, u32 offset) argument 247 u32 utemp, mask = 0x1, shift = 0, offset = DM365_ISP5_PCCR; local [all...] |