Searched refs:end (Results 126 - 150 of 1368) sorted by relevance

1234567891011>>

/arch/mips/mm/
H A Dsc-r5k.c27 unsigned long end = start + scache_size; local
29 while(start < end) {
37 unsigned long end, a; local
52 end = (addr + size - 1) & ~(SC_PAGE - 1);
53 while (a <= end) {
H A Dsc-rm7k.c45 unsigned long end, a; local
58 end = (addr + size - 1) & ~(tc_pagesize - 1);
61 if (a == end)
69 unsigned long end, a; local
82 end = (addr + size - 1) & ~(tc_pagesize - 1);
85 if (a == end)
94 unsigned long end = start + tcache_size; local
98 while (start < end) {
189 unsigned long flags, addr, begin, end, pow2; local
193 end
[all...]
/arch/parisc/include/asm/
H A Dtlbflush.h77 unsigned long start, unsigned long end);
79 #define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)->vm_mm->context,start,end)
81 #define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)
/arch/score/include/asm/
H A Dcacheflush.h10 unsigned long start, unsigned long end);
15 extern void flush_icache_range(unsigned long start, unsigned long end);
16 extern void flush_dcache_range(unsigned long start, unsigned long end);
25 #define flush_cache_vmap(start, end) do {} while (0)
26 #define flush_cache_vunmap(start, end) do {} while (0)
/arch/unicore32/include/asm/
H A Dcacheflush.h33 * Start addresses are inclusive and end addresses are exclusive;
34 * start addresses should be rounded down, end addresses up.
55 * flush_user_range(start, end, flags)
60 * - end - user end address (exclusive, page aligned)
63 * coherent_kern_range(start, end)
66 * region described by start, end. If you have non-snooping
69 * - end - virtual end address
71 * coherent_user_range(start, end)
203 flush_cache_vmap(unsigned long start, unsigned long end) argument
207 flush_cache_vunmap(unsigned long start, unsigned long end) argument
[all...]
/arch/blackfin/mach-bf527/boards/
H A Dcm_bf527.c45 .end = 0x203C0000 + 0x000fffff,
50 .end = IRQ_PF7,
79 .end = 0xffc03cff,
84 .end = IRQ_USB_INT0,
90 .end = IRQ_USB_DMA,
162 .end = NFC_DATA_RD + 2,
167 .end = CH_NFC,
187 .end = 0x20312000,
191 .end = 0x20311FFF,
195 .end
[all...]
/arch/alpha/mm/
H A Dnuma.c47 printk(" memcluster %2d, usage %1lx, start %8lu, end %8lu\n",
61 unsigned long start, end; local
87 end = start + cluster->numpages;
89 if (start >= node_pfn_end || end <= node_pfn_start)
96 printk(" memcluster %2d, usage %1lx, start %8lu, end %8lu\n",
102 if (end > node_pfn_end)
103 end = node_pfn_end;
107 if (end > node_max_pfn)
108 node_max_pfn = end;
145 printk(" Detected node memory: start %8lu, end
[all...]
/arch/arm/mach-w90x900/
H A Ddev.c79 .end = NUC900_FLASH_BASE + NUC900_FLASH_SIZE - 1,
99 .end = W90X900_PA_USBEHCIHOST + W90X900_SZ_USBEHCIHOST - 1,
104 .end = IRQ_USBH,
127 .end = W90X900_PA_USBOHCIHOST + W90X900_SZ_USBOHCIHOST - 1,
132 .end = IRQ_USBH,
154 .end = W90X900_PA_USBDEV + W90X900_SZ_USBDEV - 1,
159 .end = IRQ_USBD,
176 .end = W90X900_PA_EMC + W90X900_SZ_EMC - 1,
181 .end = IRQ_EMCTX,
186 .end
[all...]
/arch/blackfin/mach-bf548/boards/
H A Dcm_bf548.c56 .end = IRQ_EPPI0_ERR,
106 .end = IRQ_KEY,
134 .end = UART0_RBR+2,
139 .end = IRQ_UART0_TX,
144 .end = IRQ_UART0_RX,
149 .end = IRQ_UART0_ERROR,
154 .end = CH_UART0_TX,
159 .end = CH_UART0_RX,
182 .end = UART1_RBR+2,
187 .end
[all...]
/arch/arm/mach-davinci/
H A Ddevices-da8xx.c178 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
184 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
190 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
209 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
215 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
221 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
227 .end = DA850_TPCC1_BASE + SZ_32K - 1,
233 .end = DA850_TPTC2_BASE + SZ_1K - 1,
298 .end = DA8XX_I2C0_BASE + SZ_4K - 1,
303 .end
[all...]
/arch/blackfin/mach-bf561/boards/
H A Dcm_bf561.c103 .end = SPI0_REGBASE + 0xFF,
108 .end = CH_SPI,
113 .end = IRQ_SPI,
157 .end = 0x28000300 + 16,
161 .end = IRQ_PF0,
183 .end = 0x24008000 + 0xFF,
188 .end = IRQ_PF43,
215 .end = 0x24000000 + 0x100,
219 .end = IRQ_PF45,
236 .end
[all...]
/arch/sh/mm/
H A Dcache-sh5.c71 static void sh64_icache_inv_kernel_range(unsigned long start, unsigned long end) argument
73 /* Invalidate range of addresses [start,end] from the I-cache, where
79 ullend = (unsigned long long) (signed long long) (signed long) end;
133 unsigned long start, unsigned long end)
136 is whole pages. If 'start' or 'end' is not page aligned, the code
154 n_pages = ((end - start) >> PAGE_SHIFT);
174 after_last_page_start = PAGE_SIZE + ((end - 1) & PAGE_MASK);
204 static void sh64_icache_inv_current_user_range(unsigned long start, unsigned long end) argument
214 ull_end = end;
383 unsigned long addr, unsigned long end)
132 sh64_icache_inv_user_page_range(struct mm_struct *mm, unsigned long start, unsigned long end) argument
382 sh64_dcache_purge_user_pages(struct mm_struct *mm, unsigned long addr, unsigned long end) argument
467 sh64_dcache_purge_user_range(struct mm_struct *mm, unsigned long start, unsigned long end) argument
529 unsigned long start, end; local
581 unsigned long start, end; local
599 unsigned long end = (unsigned long)vaddr + L1_CACHE_BYTES; local
[all...]
H A Dgup.c75 unsigned long end, int write, struct page **pages, int *nr)
111 } while (ptep++, addr += PAGE_SIZE, addr != end);
117 static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end, argument
127 next = pmd_addr_end(addr, end);
132 } while (pmdp++, addr = next, addr != end);
137 static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end, argument
147 next = pud_addr_end(addr, end);
152 } while (pudp++, addr = next, addr != end);
165 unsigned long addr, len, end; local
174 end
74 gup_pte_range(pmd_t pmd, unsigned long addr, unsigned long end, int write, struct page **pages, int *nr) argument
219 unsigned long addr, len, end; local
[all...]
/arch/blackfin/mach-bf518/boards/
H A Dezbrd.c65 .end = 0x202fffff,
67 .end = 0x203fffff,
308 .end = SPI0_REGBASE + 0xFF,
313 .end = CH_SPI0,
318 .end = IRQ_SPI0,
343 .end = SPI1_REGBASE + 0xFF,
348 .end = CH_SPI1,
353 .end = IRQ_SPI1,
374 .end = UART0_GCTL+2,
379 .end
[all...]
/arch/mips/jz4740/
H A Dplatform.c38 .end = JZ4740_UHC_BASE_ADDR + 0x1000 - 1,
43 .end = JZ4740_IRQ_UHC,
63 .end = JZ4740_UDC_BASE_ADDR + 0x1000 - 1,
68 .end = JZ4740_IRQ_UDC,
88 .end = JZ4740_MSC_BASE_ADDR + 0x1000 - 1,
93 .end = JZ4740_IRQ_MSC,
113 .end = JZ4740_RTC_BASE_ADDR + 0x38 - 1,
118 .end = JZ4740_IRQ_RTC,
134 .end = JZ4740_I2C_BASE_ADDR + 0x1000 - 1,
139 .end
[all...]
/arch/arm/mach-s5p64x0/
H A Ddev-audio.c56 .end = S5P64X0_PA_I2S + 0x100 - 1,
61 .end = DMACH_I2S0_TX,
66 .end = DMACH_I2S0_RX,
135 .end = S5P6450_PA_I2S1 + 0x100 - 1,
140 .end = DMACH_I2S1_TX,
145 .end = DMACH_I2S1_RX,
163 .end = S5P6450_PA_I2S2 + 0x100 - 1,
168 .end = DMACH_I2S2_TX,
173 .end = DMACH_I2S2_RX,
213 .end
[all...]
/arch/arm/plat-iop/
H A Dadma.c55 .end = IOP3XX_DMA_UPPER_PA(0),
60 .end = IRQ_DMA0_EOT,
65 .end = IRQ_DMA0_EOC,
70 .end = IRQ_DMA0_ERR,
78 .end = IOP3XX_DMA_UPPER_PA(1),
83 .end = IRQ_DMA1_EOT,
88 .end = IRQ_DMA1_EOC,
93 .end = IRQ_DMA1_ERR,
102 .end = IOP3XX_AAU_UPPER_PA,
107 .end
[all...]
/arch/m68k/sun3/
H A Ddvma.c48 unsigned long end; local
53 end = vaddr + len;
55 while(vaddr < end) {
/arch/m68k/tools/amiga/
H A Ddmesg.c43 u_long start = CHIPMEM_START, end = CHIPMEM_END, p; local
48 end = strtoul(argv[1], NULL, 0);
50 for (p = start; p <= end-sizeof(struct savekmsg); p += 4) {
/arch/mips/kernel/
H A Dcsrc-ioasic.c43 u32 start, end; local
56 end = dec_ioasic_hpt_read(&clocksource_dec);
58 freq = (end - start) * 10;
/arch/mips/pci/
H A Dpci-yosemite.c18 .end = 0xe3ffffffUL,
33 .end = TITAN_IO_SIZE - 1,
60 ioport_resource.end = TITAN_IO_SIZE - 1;
/arch/mips/wrppmc/
H A Dpci.c22 .end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1,
29 .end = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1,
48 ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
/arch/mn10300/mm/
H A Dcache.c47 asmlinkage long sys_cacheflush(unsigned long start, unsigned long end) argument
49 if (end < start)
52 flush_icache_range(start, end);
/arch/score/mm/
H A Dcache.c172 unsigned long start, unsigned long end)
189 while (start <= end) {
200 tmpend = (start | (PAGE_SIZE-1)) > end ?
201 end : (start | (PAGE_SIZE-1));
245 void flush_dcache_range(unsigned long start, unsigned long end) argument
250 end = end & ~(L1_CACHE_BYTES - 1);
251 size = end - start;
264 void flush_icache_range(unsigned long start, unsigned long end) argument
268 end
171 flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) argument
[all...]
/arch/x86/mm/
H A Dpat_internal.h11 u64 end; member in struct:memtype
31 extern struct memtype *rbt_memtype_erase(u64 start, u64 end);
38 static inline struct memtype *rbt_memtype_erase(u64 start, u64 end) argument

Completed in 700 milliseconds

1234567891011>>