Searched refs:DMA3_X_MODIFY (Results 1 - 12 of 12) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h232 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
233 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY,val)
H A DdefBF532.h233 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF512.h468 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
469 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF512.h267 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF522.h485 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
486 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF522.h267 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h243 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
H A DcdefBF534.h447 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
448 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY,val)
/arch/blackfin/mach-bf538/include/mach/
H A DdefBF538.h244 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
H A DcdefBF538.h572 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
573 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h259 #define DMA3_X_MODIFY 0xffc00cd4 /* DMA Channel 3 X Modify Register */ macro
H A DcdefBF54x_base.h404 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
405 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)

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