Searched refs:DMA7_START_ADDR (Results 1 - 12 of 12) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h334 #define bfin_read_DMA7_START_ADDR() bfin_read32(DMA7_START_ADDR)
335 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR,val)
H A DdefBF532.h286 #define DMA7_START_ADDR 0xFFC00DC4 /* DMA Channel 7 Start Address Register */ macro
/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF512.h570 #define bfin_read_DMA7_START_ADDR() bfin_read32(DMA7_START_ADDR)
571 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR, val)
H A DdefBF512.h320 #define DMA7_START_ADDR 0xFFC00DC4 /* DMA Channel 7 Start Address Register */ macro
/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF522.h587 #define bfin_read_DMA7_START_ADDR() bfin_read32(DMA7_START_ADDR)
588 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR, val)
H A DdefBF522.h320 #define DMA7_START_ADDR 0xFFC00DC4 /* DMA Channel 7 Start Address Register */ macro
/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h296 #define DMA7_START_ADDR 0xFFC00DC4 /* DMA Channel 7 Start Address Register */ macro
H A DcdefBF534.h549 #define bfin_read_DMA7_START_ADDR() bfin_read32(DMA7_START_ADDR)
550 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR,val)
/arch/blackfin/mach-bf538/include/mach/
H A DdefBF538.h297 #define DMA7_START_ADDR 0xFFC00DC4 /* DMA Channel 7 Start Address Register */ macro
H A DcdefBF538.h670 #define bfin_read_DMA7_START_ADDR() bfin_readPTR(DMA7_START_ADDR)
671 #define bfin_write_DMA7_START_ADDR(val) bfin_writePTR(DMA7_START_ADDR, val)
/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h320 #define DMA7_START_ADDR 0xffc00dc4 /* DMA Channel 7 Start Address Register */ macro
H A DcdefBF54x_base.h514 #define bfin_read_DMA7_START_ADDR() bfin_read32(DMA7_START_ADDR)
515 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR, val)

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