Searched refs:RTCISR_SAM5 (Results 1 - 2 of 2) sorted by relevance

/arch/m68k/include/asm/
H A DMC68EZ328.h1084 #define RTCISR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt has occurred */ macro
H A DMC68VZ328.h1180 #define RTCISR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt has occurred */ macro

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